> I am wondering if VPP could allow
> VLIB_BUFFER_POOL_PER_THREAD_CACHE_SZ 512 to be changed to a build time
> value as done in DPDK ?
It is a define, you can change it - but I do not think it has been tested 😊.
Maybe we can make it configurable through cmake also.
> Since in this specific use c
Hi Ben,
I am wondering if VPP could allow
VLIB_BUFFER_POOL_PER_THREAD_CACHE_SZ 512 to be changed to a build time value as
done in DPDK ? The i40e NIC has 4K max number of tx/rx descriptors. If we
change the value of VLIB_BUFFER_POOL_PER_THREAD_CACHE_SZ from 512 to 8K - the
number of buffers i
> Thank you very much for your message. Is there anyway figure out the
> buffer allocation cross cpu spin-lock contention?
I'd expect it to appear during profiling if it becomes an issue.
> Are there any test results that you could point us to?
Not that I know of.
ben
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Hi Ben,
Thank you very much for your message. Is there anyway figure out the buffer
allocation cross cpu spin-lock contention? Are there any test results that you
could point us to?
Thank you!
- Pranab K Das
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I agree that having all allocations on 1 thread (rx) and all de-allocations on
other threads (tx) is not ideal.
However, if you can reserve enough memory, I suspect it might be easier to just
*increase* the per-thread buffer cache.
The per-thread buffer cache basically batches spinlock operations
Hi all,
I am referring to vlib_buffer_pool_put (
https://vpp.flirble.org/stable-2110/d8/d9c/buffer__funcs_8h.html#ad7c38a82bb64d64e1f1713a42f344bab
) which grabs a spinlock to return the buffers to the rx-thread from the
tx-threads.
Thank you
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