Hi Ben, I am wondering if VPP could allow
VLIB_BUFFER_POOL_PER_THREAD_CACHE_SZ 512 to be changed to a build time value as done in DPDK ? The i40e NIC has 4K max number of tx/rx descriptors. If we change the value of VLIB_BUFFER_POOL_PER_THREAD_CACHE_SZ from 512 to 8K - the number of buffers is increased by x16 from 0.5x2KB=1KB to total 8Kx2KB (buffer size) = 16MB. And with 10 cores the extra overhead is 16x10=160MB which I believe not a large memory overhead. Since in this specific use case 1 rx-only core, and the rest tx-only cores and all rx-packets are hand-offed to tx-cores, could there be any negative side affect of increasing CACHE_SZ to 8K? Is there any specific reason why the CACHE_SZ is hard-coded to 512? Really appreciate your advice in this regard. Thank you - Pranab K Das
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