[USRP-users] RFNoC OOT block integration problem

I'm currently attempting to realize the RFNoC example described in the "Out-of-tree Modules" section of this web page.\ I've followed step by step the instructions until the make x310_rfnoc_image_core command. Since I'm targeting a N32

[USRP-users] Re: RFNoC gain example time stamp issue

Dear Rob, I am having issues using the OOT gain block inside an RFNOC graph too (see https://github.com/EttusResearch/uhd/issues/538). I also tried to create a loopback path inside my FPGA, as you seem to be doing. In my example I've used a Python script inspired by this presentation (https://

[USRP-users] Re: RFNoC OOT block integration problem

Thank you Rob, I’ve got the same suggestion on git hub and the fix works. (see ) Regards Enrico. ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le

[USRP-users] Ettus N320 PPS : manual adjustment for research purposes

Hi, In the framework of a research project, I need to be able to use the FPGA PS to modify the internal PPS (postpone or anticipate a single PPS pulse). I've modified the design to manipulate the internal counter of the n3xx_clocking/pps_gen_25 module. The latter generates the internal PPS in

[USRP-users] rfnoc_image_builder error with uhd4.6

Hi, I have UHD version 4.6 installed and am currently trying to follow the [RFNOC tutorial](https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0 "RFNOC tutorial"). I managed to install everything correctly and then tried to create a bitstream as shown in the documentation. *$ cd /fpga/

[USRP-users] Re: rfnoc_image_builder error with uhd4.6

Hello Wade, Thanks to your remarks I’ve figured out that the tool was referring to the image_builde.py file in the wrong directory. It appears that UHD4.6 installs its files in : /usr/local/lib/python3.10/site-packages since the previous version I had installed the same files in /usr/local/l