Hi,
I’m trying to conduct the UHD benchmark test using DPDK on X410 radio. I’m
using the NI Dual 100 Gigabit Ethernet PCIe NIC card, using the Mellanox
drivers, and have the UC_200 fpga image loaded on the radio. However, I keep
experiencing packet drops and sequence errors when I do that. Any
I got it work. It seems RT_RUNTIME_SHARE disabled was the culprit. I re-enabled
it using these instructions and the benchmark worked without packet drops or
underruns:\
\
**Underruns Every Second with DPDK + Ubuntu**
With Linux kernels 5.10 and beyond, we have observed periodic underruns on
sys
Here is the cpuinfo from the terminal:\
\
$ sudo cpufreq-set -c 11 -g performance
$ cpufreq-info
cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009
Report errors and bugs to cpuf...@vger.kernel.org, please.
analyzing CPU 0:
driver: intel_pstate
CPUs which run at the same hardw
Yes, its a bare metal system (no VM involved). I have the RF cable connected
from A:0 to A:1 and I’m using the Mellanox cable connected from OSFP28-1 (right
port on X410) to right port on 100G NIC card.
I’m using Xubuntu 22.04.\
$ lsb_release -a
No LSB modules are available.
Distributor ID: U
Its a high-end ASUS desktop machine with 128 GB RAM:\
description: Desktop Computer
product: System Product Name (SKU)
vendor: ASUS
version: System Version
serial: System Serial Number
width: 64 bits
capabilities: smbios-3.5.0 dmi-3.5.0 smp vsyscall32
configuratio
I’m receiving a wide bandwidth signal (\~250 MHz sample rate using DPDK) on
X410 using GNURadio and I notice that the green LED light turns ON and quickly
turns back off whenever I have signal processing blocks (e.g. filter block)
connected to the UHD source block. You have 1-2 overflows at the
I’m attempting to run some of the example rfnoc flowgraphs in Gnruadio using
X410. I keep getting an error that’s similar to the following:
line 114, in __init__
self.uhd_rfnoc_addsub_0 = uhd.rfnoc_block_generic(
RuntimeError: Cannot find block with ID: AddSub Device/Instance: -1/-1
I’m us
Ok, i’ll give that a try
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Hi,
I would like to build an fpga custom fpga image for x410. I would need to be
able to TX/RX anywhere between 250 to 300 MHz. The prebuilt UC_200 is too low
and the CG_400 can’t be adjusted and a bit overkill. Any recommendations on how
to best do that? Which version of Vivado would I need? I
Hi, thanks for the reply. I’m using UHD 4.7. I ran the following and it worked
fine:\
\
$ source ../setupenv.sh --vivado-path=/opt/tools/Xilinx/Vivado/
Setting up a 64-bit FPGA build environment for the USRP-X4xx...
\- Vivado: Found (/opt/tools/Xilinx/Vivado//2021.1/bin)
Installed ve
Hi,
Thanks for the recommendations. I installed Vivado 2021.1 on my machine and ran
the rfnoc_image_builder command found in the documentation using the yaml file
x410_CG_400_rfnoc_image_core.yml. It generates a folder
build-usrp_x410_fpga_CG_400 with the following files: device_tree.dts
Make
That worked for me. Thank you. However, I’m running into error at the end when
its generating the bitstream:
\[01:49:04\] Starting Write Bitstream Command\
ERROR: \[Common 17-69\] Command failed: This design contains one or more cells
for which bitstream generation is not permitted:\
\[01:49:12
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