[USRP-users] SDR environment with USRP & external FPGA

2023-01-03 Thread Pedro Pereira
Greetings, I have 2 USRP front-ends - N210 and N310. I want to develop a GNSS Receiver inside my FGPA - xilinx ZCU102 - and use one of the USRP devices only as the front-end. The receiver is quite large so I need an external board for all the signal processing chain. The receiver has two implement

[USRP-users] Re: SDR environment with USRP & external FPGA

2023-01-03 Thread Pedro Pereira
N210, > and make it a completely different product. It's kind of unlikely you want > to do that. > > Greetings, > Marcus > > On 03.01.23 14:25, Pedro Pereira wrote: > > Greetings, > > I have 2 USRP front-ends - N210 and N310. I want to develop a GNSS > Re

[USRP-users] Re: SDR environment with USRP & external FPGA

2023-01-04 Thread Pedro Pereira
plement device drivers to read data from the hardware to the software application. I only found documentation for importing standard/custom hardware IP blocks to gnuradio. On Tue, 3 Jan 2023 at 16:36, Marcus D. Leech wrote: > On 03/01/2023 10:54, Pedro Pereira wrote: > > Thanks for the re

[USRP-users] Re: SDR environment with USRP & external FPGA

2023-01-04 Thread Pedro Pereira
RP successfully. But the problem is I get the samples from the application level. In the Hybrid version of my receiver, I don't want to receive samples at the application level. As I said, I want to read directly in my hardware block design, in the ZCU102. On Wed, 4 Jan 2023 at 19:06, Pedro P

[USRP-users] Re: SDR environment with USRP & external FPGA

2023-01-04 Thread Pedro Pereira
mmodate all the hardware designs. On Wed, 4 Jan 2023 at 19:26, Marcus D. Leech wrote: > On 04/01/2023 14:06, Pedro Pereira wrote: > > If you're asking "can you make your ZCU102 code run on the N310?" >> possibly. There's a dual-core ARM CPU running Linux, and

[USRP-users] Re: SDR environment with USRP & external FPGA

2023-01-04 Thread Pedro Pereira
ta source of the HW component is the front-end (N310), and the data source for the SW component is the output of the HW component. On Wed, 4 Jan 2023 at 19:31, Pedro Pereira wrote: > What role, then, would the N310 play? > > The N310 will be the front end, and the ZCU102 the backbone