Hey Marino,
sorry, this is really hard to debug. I recommend adding lots of logging
output in your block controller, starting with the top of the constructor.
You can also recompile UHD to run with TRACE level logs enabled, and post
another screenshot of that here, maybe that'll help us narrow it
Sorry if unclear, I meant hard to debug just by looking at this screenshot.
--M
On Wed, Nov 6, 2024 at 10:17 AM Martin Braun wrote:
> Hey Marino,
>
> sorry, this is really hard to debug. I recommend adding lots of logging
> output in your block controller, starting with the top of the construct
Actually, UHD 4.4 happens to support whatever DPDK version Ubuntu 18.04
ships. We support a reasonable range of DPDK versions (not too many, but
more than one) and when we released UHD 4.4, our internal test machines
were still running Ubuntu 18.04.
However, we didn't use the same NIC so there may
On 04/11/2024 20:12, dhpanch...@gmail.com wrote:
I got it work. It seems RT_RUNTIME_SHARE disabled was the culprit. I
re-enabled it using these instructions and the benchmark worked
without packet drops or underruns:
*Underruns Every Second with DPDK + Ubuntu*
With Linux kernels 5.10 and be
Hey Mark,
maybe I'm being dense, but I don't understand what it is that your GPIO
pins are supposed to be doing when your system is done. Can you elaborate?
--M
On Wed, Nov 6, 2024 at 1:56 AM wrote:
> Hi everybody!
>
> I’ve written an RFNOC block that assigns the daughterboard rx GPIO pins to
Hi Ruben,
thanks for your question to the new FFT+CP feature.
1. The question regarding the delay: you can use the ofdm_loopback.py example
(probably renamed to fft_loopback.py when officially released) to calibrate the
exact actual delay of the complete processing chain, including RF. Don’t
Hi Martin,
Sorry I should've elaborated on my purpose.
I'm using a device to connect external TTL signals to the RxBasic
daughterboard GPIO pins on chA of the x310. I'm stealing an analog channel
on the x310 to capture timing on one channel with the analog input on the
2nd channel. This data is
