[USRP-users] N210 undetectable

2022-11-08 Thread ali . mahbas
Dear all, We need your help to solve an issue we having recently with one of N210. \ N210 - It works (the fan can be heard and some of the LEDs are on (please see attached pic). Unfortunately, it is 'timed out' when I ping it and it is undetectable (I tried both Windows and Ubuntu). Could you p

[USRP-users] Re: N210 undetectable

2022-11-08 Thread Marcus Müller
Probably, the device is programmed to use a different IP address than you think it's using. See https://files.ettus.com/manual/page_usrp2.html#usrp2_loadflash_brick on how to use the safe-mode button to temporarily set a fixed IP address. Do that, use the address to correct the programmed IP a

[USRP-users] Re: N210 undetectable

2022-11-08 Thread ali . mahbas
Dear Marcus, Thank you for your reply. I thought the NI-USRP Configuration Utility would detect it even though it has a different IP address. ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@li

[USRP-users] Re: N210 undetectable

2022-11-08 Thread ali . mahbas
Dear Marcus, UPDATE I just did what you told me. it is detected when I use the safe mode. I changed the IP address by using NI-USRP Configuration Utility. Although it tells me that IP has been updated, I have the same issue when I dont use the safe mode. It is only detectable on the safe mode.

[USRP-users] Re: N210 undetectable

2022-11-08 Thread Marcus D. Leech
On 08/11/2022 06:42, ali.mah...@brunel.ac.uk wrote: Dear Marcus, Thank you for your reply. I thought the NI-USRP Configuration Utility would detect it even though it has a different IP address. Only if it happens to be on the same subnet as the host that is doing the query. I'd take Mr.

[USRP-users] Re: N210 undetectable

2022-11-08 Thread Marcus Müller
To which address and subnet do you configure it in the utility? Best regards, Marcus On 08.11.22 14:39, ali.mah...@brunel.ac.uk wrote: Dear Marcus, UPDATE I just did what you told me. it is detected when I use the safe mode. I changed the IP address by using NI-USRP Configuration Utility.

[USRP-users] Re: N210 undetectable

2022-11-08 Thread ali . mahbas
it was changed to 192.168.10.3. The utility only allows to change the IP not the subnet. kind regards, Ali ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com

[USRP-users] Re: How can we develop two RFNOC block that there is a reg relation between them?

2022-11-08 Thread Wade Fife
Gain and multiply are pretty simple operations. Perhaps you could put them both in the same block? Then you would not need to share this register between different blocks. Wade On Sun, Nov 6, 2022 at 1:06 PM sp wrote: > I am developing two RFNOC blocks, a gain block, and a multiplier block... >

[USRP-users] Re: N210 undetectable

2022-11-08 Thread Marcus Müller
As you might have guessed, I'm not aware at all of the NI-USRP utilities. If they just allow setting an IP address, but not a subnet, that would be pretty … incomplete. If that's the case, please try following the guide I linked you to about setting `ip-addr` and `subnet` fields in the N2xx.

[USRP-users] Custom FPGA image "version" register

2022-11-08 Thread ri28856
I use a modified FPGA image on a few x310s. Is there a convenient mechanism for writing some kind of versioning to a register on the FPGA? The specific problem I’m trying to solve is I have a lot of USRPs, and I would like my application to report when one of the radios it connects to is still o

[USRP-users] Re: How can I define a global reg variable in Verilog between RFNOC blocks?

2022-11-08 Thread sp
Thanks very much, Marcus. Can explain more? I had not any idea how develop your way? On Mon, Nov 7, 2022 at 11:29 PM Marcus Müller wrote: > Hi sp, > > That sounds like a bad idea. How are you planning to synchronize access to > that register? > > Generally, in almost *any* context, avoid global

[USRP-users] Re: Custom FPGA image "version" register

2022-11-08 Thread Marcus D. Leech
On 08/11/2022 11:01, ri28...@mit.edu wrote: I use a modified FPGA image on a few x310s. Is there a convenient mechanism for writing some kind of versioning to a register on the FPGA? The specific problem I’m trying to solve is I have a lot of USRPs, and I would like my application to report

[USRP-users] Re: Custom FPGA image "version" register

2022-11-08 Thread ri28856
I found the following line in uhd_usrp_probe that looks like it does what I’m looking for: `if (tree->exists(path / "fw_version")) {` ` ss << "FW Version: " << tree->access(path / "fw_version").get()` ` << std::endl;` ` }` The next question is where does the firmware version get set? I did so

[USRP-users] Re: Custom FPGA image "version" register

2022-11-08 Thread Marcus D. Leech
On 08/11/2022 12:47, ri28...@mit.edu wrote: I found the following line in uhd_usrp_probe that looks like it does what I’m looking for: |if (tree->exists(path / "fw_version")) {| |ss << "FW Version: " << tree->access(path / "fw_version").get()| |<< std::endl;| |}| The next question is wh

[USRP-users] Re: Custom FPGA image "version" register

2022-11-08 Thread Marcus Müller
It's actually set in the firmware software code, firmware/usrp3/x300/x300_main.c towards the end. What the host-side UHD does is ask the firmware running on the X3x0 to reply with the content of that piece of memory. How to figure out such things: you see how the code you found access a leaf "f

[USRP-users] Re: How can I define a global reg variable in Verilog between RFNOC blocks?

2022-11-08 Thread Brian Padalino
On Mon, Nov 7, 2022 at 6:29 PM Marcus Müller wrote: > Hi sp, > > That sounds like a bad idea. How are you planning to synchronize access to > that register? > > Generally, in almost *any* context, avoid global state. That makes things > complicated and > error prone; this is true for python as mu