[USRP-users] Unable to receive two signals in parallel with one TwinRX

Hi all, I’m trying in all ways (gnuradio, uhd) to receive two sines at 18.8GHz and 19.2Ghz simultaneously with one TwinRX doughterboard. Sorry for the noob question, but is there any example that doe this? I have tried only in python since I don’t know c++, but am willing to go for c++ if it

[USRP-users] Re: Unable to receive two signals in parallel with one TwinRX

Arjan, Seeing as the max frequency on the TwinRX is 6GHz, you would nominally need (at the very least) 2 mixers, a splitter, and a high frequency source (>13.2GHz) (such as a signal generator) to accomplish this. Lets say you use a 15 GHz LO, then you would tune the TwinRX to LO-RF=4.2 GHz a

[USRP-users] Re: Counting actual samples using RFNoC custom block

On Tue, Apr 27, 2021 at 3:50 PM wrote: > I went ahead and set high the context_tdata HDR EOB bit field when the sample > counter reaches a value, context_tuser is 0x0 and context_tvalid is high, but > when I read it, UHD rx_metadata_t &metadata end_of_burst, I do not see the > flag comes true.

[USRP-users] Re: Unable to receive two signals in parallel with one TwinRX

Hi Dustin, thak you for your response. I apologise for the error in my question. Of course I have already managed to bring the sines down to 1.5G Hz and 1.95 GHz through an LNB module; so the signals fall inside the TwinRX working bandwidth. In fact, I can receive the signals one at a time, bu

[USRP-users] Re: UHD 4.0 Power Calibration Problems

Any ideas on this? Thanks, Devin On Fri, Apr 23, 2021 at 1:09 PM Devin Kelly wrote: > Hello, > > I'm trying to calibrate the TX power for a USRP X310 using a Keysight > Field Fox N9952B. > > I wrote a class for the field fox that subclasses VISADevice. It seems to > get the numbers from the FF

[USRP-users] Re: UHD 4.0 Power Calibration Problems

I’m hoping to have someone from R&D comment as I’ve never used the power calibration myself. Sent from my iPhone > On Apr 28, 2021, at 10:44 AM, Devin Kelly wrote: > >  > Any ideas on this? > > Thanks, > Devin > >> On Fri, Apr 23, 2021 at 1:09 PM Devin Kelly wrote: >> Hello, >> I'm trying

[USRP-users] Re: Counting actual samples using RFNoC custom block

Rob, I was following the design based on the RFNoC 4, reason by which I was using context and payload. Can you point me to the documentation where I can see the timing diagram of the AXI signals for this fpga “axis_data” interface?. In the RFNoC specification, I only see the context payload.

[USRP-users] Re: [EXTERNAL] Re: Underflows/Overflows, Filesize and a Complete N00B

For Marcus, The true bandwidth of my signal is 16MHz but I have been getting away with 0.2 MHz for some of my data… Not being an RF guy, and having no idea what I’m doing, I’m doing a demo to try and capture GPS the basic GPS L1 signal which is a total channel bandwidth of 15.345MHz at a center

[USRP-users] Re: [EXTERNAL] Re: Underflows/Overflows, Filesize and a Complete N00B

On 04/28/2021 12:29 PM, Hirst (US), Stephen wrote: For Marcus, The true bandwidth of my signal is 16MHz but I have been getting away with 0.2 MHz for some of my data… Not being an RF guy, and having no idea what I’m doing, I’m doing a demo to try and capture GPS the basic GPS L1 signal which

[USRP-users] Re: Counting actual samples using RFNoC custom block

So, RFNoC 4 provides three different interfaces as noted in Section 2.3.3 of this doc. The first is a CHDR based interface (2.3.3.1), the second is the payload & context interface (2.3.3.2), and the third is the "axis_data" or "sideband si

[USRP-users] Re: [EXTERNAL] Re: Underflows/Overflows, Filesize and a Complete N00B

Hi Stephen, A few remarks: - As Marcus indicated, your sample rate should be at least as largs your signal bandwidth. So, if your signal is 1.5MHz BW, your sampling rate should be at least 1.5MS/s (really it should be 25% larger). - The larger the sample rate, the quicker you HDD fills

[USRP-users] Sync source API question for N310

Hey, it's a pretty basic question I have but I really struggle to set the clock and sync source via the UHD C API on a N310. This only happens with UHD 4. The same calls with a X310 work well. The same calls with UHD 3.15 LTS work well for both N310 and X310. Code is [1]. I've tried a few combi

[USRP-users] Bare metal development on X310

Hello, I am planning to use an X310 (we have at least 50 of them around 🙂 ) for an all-hdl project. Has anyone used it w/out RFNoC or UHD? How much setup for on-board components is there? Can I do it w/out the software running on a PC? Thanks Eugene Grayver, Ph.D.

[USRP-users] Re: Bare metal development on X310

On Wed, Apr 28, 2021 at 5:11 PM Eugene Grayver wrote: > Hello, > > I am planning to use an X310 (we have at least 50 of them around 🙂 ) for > an all-hdl project. Has anyone used it w/out RFNoC or UHD? How much setup > for on-board components is there? Can I do it w/out the software running > o

[USRP-users] Re: [EXTERNAL] Re: Underflows/Overflows, Filesize and a Complete N00B

On 04/28/2021 03:02 PM, Rob Kossler wrote: * If this can't work for you, then you could consider using the UHD DPDK capability but I'll warn you that it is not trivial to configure and get it working nicely. First, I guess, you need to decide if saving the data to the file is the i

[USRP-users] Re: Unable to receive two signals in parallel with one TwinRX

On 04/28/2021 10:18 AM, arjan.f...@unifi.it wrote: Hi Dustin, thak you for your response. I apologise for the error in my question. Of course I have already managed to bring the sines down to 1.5G Hz and 1.95 GHz through an LNB module; so the signals fall inside the TwinRX working bandwidth

[USRP-users] Re: Bare metal development on X310

That's what I was afraid of. Note that I do not need any daughter cards (just LFTX/LFRX), which reduces the number of configuration items. My main concern is that I was going to take over the ethernet interface. I guess I can take over one and leave the other one for UHD. I am also concerned

[USRP-users] Re: Bare metal development on X310

On 04/28/2021 05:29 PM, Brian Padalino wrote: On Wed, Apr 28, 2021 at 5:11 PM Eugene Grayver mailto:eugene.gray...@aero.org>> wrote: Hello, I am planning to use an X310 (we have at least 50 of them around 🙂 ) for an all-hdl project. Has anyone used it w/out RFNoC or UHD? How

[USRP-users] Re: Bare metal development on X310

On Wed, Apr 28, 2021 at 5:38 PM Eugene Grayver wrote: > That's what I was afraid of. Note that I do not need any daughter cards > (just LFTX/LFRX), which reduces the number of configuration items. > My main concern is that I was going to take over the ethernet interface. > I guess I can take ove

[USRP-users] The operating system cannot be started when B200 is plugged into the computer

Hi all, In one of our applications, we need to integrate USRP B200 and computer into a mechanical mechanism. So B200 is always connected to the USB port of the computer. In this case, the computer may not start, or it may take a long time to enter the operating system. Is there a solution? thank

[USRP-users] Re: The operating system cannot be started when B200 is plugged into the computer

To reset the B200 all most at every start, a very annoying inconvenient. Nando On 4/29/2021 06:11, Damon qiu wrote: Hi all, In one of our applications, we need to integrate USRP B200 and computer into a mechanical mechanism. So B200 is always connected to the USB port of the computer. In this