Hello all,
I'm trying to implement a MIMO receiver using the 4 RF chains of the N310.
To test the timing of the system, at the transmitter I'm simply sending a
short pulse from one transmit antenna of one USRP. At the receiver it
looks like there is up to a ~20 ms delay/offset between the pairs o
Hi,
I have a question about the PPS inputs on b200 and b200mini models.
I want to synchronize time for two b200 units. I connected the PPS to a
external GPS module. The Ref port was left open(Not used). Then I set the
system time with set_time_next_pps command. On another b200, the
configuration
Hi Maria,
I assume you're using UHD 3.15 or earlier, since you mentioned the "fpga
repository". I've never tried what you're suggesting, so I don't know what
challenges you'll run into. I think changing NUM_CHANNELS_PER_RADIO will do
what you want, but it will have some side effects, like removing
I'm open to that idea but am not familiar with openembedded/yocto/mender or
what that process would look like (and the little bit of googling hasn't
shed enough light yet) so I fall back to the tools that I have found and
that is the ettus docker container with oe-build (
https://github.com/EttusRe
The quick answer is switch the bsp layer from
meta-e31x-mender
to meta-e31x
and see what happens. I find I ahve to fiddle a lot with the ettus
builds, so it does help to know OpenEmbedded/Yocto.
Anyone know the status of the clock speed issue I reported a while back?
A quick scan of metta-ettus
Hi Christopher,
If I understood you correctly, you are trying to use an N310 Tx port as the
LO for the N310 Rx ports? A previous post from several years ago says this
won't work. Perhaps something has changed but not sure. Anyway, the
following was from Michael West a few years ago:
- The TX L
Hi Cameron,
Yes, this is possible. I'm not too familiar with gnuradio but in the end
you need to use a "timed start" to the receive streams.
Rob
On Fri, Nov 20, 2020 at 7:34 AM Cameron Matson via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello all,
>
> I'm trying to implement a MIMO rece
Hi Wade,
Increasing the size of the relevant buffers does sound interesting.
Unfortunately I'm not really familiar with the workflow for building
the FPGA bitstream. I'd be interested in trying it if you could point
me towards up-to-date documentation on doing it, so long as there
wouldn't be a ma
On 11/20/2020 08:38 AM, 翁偉吾 via USRP-users wrote:
Hi,
I have a question about the PPS inputs on b200 and b200mini models.
I want to synchronize time for two b200 units. I connected the PPS to
a external GPS module. The Ref port was left open(Not used). Then I
set the system time with set_time
Building the X310 FPGA does require a Xilinx Vivado license. It is not one
of the FPGAs for which the free version of the tool works.
You can find instructions for building the FPGA in the user manual:
https://files.ettus.com/manual/md_usrp3_build_instructions.html
Thanks,
Wade
On Fri, Nov 20,
On 11/16/2020 05:38 PM, Lamar Owen wrote:
On 11/16/20 5:26 PM, Marcus D. Leech via USRP-users wrote:
On 11/16/2020 03:32 PM, Lamar Owen via USRP-users wrote:
[TRACE] [DBSRX] DBSRX: trying ref_clock 400.00 and m_divider 4
[TRACE] [DBSRX] DBSRX R:2
[ERROR] [DBMGR] The daughterboard man
Hi Rob,
I pulled the cmul module (which uses complex_multiplier.xci) into an OOT
block. I didn't run into any problems. I was able to compile for N310 and
X310 and my OOT simulation worked fine. Here's how I added the
complex_multiplier to my simulation Makefile:
# Include complex_multiplier IP
L
There’s no way the fpga to ARM channel can support those data rates. Lower
your sample rate to 5msps and try again.
Sent from my iPhone
> On Nov 20, 2020, at 10:02 PM, Ivan Zahartchuk via USRP-users
> wrote:
>
>
> Hello, I want to launch two channels for receiving in parallel with usrp e3
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