Dear Jon,
that is technically unlikely to work. All the timings inside the N210
are optimized for a 100 MHz master clock rate, and you can't derive that
from 52 MHz directly.
Why the 52 MHz clock? As said, everything is tested, optimized and
calibrated for 100 MHz only in the N210, so you really
Hi Nate,
I have exactly the same problem that was reported in previous threads: I loaded
a custom FPGA image, got the USRP 2953R (x310) bricked and then used the JTAG
connection with Vivado 2015.4’s Hardware Manager to program the device, however
when trying to load an image to flash using the
It's definitely working better.
Thank you, Marcus.
R
egards,
Brais.
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gr-analysis[1] has specrec, which I use for doing recordings. It does
synchronous writes(not sure how that will fare when writing to USB), in
multiple threads. You could at least check out its source for any further
ideas.
[1] https://github.com/garverp/gr-analysis
On Jul 14, 2017 10:38 AM, "Brai
Good call Jonathon, I forget that you guys wrote up a siggen block, that
will be great to emulate. In fact I attempted to make a stripped down
version that just outputs the sine-wave all the time, but I am not
getting any output. Looking at the debug that scrolls across the screen
while the p
Hi,
I am using SDR's (NI/2901) for my experiment.From one end, I am
transmitting a signal using Tx//RX port of 1st SDR. While at the other
end , I want to receive the same signal using four antenna by connecting
them at all the four ports (two Tx/Rx, two Rx) of the 2nd SDR at the same
time. B
Hi Konstanitn,
I assume you mean you are using VirtualBox, not VMWare.
You will need to add a USB Filtering rule for the USRP within the settings for
the virtual machine (within VirtualBox settings).
You will need to add a rule for VID: 2500 PID: 0020 for the B210.
Also, you need replace the
Hello Ozair Iqbal,
You can't (without using more SDR transceivers or making major
modifications to the hardware). USRP-2901 (USRP B210) is only capable of
2x2 MIMO. You can switch between TX/RX and RX2 ports, but you cannot
receive from all antenna ports concurrently (USRPs with switchable
daughte
I am running some experiments to understand the timing of TwinRX tuning. A
very simple experiment shows that the tag indicating a frequency change is not
placed at the right sample. Here's a capture: The dashed line indicates the
tag sample number. However, there's clearly something happening
The frequency tag is inserted at some point shortly after the
command-set is issued to the hardware. There's no way for the various
bits and pieces to tell when the underlying (mostly analog) hardware has
converged to an "acceptable" steady-state operating mode. PLL
synthesizers don't instantly s
Yes, I definitely agree that there’s no way to tell when the tuning is DONE.
However, my question was about the ‘shortly after’ part. Should it not be
inserted ‘shortly before’, or ‘exactly at’? Since there’s typically no way to
look into the future, (yes, of course it is doable), there’s no
On 07/14/2017 04:22 PM, Eugene Grayver wrote:
Yes, I definitely agree that there’s no way to tell when the tuning is
DONE. However, my question was about the ‘shortly after’ part.
Should it not be inserted ‘shortly before’, or ‘exactly at’? Since
there’s typically no way to look into the f
Hi Luis,
I will follow up with you on this issue off the list, within the thread that
has been sent to supp...@ettus.com.
Regards,
Nate Temple
> On Jul 14, 2017, at 6:51 AM, Torres Figueroa, Luis Angel via USRP-users
> wrote:
>
> Hi Nate,
>
> I have exactly the same problem that was repo
On 07/11/2017 11:56 AM, Will Thompson via USRP-users wrote:
Hi all.
So I’m thinking of starting a project with the E310 that requires high
accuracy control of a switch.
Basically I need to receive a single RF sample (@1MHz) (1us), then
send a signal via the GPIO on a second sample (2us), an
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