Hi Luis, I will follow up with you on this issue off the list, within the thread that has been sent to supp...@ettus.com.
Regards, Nate Temple > On Jul 14, 2017, at 6:51 AM, Torres Figueroa, Luis Angel via USRP-users > <usrp-users@lists.ettus.com> wrote: > > Hi Nate, > > I have exactly the same problem that was reported in previous threads: I > loaded a custom FPGA image, got the USRP 2953R (x310) bricked and then used > the JTAG connection with Vivado 2015.4’s Hardware Manager to program the > device, however when trying to load an image to flash using the > uhd_image_loader command, I get the error: “RuntimeError: Device reported an > error during initialization.” > > http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2016-December/023092.html > http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2016-October/022064.html > > Could you please let me know which steps must be followed in this case? I > attach some logs. > > Best, > Luis > > ltorresf@pc1:~$ uhd_usrp_probe > [INFO] [UHD] linux; GNU C++ version 4.8.4; Boost_105400; > UHD_4.0.0.rfnoc-devel-348-g2c2e1a99 > [INFO] [X300] X300 initialization sequence... > [INFO] [X300] Determining maximum frame size... > [INFO] [X300] Maximum frame size: 1472 bytes. > [INFO] [X300] Setup basic communication... > [INFO] [X300] Loading values from EEPROM... > [INFO] [X300] Setup RF frontend clocking... > [INFO] [X300] Radio 1x clock:200 > [INFO] [X300] Detecting internal GPSDO.... > [INFO] [GPS] Found an internal GPSDO: LC_XO, Firmware Rev 0.929a > [INFO] [RFNOC] [DMA FIFO] Running BIST for FIFO 0... > [INFO] [RFNOC] pass (Throughput: 1304.0MB/s) > [INFO] [RFNOC] [DMA FIFO] Running BIST for FIFO 1... > [INFO] [RFNOC] pass (Throughput: 1305.1MB/s) > [INFO] [RFNOC RADIO] Register loopback test passed > [INFO] [RFNOC RADIO] Register loopback test passed > [INFO] [RFNOC RADIO] Register loopback test passed > [INFO] [RFNOC RADIO] Register loopback test passed > [WARNING] [RFNOC] [0/fosphor_0] defines 2 input buffer sizes, but 1 input > ports > [INFO] [CORES] Performing timer loopback test... > [INFO] [CORES] Timer loopback test passed > [INFO] [CORES] Performing timer loopback test... > [INFO] [CORES] Timer loopback test passed > _____________________________________________________ > / > | Device: X-Series Device > | _____________________________________________________ > | / > | | Mboard: X310 > | | revision: 6 > | | product: 30513 > | | mac-addr0: 00:80:2f:0a:ff:b0 > | | mac-addr1: 00:80:2f:0a:ff:b1 > | | gateway: 192.168.10.1 > | | ip-addr0: 192.168.10.3 > | | subnet0: 255.255.255.0 > | | ip-addr1: 192.168.20.2 > | | subnet1: 255.255.255.0 > | | ip-addr2: 192.168.30.2 > | | subnet2: 255.255.255.0 > | | ip-addr3: 192.168.40.2 > | | subnet3: 255.255.255.0 > | | serial: F5BE96 > | | FW Version: 5.1 > | | FPGA Version: 33.0 > | | FPGA git hash: f764326-dirty > | | RFNoC capable: Yes > | | > | | Time sources: internal, external, gpsdo > | | Clock sources: internal, external, gpsdo > | | Sensors: gps_gpgga, gps_gprmc, gps_time, gps_locked, gps_servo, > ref_locked > | | _____________________________________________________ > | | / > | | | RX Dboard: A > | | | ID: CBX (0x0067) > | | | Serial: F58458 > | | | _____________________________________________________ > | | | / > | | | | RX Frontend: 0 > | | | | Name: CBX RX > | | | | Antennas: TX/RX, RX2, CAL > | | | | Sensors: lo_locked > | | | | Freq range: 1200.000 to 6000.000 MHz > | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB > | | | | Bandwidth range: 40000000.0 to 40000000.0 step 0.0 Hz > | | | | Connection Type: IQ > | | | | Uses LO offset: No > | | | _____________________________________________________ > | | | / > | | | | RX Codec: A > | | | | Name: ads62p48 > | | | | Gain range digital: 0.0 to 6.0 step 0.5 dB > | | _____________________________________________________ > | | / > | | | RX Dboard: B > | | | ID: CBX (0x0067) > | | | Serial: F583B9 > | | | _____________________________________________________ > | | | / > | | | | RX Frontend: 0 > | | | | Name: CBX RX > | | | | Antennas: TX/RX, RX2, CAL > | | | | Sensors: lo_locked > | | | | Freq range: 1200.000 to 6000.000 MHz > | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB > | | | | Bandwidth range: 40000000.0 to 40000000.0 step 0.0 Hz > | | | | Connection Type: IQ > | | | | Uses LO offset: No > | | | _____________________________________________________ > | | | / > | | | | RX Codec: B > | | | | Name: ads62p48 > | | | | Gain range digital: 0.0 to 6.0 step 0.5 dB > | | _____________________________________________________ > | | / > | | | TX Dboard: A > | | | ID: CBX (0x0066) > | | | Serial: F58458 > | | | _____________________________________________________ > | | | / > | | | | TX Frontend: 0 > | | | | Name: CBX TX > | | | | Antennas: TX/RX, CAL > | | | | Sensors: lo_locked > | | | | Freq range: 1200.000 to 6000.000 MHz > | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB > | | | | Bandwidth range: 40000000.0 to 40000000.0 step 0.0 Hz > | | | | Connection Type: QI > | | | | Uses LO offset: No > | | | _____________________________________________________ > | | | / > | | | | TX Codec: A > | | | | Name: ad9146 > | | | | Gain Elements: None > | | _____________________________________________________ > | | / > | | | TX Dboard: B > | | | ID: CBX (0x0066) > | | | Serial: F583B9 > | | | _____________________________________________________ > | | | / > | | | | TX Frontend: 0 > | | | | Name: CBX TX > | | | | Antennas: TX/RX, CAL > | | | | Sensors: lo_locked > | | | | Freq range: 1200.000 to 6000.000 MHz > | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB > | | | | Bandwidth range: 40000000.0 to 40000000.0 step 0.0 Hz > | | | | Connection Type: QI > | | | | Uses LO offset: No > | | | _____________________________________________________ > | | | / > | | | | TX Codec: B > | | | | Name: ad9146 > | | | | Gain Elements: None > | | _____________________________________________________ > | | / > | | | RFNoC blocks on this device: > | | | > | | | * DmaFIFO_0 > | | | * Radio_0 > | | | * Radio_1 > | | | * DDC_0 > | | | * DUC_0 > | | | * FFT_0 > | | | * Window_0 > | | | * FIR_0 > | | | * SigGen_0 > | | | * KeepOneInN_0 > | | | * fosphor_0 > | | | * FIFO_0 > | | | * FIFO_1 > > ltorresf@pc1:~$ uhd_find_devices > [INFO] [UHD] linux; GNU C++ version 4.8.4; Boost_105400; > UHD_4.0.0.rfnoc-devel-348-g2c2e1a99 > -------------------------------------------------- > -- UHD Device 0 > -------------------------------------------------- > Device Address: > serial: F5BE96 > addr: 192.168.10.3 > fpga: HG > name: > product: X310 > type: x300 > > > ltorresf@pc1:~$ uhd_image_loader --args="type=x300,addr=192.168.10.3,fpga=HG" > [INFO] [UHD] linux; GNU C++ version 4.8.4; Boost_105400; > UHD_4.0.0.rfnoc-devel-348-g2c2e1a99 > Unit: USRP X310 (F5BE96, 192.168.10.3) > FPGA Image: /home/ltorresf/local/share/uhd/images/usrp_x310_fpga_HG.bit > failed. > Error: RuntimeError: Device reported an error during initialization. > ltorresf@pc1:~$ > > > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
