Hi Andrew,
Please take note of this section of the KB with regards to FPGA
modifications: https://kb.ettus.com/X300/X310#FPGA_User_Modifications
The PCIe interface and LvFpga_Chinch_Interface cannot be modified, even if
you are not using PCIe as a transport, as it will brick the flash memory:
htt
Hey Andrew,
Have you confirmed the available resources are not enough for your purpose?
If so, I'd suggest you run the build command with the GUI option on,
implement the design using the Vivado interface, and run a
post-implementation utilization report to see which blocks are consuming
the most.
Hi,
I was wondering if there is any way to reduce the resources used by the default
RFNoC image. It currently utilises ~50% of the Kintex-7 FPGA of the Ettus X310,
and I want to make more resources available (LUTs and FFs mainly) for bespoke
firmware development.
Thanks,
Andy
Sent from Outlo
