: Thursday, January 9, 2020 2:25 PM
To: Jeff S
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] GPIO Example Failure on N310
Jeff,
I'd say it's worth trying. Do you currently have any cablingfor changing the
GPIO outputs or external connections to your GPIO port?
Sam Reiter
Ettu
gt; From: Sam Reiter
> Date: 1/6/20 4:46 PM (GMT-06:00)
> To: Jeff S
> Cc: usrp-users@lists.ettus.com
> Subject: Re: [USRP-users] GPIO Example Failure on N310
>
> Jeff,
>
> Follow-up on this. I ran the GPIO example on my N310 with 3.14.1.1
> (g0347a6d8) and all GPIO te
Original message
From: Sam Reiter
Date: 1/6/20 4:46 PM (GMT-06:00)
To: Jeff S
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] GPIO Example Failure on N310
Jeff,
Follow-up on this. I ran the GPIO example on my N310 with 3.14.1.1 (g0347a6d8)
and all GPIO tests passed
Jeff,
Follow-up on this. I ran the GPIO example on my N310 with 3.14.1.1
(g0347a6d8) and all GPIO tests passed. Are your FPGA image and UHD release
modified?
Sam Reiter
Ettus Research
On Fri, Jan 3, 2020 at 2:01 PM Sam Reiter wrote:
> Hey Jeff,
>
> Could you give this a shot on 3.15.0.0 and le
Hey Jeff,
Could you give this a shot on 3.15.0.0 and let me know the results? Based
on that output, the issue looks confined to ATR but it's not something I've
seen reported up to this point.
If 3.15.0.0 shows this issue as well, I'll reproduce it on my end and get a
bug filed.
Sam Reiter
Ettus
I built the UHD example, gpio.cpp (no modifications), and ran it on my N310 to
start experimenting with the GPIO. It returned with two failures:
Testing ATR TX output...fail:
Bit 2 should be set, but is not
Bit 10 9 8 7 6 5 4 3 2 1 0
CTRL: 0 0 0 0 0 0 0 1 1 1 1
