On 07/30/2019 12:43 PM, Sammy Welschen via USRP-users wrote:
Sorry for not specifying, but I was talking about two N310 or N320
devices. Do you know how it is in that case?
With the N320, with the sample-clocks in-phase when using an external
reference, I *THINK* you should see very little phase
Sorry for not specifying, but I was talking about two N310 or N320 devices.
Do you know how it is in that case?
Am Fr., 19. Juli 2019 um 16:58 Uhr schrieb Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com>:
> On 07/19/2019 05:24 AM, Sammy Welschen via USRP-users wrote:
>
> Thanks for yo
On 07/19/2019 05:24 AM, Sammy Welschen via USRP-users wrote:
Thanks for your reply.
I am a bit confused now. Since the LO for this stage is derived from
the sample clock, wouldn't I be in the same situation as if I only
shared 10 MHz reference and PPS signals?
Quote from https://files.ettus.c
Thanks for your reply.
I am a bit confused now. Since the LO for this stage is derived from the
sample clock, wouldn't I be in the same situation as if I only shared 10
MHz reference and PPS signals?
Quote from https://files.ettus.com/manual/page_usrp_n3xx.html:
--
Reasons to
>>
>> I have just been corrected by one of my colleagues at Ettus.
>>
>> While there is an up conversion stage for frequencies below 450Mhz, the LO
>> for that stage is fixed frequency, and derived from the sample clock and
>> coherent across channels.
>>
>> So there should be no random ph
