[USRP-users] b205mini and gpsdo

hi list， I plan to buy a gps module ，the gps module have 1pps pin and uart pin. I will connect the 1pps pin to b205mini “REF” sma port to Disciplin The local clock. And connect uart pin to gpio to read time info. That is ok? Thanks! Best Regards, Charlies _

[USRP-users] check_fpga_compat signature register readback failed

Hi,list today , I find a problem when run usrp b205mini: b200::check_fpga_compat signature register readback failed is the board go bad? Thanks! Carry ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-

[USRP-users] send custom data via txstreamer

hi, this days I make some modify in usrp e310 fpga. I want to recv my custom data and process in fpga. so I modify the file xxx/e310/radio.v : from: axi_fifo_2clk #(.WIDTH(65), .SIZE(DATA_FIFO_SIZE)) tx_data_2clk_fifo (.reset(bus_rst), .i_aclk(bus_clk), .i_tvalid(tx_tvalid_bi), .i_tr

Re: [USRP-users] about rfnoc nocshell

the HP AXI port though. Xilinx's AXI > Datamover or AXI DMA IP blocks are decent choices. > > Jonathon > > On Fri, Jul 6, 2018 at 3:26 AM, carry chen via USRP-users > wrote: >> hello,list, >> >> I have study the rfnoc,I have 2 question: >> 1. I find n

Re: [USRP-users] about rfnoc nocshell

ou'll need something to interface with the HP AXI port though. Xilinx's AXI Datamover or AXI DMA IP blocks are decent choices. Jonathon On Fri, Jul 6, 2018 at 3:26 AM, carry chen via USRP-users wrote: > hello,list, > > I have study the rfnoc,I have 2 question: > 1. I find nocshell

Re: [USRP-users] usrp e310 one tx one rx

search/fpgadev/blob/f27926410328883a315d5230146936d2d782bd09/usrp3/top/e300/e310_core.v#L319 > > ...but it's untested and unsupported. > > Cheers, > Martin > > On 07/22/2018 04:02 AM, carry chen via USRP-users wrote: >> Hi, >> >> list, >> >> I want the us

[USRP-users] read/write ddr3 in usrp e310 PL

Hi,list I know usrp e310 have a ddr3 in PL part, now I need store some data in ddr3 so I can do some dsp algo. So how Can I read/write the ddr3 easy? How many space I can use in ddr3? Is there some example? Thanks! Best, Regards, Carry ___ USRP

[USRP-users] usrp e310 one tx one rx

Hi, list, I want the usrp e310 run only one tx path and one rx path (to save some fpag resource) how can I modify the host code and fpga code ? I use the uhd version: ca09fd2bea0128c18eac4b0ff8a9b30fccdf7698 fpga version: 63e630a13fde1735b98eab1f401f60f0b354cafb Thanks.

[USRP-users] about rfnoc nocshell

hello,list, I have study the rfnoc,I have 2 question: 1. I find nocshell module use large resource, e310 resource is less, so can I adjust some param to reduce the resoure comsume? I only config one radio(1 ddc+1 duc),I find use so many resouce 2.Can I share memory between ps and p

[USRP-users] run app on single core in usrp e310

Hi, I play usrp e310 this days. can I run my app with single core and run os on another core? thank you! Best, Regards, Carry ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

[USRP-users] newest e310 uhd rfnoc problem

Hi, I build the newest uhd rfnoc and fpga rfnoc for e310 this days. every thing is ok but when I run uhd_usrp_probe, I get some error: [INFO] [UHD] linux; GNU C++ version 4.9.2; Boost_105700; UHD_4.0.0.rfnoc-devel-714-g57466164 [INFO] [E300] Loading FPGA image: /home/root/newinstall/usr/share/

[USRP-users] e310 rfnoc error

Hi list: I play usrp e310 rfnoc this days now! But I meet some problem, uhd have some runtime error! like this link desc: https://www.mail-archive.com/usrp-users@lists.ettus.com/msg03926.html " Hi Paul, Unfortunately, we are aware of this bug and we are following it in our internal bug tra

[USRP-users] build uhd rfnoc for e310 get some errors

Hi,list, I complie uhd rfnoc version for e310 follow the link: https://kb.ettus.com/Software_Development_on_the_E3xx_USRP_-_Building_RFNoC_UHD_/_GNU_Radio_/_gr-ettus_from_Source but when run on e310, I get some error: [INFO] [UHDlinux; GNU C++ version 4.9.2; Boost_105700; UHD_4.0.0.rfnoc-de

[USRP-users] b205mini gpio control

Hi, I want to control the b205mini gpio pin,let it output high or low signal to control external device. so do I need to modify fpga? or use uhd only? is that some sample code in uhd? Best Regards, Carry ___ USRP-users mailing list USRP-users@lists.et