Re: [USRP-users] Get and set CBX-120 ads62p48 gain

2021-02-17 Thread Askar, Ramez via USRP-users
rt 744, U.S. Export Administration Regulations and (ii) such a company is not a party to the transaction. If our understanding is incorrect, please notify us immediately because a specific authorization may be required from the U.S. Commerce Department before the transaction may proc

[USRP-users] Get and set CBX-120 ads62p48 gain

2021-02-15 Thread Askar, Ramez via USRP-users
Dear Sir or Madam, We are using the X310 with CBX-120 daughter cards. How can we get and set the digital RX gain (ads62p48 gain) from C++ application? Best regards / Mit freundlichen Grüßen -- Askar, Ramez, M.Sc. Research Associate / Project Manager / Delegate Wireless Communications and Netwo

[USRP-users] HLS IP Core integration with RFNoC 4.0 signal path

2021-02-11 Thread Askar, Ramez via USRP-users
Dear Sir or Madam, I am creating a new IP core in Vivado HLS tool. How do I integrate the tool with RFNoC 4.0 signal path (static routing)? Do I need to export the HLS-created IP as Vivadio IP before integration? The IP planned to have IQ samples in and out and some registers to be programmed

Re: [USRP-users] RFNoC 4 rfnocmodtool

2021-02-08 Thread Askar, Ramez via USRP-users
ect: Re: [USRP-users] RFNoC 4 rfnocmodtool On Thu, Feb 4, 2021 at 1:15 PM Askar, Ramez via USRP-users mailto:usrp-users@lists.ettus.com>> wrote: Dear Sir or Madam, I would like to use one of the available FPGA blocks from Ettus – such as FIR filter -- to customize my FPGA image, and add the co

[USRP-users] RFNoC 4 rfnocmodtool

2021-02-04 Thread Askar, Ramez via USRP-users
Dear Sir or Madam, I would like to use one of the available FPGA blocks from Ettus – such as FIR filter -- to customize my FPGA image, and add the corresponding control driver for C++ application and Gnuradio. However, after creating newmod with rfnocmodtool, I have tried to add fir filter bloc