[USRP-users] when I intialize block RAM and I want to use block RAM in a FOR I faced with this invalid memory name?

when I initialize block RAM and I want to use block RAM in a FOR I am faced with this invalid memory name. When I don't use RAM block array in For loop I have not any warning and readmemh works correctly... WARNING: [Synth 8-2898] ignoring malformed $readmem task: invalid memory name [file.sv:50] W

[USRP-users] Re: Why initialize large array in Verilog is not successfully in RFNOC blocks...

Thanks for the tip! But for usual cases it works.$readmemhex works like charmwhen I use a for or loop and I used ROM in for I faced with these errors.see the source code an RFNOC block code module multiplier_core #(parameter WIDTH=64) (input clk, input reset,input [31:0] reg_user, inpu