[USRP-users] Re: N321 LO sharing between RF 0/1

2022-01-17 Thread Marcus D. Leech
On 2022-01-17 23:34, Paul Atreides wrote: Posting on both GNURadio and USRP lists here, since my application overlaps both gr-uhd/GNURadio and the UHD API. The top-level question is, can gr-uhd support all the necessary N321-specific commands necessary to export the TX LO from RF0 to RF1? That

[USRP-users] Re: N321 LO sharing between RF 0/1

2022-01-17 Thread Paul Atreides
Posting on both GNURadio and USRP lists here, since my application overlaps both gr-uhd/GNURadio and the UHD API. The top-level question is, can gr-uhd support all the necessary N321-specific commands necessary to export the TX LO from RF0 to RF1? That would include running the command to set the 1

[USRP-users] Re: For building Verilog code for FPGA x300 series which license Vivado should I necessary?

2022-01-17 Thread Jorge Chen
Hi, By the way, there's a note in AN-823 indicating the required Vivado edition for the USRP device. https://kb.ettus.com/Getting_Started_with_RFNoC_Development#Prerequisites *NOTE:* - The edition of Xilinx Vivado that is required will depend on which USRP device is being used. - X3

[USRP-users] Re: Fir Filter RFNoC

2022-01-17 Thread Rob Kossler
Hi Camille, The stock example rfnoc_rx_to_file might be helpful. This example allows you to run an Rx-only path with the FIR block inserted. Note that this example was just recently fixed for UHD 4.x so you will need to be using a recent version of UHD. This would allow you to test your FPGA with

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2022-01-17 Thread ogun levent
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2022-01-17 Thread steven camacho
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[USRP-users] Re: Fir Filter RFNoC

2022-01-17 Thread Camille Moniere
Hello, Is there any new idea on the topic? Is this a bug in the fir_filter RFNoC block? I haven't found a way to make it work yet... Camille. On 1/14/22 10:41, Camille Moniere wrote: > Just a typo, I used firS in the file, and I change the first > occurrence while pasting the file, consideri

[USRP-users] Re: Fwd: Enabling fast lock USRP N210.

2022-01-17 Thread Marcus D. Leech
On 2022-01-17 09:10, Ivan Zahartchuk wrote: Sorry to insist, but it is very important for me to know the answer to the question. Ivan: I did NOT see this message on the list when you first posted it, I apologize. You mention N210, but NOT the daughtercard involved. The N210 has had very

[USRP-users] Re: For building Verilog code for FPGA x300 series which license Vivado should I necessary?

2022-01-17 Thread jerry . olup
K7-325T requires a full license. https://support.xilinx.com/s/question/0D52E6hpNqF/ettus-usrp-x300-vivado-license?language=en_US ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.co