Re: [USRP-users] Chip rate and sampling rate.

2020-10-12 Thread Marcus D. Leech via USRP-users
On 10/12/2020 05:12 PM, AKINYELE ITAMAKINDE via USRP-users wrote: Is chip rate same as sample rate? Is there any relationship between chip rate and symbol rate? Lastly, how can one arrive at actually usrp transmitter power when transmitting LFSR sequence. Thanks This is MUCH more of a signals

[USRP-users] Chip rate and sampling rate.

2020-10-12 Thread AKINYELE ITAMAKINDE via USRP-users
Is chip rate same as sample rate? Is there any relationship between chip rate and symbol rate? Lastly, how can one arrive at actually usrp transmitter power when transmitting LFSR sequence. Thanks ___ USRP-users mailing list USRP-users@lists.ettus.com htt

Re: [USRP-users] New mender instructions?

2020-10-12 Thread Rob Kossler via USRP-users
Thanks Jim, This worked fine for me without any "force flag" on my N310. Rob On Fri, Oct 9, 2020 at 7:27 AM Jim Palladino wrote: > Hi Rob, > > Per (https://files.ettus.com/manual/page_usrp_e3xx.html#e3xx_rasm_mender) I > used the following on an E320: > > mender install /home/root/usrp_e320_fs.m

Re: [USRP-users] Cross-Compile Issues with E320

2020-10-12 Thread Andrews, Mark J. via USRP-users
THANK YOU! I thought that it seemed like the SDK had to be wrong, but never saw links to the newer versions in all my searching. Using the newer SDK solved the issues and I can finally run my own programs on the E320. Thank you again for all the help! From: Mi

Re: [USRP-users] Cross-Compile Issues with E320

2020-10-12 Thread Michael Dickens via USRP-users
Hi Mark - You need to use a more recent SDK for the cross-build. Here are the SDKs for the 2 most recent UHD releases. I hope this helps! - MLD < https://files.ettus.com/binaries/cache/e3xx/meta-ettus-v3.15.0.0/e3xx_e320_sdk_default-v3.15.0.0.zip > < https://files.ettus.com/binaries/cache/e3xx/met

[USRP-users] Cross-Compile Issues with E320

2020-10-12 Thread Andrews, Mark J. via USRP-users
Hello, I am trying to cross-compile UHD on an E320 with the OE SDK, but I cannot get past the cmake step due to multiple errors. On the host PC, I am able to install the SDK and source the environment variable without issues. When I go to build UHD, the first error is that the CMakeLists.txt

Re: [USRP-users] UHD on Ubuntu 20.04 and USRP N310

2020-10-12 Thread Martin Braun via USRP-users
Austin, you can update the version of your N310 as well. See e.g. here: https://files.ettus.com/manual/page_usrp_n3xx.html#n3xx_getting_started_fs_update --M On Sat, Oct 10, 2020 at 7:49 AM Austin Adam via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi everyone, > It has been a few months

Re: [USRP-users] Ettus E320 & PetaLinux

2020-10-12 Thread Martin Braun via USRP-users
Ben, we can't provide you with PetaLinux support, but you can rebuild our OE-Based filesystems. For novice OpenEmbedded users, we provide a Docker image (here's a link from the E320 manual: https://github.com/EttusResearch/ettus-docker/blob/master/oe-build/README.md), and if you're more of an expe

[USRP-users] Ettus E320 & PetaLinux

2020-10-12 Thread Turner, Ben via USRP-users
I am attempting to build PetaLinux targeting the E320. As there is no BSP (that I can find) for the E320, I have attempted to generate a hardware description file from the Vivado project that can be created from the Ettus FPGA github repository. I successf

Re: [USRP-users] B210 USRP object creation

2020-10-12 Thread David Taylor (manx.net) via USRP-users
Sam. The B210 is now up an running once again. The fix was only possible by:- 1). Re-compiling b2xx_fx_utils with a modified b200_iface.hpp include file containing the incorrectly programmed B200 pid value. 2). The udev rules had to be temporarily matched allowing the PC USB transport to connec

Re: [USRP-users] B210 FPGA access

2020-10-12 Thread Martin Braun via USRP-users
See also https://files.ettus.com/manual/page_usrp_b200.html#b200_customfpga On Sun, Oct 11, 2020 at 3:05 AM Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 10/10/2020 05:38 PM, Jay Labhart via USRP-users wrote: > > I am in the process of modifying the b210 fpga files and