Re: [USRP-users] Problems with N210 FPGA bitfile -- image not valid?

2019-10-07 Thread Francesco Restuccia via USRP-users
Thank you guys, I just loaded the .bin file and it worked. Thought I had to use the .bit file instead. @Robin -- thanks. ISE generates the .bin file along with the .bit file so no need to use that. Francesco On 10/7/19 3:05 PM, Robin Coxe via USRP-users wrote: You can convert your .bit file t

Re: [USRP-users] Problems with N210 FPGA bitfile -- image not valid?

2019-10-07 Thread Robin Coxe via USRP-users
You can convert your .bit file to a .bin file with this utility: https://github.com/EttusResearch/uhd/blob/UHD-3.14/mpm/python/usrp_mpm/fpga_bit_to_bin.py On Mon, Oct 7, 2019 at 12:02 PM Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 10/07/2019 11:19 AM, Francesco Restu

Re: [USRP-users] Problems with N210 FPGA bitfile -- image not valid?

2019-10-07 Thread Marcus D. Leech via USRP-users
On 10/07/2019 11:19 AM, Francesco Restuccia via USRP-users wrote: Hi all, I've built an N210 image using the source code provided by Ettus-- When I try to burn the FPGA image onto the N210, though, I receive the following error: frank@frank-iMac:~$ uhd_image_loader --args="type=usrp2,addr=1

Re: [USRP-users] One sample - 5 ns delay between the two RF signals/ X310

2019-10-07 Thread Daniel Jepson via USRP-users
Cherif, Great news! Congrats on the fix! Cheers, Daniel On Mon, Oct 7, 2019 at 9:48 AM Cherif Diouf via USRP-users < usrp-users@lists.ettus.com> wrote: > Daniel, > > > The problem was finally solved. It was from both my software and my > hardware development. > > -> in fact in the software I us

[USRP-users] Problems with N210 FPGA bitfile -- image not valid?

2019-10-07 Thread Francesco Restuccia via USRP-users
Hi all, I've built an N210 image using the source code provided by Ettus-- When I try to burn the FPGA image onto the N210, though, I receive the following error: frank@frank-iMac:~$ uhd_image_loader --args="type=usrp2,addr=192.168.10.2" --no-fw --fpga-path=/home/frank/u2plus.bit [INFO] [UH

Re: [USRP-users] One sample - 5 ns delay between the two RF signals/ X310

2019-10-07 Thread Cherif Diouf via USRP-users
Daniel, The problem was finally solved. It was from both my software and my hardware development. -> in fact in the software I used the set_time_next_pps() call from the device3 object to synchronize the vitatime counter with the PPS signal, but later on I would also create a rfnoc_streamer o