Hi,
thanks for clarification.
It would be great if there would be a more detailed description of the
timed command behaviour on the wiki. For example a list clarifying which
commands are affected by set_command_time and which are not. The fact
that switching sample rates using timed commands s
On 04/24/2019 04:16 AM, Fabian Schwartau via USRP-users wrote:
To answer my own question: Yes, it does.
Even when calling clear_command_time(), the get_time_now() will be
executed (and thus return) after the last commited command was
executed, no matter what command it was. Additionally if the
I don't know what your block does, so I don't know which to recommend. The
rfnoc-modtool testbench example is fine, as are most of the existing
testbenches in usrp3/lib/rfnoc.
Ignore the error you're having now, spend some time setting up a testbench.
I promise it will save you time in the end.
O
Dear Nick,
Thank you for the quick reply. I assigned eob, has_time, payload_length,
src_sid, next_dst_sid, future_vita_time in another module. There is some logic
to define when and how to change those values. Sorry for the confusion.
I haven't simulated this. Could you think of a relevant test
Also, just to be clear, I usually see "no response packet" when I've messed
up something in the CHDR. Looking more closely, you're using vita time set
to "future_vita_time", but I don't see where that's assigned, either.
Similarly for has_time and payload_length.
Have you simulated this? It is ver
Are you assigning a value for eob? You declare it, but I don't see where
you assign it.
On Wed, Apr 24, 2019 at 7:15 AM Xingjian Chen via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi Guys,
> Good morning. I am wondering how to insert an EOB in Verilog code to the
> radio. What I have tri
Hi Guys,
Good morning. I am wondering how to insert an EOB in Verilog code to the radio.
What I have tried is cvita_hdr_modify as below. I think just change EOB bit
should put the tx radio into the idle state. However, when the EOB changed, my
E312 returned an error as below. There is a regist
Hi Diogo,
While there are hooks in UHD to support custom reference clock rates, the
majority of the synchronization (PPS and sample clock alignment) routines
rely heavily on known rates (10, 20, 25M). It would be non-trivial to
update everything to use 100M as reference. Let me know if this is a p
Hi
i am working with X310, 2 twin rx, uhd 14_0
GNU C++ version 5.4.0 20160609; Boost_105800; UHD_3.14.0.0-0-unknown.
I am running an example which sample in continuous mode 4 channels based on
rx_multi_samples and writing the result to 4 files
at the end i get
[ERROR] [UHD] Exception caught in
Hello,
Looking into schematic of N310 motherboard , I notice it accepts 10MHz ,20MHz
and 25MHz external clock. I need to synchronize the USRP N310 with external
PLL. Can i use 100 MHz clock as reference?
Thanks in advanced
Diogo Marinho
___
USRP-use
To answer my own question: Yes, it does.
Even when calling clear_command_time(), the get_time_now() will be
executed (and thus return) after the last commited command was executed,
no matter what command it was. Additionally if the last command is too
far in the future, get_time_now() will fail
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