RE: [v1 12/17] ddr: altera: Add SDRAM driver for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 13/17] arm: socfpga: Add SPL for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 14/17] board: intel: Add socdk board support for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 15/17] arm: dts: Add base dtsi and devkit dts for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 16/17] include: configs: Add Intel N5X device CONFIGs

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 17/17] arm: socfpga: Enable Intel N5X device build

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

test: py: CVE-2020-29651 Regular expression deinal of service in py

Hi Tom FYI, there is a CVE from the following file in U-Boot, CVE-2020-29651 Regular expression deinal of service in py. test/py/requirements.txt Regards Ley Foon

RE: [v4 07/17] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, December 18, 2020 11:29 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 08/18] mmc: dwmmc: Change designware MMC 'clksel' callback function to return status

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 09/18] mmc: dwmmc: socfpga: Add ATF support for MMC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 10/18] net: designware: socfpga: Add ATF support for MAC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 16/18] arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 17/18] arm: socfpga: soc64: Enable FIT image generation using binman

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v6 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, December 23, 2020 10:56 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v6 10/18] net: designware: socfpga: Add ATF support for MAC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, December 23, 2020 10:56 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v7 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, December 24, 2020 6:21 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

[GIT PULL] SoCFPGA changes for v2021.04-rc1

Hi Tom Please pull the SoCFPGA changes for v2021.04. Regards Ley Foon The following changes since commit ab1a425524a79eeca61e7b67fdf382c7a499346f: Merge tag 'u-boot-stm32-20210113' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2021-01-13 15:00:53 -0500) are available in the Git re

RE: [v2 1/6] arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 2/6] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 5/6] configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 6/6] configs: socfpga: Add defconfig for Agilex with VAB support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 6/6] configs: socfpga: Add defconfig for Agilex with VAB support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, January 18, 2021 4:07 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, &g

RE: [v2 2/6] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, January 18, 2021 4:03 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, &g

RE: [PATCH v1] spi: cadence-qspi: Fix QSPI write issues

> -Original Message- > From: U-Boot On Behalf Of Tan, Ley Foon > Sent: Wednesday, August 5, 2020 6:00 PM > To: Ang, Chee Hong ; u-boot@lists.denx.de > Cc: Phil Edworthy ; Vignesh R > ; Tom Rini ; See, Chin Liang > ; Chee, Tien Fong ; > Lim, Elly Siew Chin >

RE: [PATCH v1] arm: socfpga: soc64: Add timeout waiting for NOC idle ACK

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 10, 2020 11:00 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew C

RE: [PATCH v3 1/1] Makefile: socfpga: Generate sfp file with 4 SPL images

> -Original Message- > From: Ang, Chee Hong > Sent: Tuesday, August 11, 2020 9:53 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chi

[GIT PULL] SoCFPGA change for v2020-10-rc4

Hi Tom Please pull one change for u-boot SoCFPGA. Regards Ley Foon The following changes since commit 7149077353ef4837ab2fcdce5d7e52c5ed4b026a: Azure/GitLab: Update to latest Docker container (2020-09-02 09:22:29 -0400) are available in the Git repository at: https://github.com/lftan/u-b

RE: [PATCH v1 1/5] arm: socfpga: mailbox: Refactor mailbox timeout event handling

> -Original Message- > From: Ang, Chee Hong > Sent: Wednesday, August 12, 2020 9:56 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew C

RE: [PATCH v1 2/5] arm: socfpga: mailbox: Always read mailbox responses before returning status

> -Original Message- > From: Ang, Chee Hong > Sent: Wednesday, August 12, 2020 9:56 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew C

RE: [PATCH v1 3/5] arm: socfpga: mailbox: Support sending large mailbox command

> -Original Message- > From: Ang, Chee Hong > Sent: Wednesday, August 12, 2020 9:56 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew C

RE: [PATCH v4] arm: socfpga: add board support for ic-automation Moritz III

> -Original Message- > From: Nico Becker > Sent: Monday, September 7, 2020 2:38 PM > To: u-boot@lists.denx.de; ma...@denx.de; > simon.k.r.goldschm...@gmail.com; Tan, Ley Foon > Subject: [PATCH v4] arm: socfpga: add board support for ic-automation > Moritz III &g

RE: [PATCH v4] arm: socfpga: add board support for ic-automation Moritz III

> -Original Message- > From: Nico Becker > Sent: Friday, July 17, 2020 6:23 PM > To: u-boot@lists.denx.de; ma...@denx.de; > simon.k.r.goldschm...@gmail.com; Tan, Ley Foon > Cc: Nico Becker > Subject: [PATCH v4] arm: socfpga: add board support for ic-automation

RE: [PATCH 0/3] net: tftp: Fixes for tftp rollover

> -Original Message- > From: Tan, Ley Foon > Sent: Tuesday, August 25, 2020 10:27 AM > To: u-boot@lists.denx.de > Cc: Joe Hershberger ; Ley Foon Tan > ; See, Chin Liang ; Tan, > Ley Foon > Subject: [PATCH 0/3] net: tftp: Fixes for tftp rollover > >

RE: [PATCH v1] arm: socfpga: soc64: Disable CONFIG_PSCI_RESET

> -Original Message- > From: Ang, Chee Hong > Sent: Friday, August 14, 2020 11:07 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew C

RE: [RESEND PATCH v5] Add board support for ic-automation Moritz III

> -Original Message- > From: Nico Becker > Sent: Wednesday, September 9, 2020 8:02 PM > To: u-boot@lists.denx.de; ma...@denx.de; > simon.k.r.goldschm...@gmail.com; Tan, Ley Foon > Cc: Nico Becker > Subject: [RESEND PATCH v5] Add board support for ic-automatio

RE: [PATCH v1 04/16] arm: socfpga: soc64: Load FIT image with ATF support

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 01/16] arm: socfpga: soc64: Remove CONFIG_OF_EMBED

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 02/16] arm: socfpga: soc64: Add FIT generator script for pack itb with ATF

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 03/16] arm: socfpga: Add function for checking description from FIT image

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 11/16] arm: socfpga: soc64: Add ATF support for Reset Manager driver

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [RESEND PATCH v5 9/11] ARM: socfpga: Add initial support for ic-automation Moritz III

> -Original Message- > From: Nico Becker > Sent: Friday, September 11, 2020 3:03 PM > To: u-boot@lists.denx.de; ma...@denx.de; Tan, Ley Foon > ; simon.k.r.goldschm...@gmail.com > Cc: Nico Becker > Subject: [RESEND PATCH v5 9/11] ARM: socfpga: Add initial support

RE: [PATCH v1 03/16] arm: socfpga: Add function for checking description from FIT image

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 06/16] arm: socfpga: Disable "spin-table" method for booting Linux

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 07/16] arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits)

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 05/16] arm: socfpga: soc64: Override 'lowlevel_init' to support ATF

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH v1 12/16] arm: socfpga: soc64: Add ATF support for FPGA reconfig driver

> -Original Message- > From: Ang, Chee Hong > Sent: Monday, August 17, 2020 12:34 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; Tom Rini ; See, > Chin Liang ; Tan, Ley Foon > ; Ang, Chee Hong ; > Chee, Tien Fong ; Lim, Elly Siew Chin

RE: [PATCH] arm: socfpga: smc: Remove unused SMC function ID

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, March 12, 2021 5:51 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [PATCH] arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabled

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 22, 2021 6:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

[GIT PULL] SoCFPGA changes for v2021.04-rc5

Hi Tom Please pull one fix for v2021.04-rc5. Thanks. Regards Ley Foon The following changes since commit 1f9c3f13f6ad8595a0fb5ab2cb830583cdc0b60a: Merge tag 'efi-2021-04-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi (2021-03-20 08:55:18 -0400) are available in the Git repos

RE: [PATCH] arm: socfpga: Move Stratix10 and Agilex SPL common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 3:59 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 1/5] arm: socfpga: Rename Stratix10 and Agilex handoff common macros

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 2/5] arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 3/5] arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 4/5] arm: socfpga: Rearrange sequence of macros in handoff_soc64.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 1/2] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 10:37 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 2/2] arm: socfpga: Changed to store QSPI reference clock in kHz

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 10:37 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 11:02 AM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Ga

RE: [v1 1/2] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 1:25 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Ga

RE: [v2 2/2] arm: socfpga: Changed to store QSPI reference clock in kHz

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 2:20 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [PATCH] arm: socfpga: smc: Add function to get usercode

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, March 25, 2021 2:08 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v3 1/2] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 5:17 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 1:12 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [PATCH] arm: socfpga: Enable FIT signature with crc32 for SOC64 devices

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 11:57 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 01/17] arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 02/17] arm: socfpga: Add base address for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 03/17] arm: socfpga: Add handoff data support for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 04/17] drivers: clk: Add clock driver for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 06/17] drivers: clk: Add memory clock driver for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 05/17] arm: socfpga: Get clock manager base address for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 07/17] arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

[GIT PULL] SoCFPGA changes for v2021.07-rc1

Hi Tom Please pull the SoCFPGA changes for v2021.07. Regards Ley Foon The following changes since commit e9c99db7787e3b5c2ef05701177c43ed1c023c27: Merge branch '2021-04-07-CI-improvements' (2021-04-07 15:54:07 -0400) are available in the Git repository at: https://github.com/lftan/u-boot

RE: [v1 08/17] arm: socfpga: Add clock manager for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 09/17] arm: socfpga: Changed misc_s10.c to misc_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 11/17] ddr: socfpga: Enable memory test on memory size less than 1GB

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan

RE: [v1 10/17] arm: socfpga: Add SDRAM driver helper function for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [PATCH] arm: socfpga: increase QSPI kernel Image size for Stratix10 and Agilex

> -Original Message- > From: Ooi, Joyce > Sent: Monday, March 9, 2020 11:38 AM > To: Tan, Ley Foon ; Ang, Chee Hong > ; See, Chin Liang ; > Nguyen, Dinh > Cc: u-boot@lists.denx.de; Ooi, Joyce > Subject: [PATCH] arm: socfpga: increase QSPI kernel Image size fo

RE: [PATCH RESEND] arm: dts: agilex: Enable QSPI

> On 3/27/20 9:24 AM, Ley Foon Tan wrote: > > Enable QSPI for Agilex SoC devkit. > > > > Signed-off-by: Ley Foon Tan > > --- > > arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > b/arch

RE: [PATCH RESEND] arm: dts: agilex: Enable QSPI

> -Original Message- > From: Marek Vasut > Sent: Monday, March 30, 2020 9:29 AM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Ley Foon Tan ; See, Chin Liang > ; Simon Goldschmidt > > Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI > > On

RE: [PATCH RESEND] arm: dts: agilex: Enable QSPI

> -Original Message- > From: Marek Vasut > Sent: Monday, March 30, 2020 9:47 AM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Ley Foon Tan ; See, Chin Liang > ; Simon Goldschmidt > > Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI > > On

RE: [PATCH RESEND] arm: dts: agilex: Enable QSPI

> > On 3/27/20 9:24 AM, Ley Foon Tan wrote: > >> Enable QSPI for Agilex SoC devkit. > >> > >> Signed-off-by: Ley Foon Tan > >> --- > >> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 > >> 1 file changed, 4 insertions(+) > >> > >> diff --git a/arch/arm/

RE: [PATCH v2] arm: dts: agilex: Enable QSPI

> -Original Message- > From: Marek Vasut > Sent: Tuesday, March 31, 2020 8:52 AM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Ley Foon Tan ; See, Chin Liang > ; Simon Goldschmidt > > Subject: Re: [PATCH v2] arm: dts: agilex: Enable QSPI > > On 3/31/

RE: [PATCH v1 1/2] clk: socfpga: Read the clock parent's register base in probe function

> -Original Message- > From: Marek Vasut > Sent: Friday, April 3, 2020 6:47 AM > To: Tom Rini > Cc: Simon Glass ; Ang, Chee Hong > ; U-Boot Mailing List ; > Simon Goldschmidt ; See, Chin Liang > ; Tan, Ley Foon ; > Westergreen, Dalon > Subject: Re: [PA

RE: [PATCH] dm: core: Read parent ofdata before children

> -Original Message- > From: Simon Glass > Sent: Monday, April 6, 2020 5:38 AM > To: U-Boot Mailing List > Cc: Ang, Chee Hong ; Tom Rini > ; Tan, Ley Foon ; > Westergreen, Dalon ; See, Chin Liang > ; Simon Goldschmidt > ; Marek Vasut ; > Simon Glass

RE: [PATCH v1 1/2] clk: socfpga: Read the clock parent's register base in probe function

> -Original Message- > From: Tom Rini > Sent: Friday, April 3, 2020 8:21 PM > To: Tan, Ley Foon > Cc: Marek Vasut ; Simon Glass ; Ang, > Chee Hong ; U-Boot Mailing List b...@lists.denx.de>; Simon Goldschmidt > ; See, Chin Liang > ; Westergreen, Dalon >

RE: [PATCH 2/3] arm: dts: arria10: Update dtsi/dts from Linux

> -Original Message- > From: Marek Vasut > Sent: Monday, April 6, 2020 6:41 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Ley Foon Tan ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > > Subject: Re: [PATCH 2/3] arm: dts: arria10: Update dt

RE: [PATCH 3/3] arm: socfpga: arria10: Enable cache driver in SPL

> -Original Message- > From: Simon Goldschmidt > Sent: Monday, April 6, 2020 8:49 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; Ley Foon Tan ; > See, Chin Liang ; Chee, Tien Fong > > Subject: Re: [PATCH 3/3] arm: socfpga: arria10: Enable cac

RE: [v2] Makefile: socfpga: Add target to generate hex output for combined spl and dtb

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, February 24, 2021 9:54 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v3 2/6] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, February 5, 2021 6:52 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v3 3/6] arm: socfpga: cmd: Support 'vab' command

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, February 5, 2021 6:52 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v4 2/7] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Saturday, February 27, 2021 12:11 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [RESEND v4 7/7] Makefile: socfpga: Add target to generate hex output for combined spl and dtb

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Saturday, February 27, 2021 12:58 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v4 2/7] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 1, 2021 2:43 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v5 2/7] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 1, 2021 8:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

[GIT PULL] SoCFPGA changes for v2021.04-rc4

Hi Tom Please pull these changes for v2021.04-rc4. Thanks. Regards Ley Foon The following changes since commit e4dba4ba6f61e8128be0b4200ca2d8cebf62180b: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq (2021-03-06 07:25:04 -0500) are available in the Git repository at: ht

RE: [PATCH 2/2] mtd: nand: raw: denali: Wait for reset completion status

> -Original Message- > From: Masahiro Yamada > Sent: Friday, July 10, 2020 12:27 AM > To: Tan, Ley Foon > Cc: U-Boot Mailing List ; Simon Glass > ; See, Chin Liang ; Bacrau, > Radu ; Marek Vasut > Subject: Re: [PATCH 2/2] mtd: nand: raw: denali: Wait for r

RE: [PATCH v2 2/2] mtd: nand: raw: denali: Wait for reset completion status

> -Original Message- > From: Masahiro Yamada > Sent: Friday, July 10, 2020 9:08 PM > To: Tan, Ley Foon > Cc: U-Boot Mailing List ; Simon Glass > ; See, Chin Liang ; Bacrau, > Radu ; Marek Vasut > Subject: Re: [PATCH v2 2/2] mtd: nand: raw: denali: Wait for r

RE: [PATCH v1 3/4] clk: agilex: Handle clock configuration differently in SPL and U-Boot proper

> -Original Message- > From: Ang, Chee Hong > Sent: Friday, July 10, 2020 8:55 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; See, Chin Liang > ; Tan, Ley Foon ; Ang, > Chee Hong > Subject: [PATCH v1 3/4] clk: agilex: Handle clock c

RE: [PATCH v1 4/4] clk: agilex: Additional membus writes for HPS PLL

> -Original Message- > From: Ang, Chee Hong > Sent: Friday, July 10, 2020 8:55 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Simon Goldschmidt > ; See, Chin Liang > ; Tan, Ley Foon ; Ang, > Chee Hong > Subject: [PATCH v1 4/4] clk: agilex: Additiona

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