dts/update-dts-subtree.sh is just a wrapper around git subtree commands.
Usage from the top level U-Boot source tree, run:
$ ./dts/update-dts-subtree.sh pull
$ ./dts/update-dts-subtree.sh pick
Signed-off-by: Sumit Garg
---
Changes in v5:
- Added support to cherry-pick fixes in subtree update
Since U-Boot switched away from manual CONFIG_* defines to Kconfig
options, align devicetree documentation accordingly.
Signed-off-by: Sumit Garg
---
Changes in v5:
- Fixed inappropriate documentation update.
Changes in v4:
- Separate patch to align documentation to use Kconfig symbols instead
Encourage SoC/board maintainers to migrate to using devicetree-rebasing
subtree and maintain a regular sync with Linux kernel devicetree files
and bindings.
Along with that add documentation regarding how to run DT bindings
schema checks.
Signed-off-by: Sumit Garg
---
Changes in v5:
- Document
Add myself as devicetree-rebasing maintainer.
Reviewed-by: Simon Glass
Reviewed-by: Ilias Apalodimas
Signed-off-by: Sumit Garg
---
Changes in v5:
- None
Changes in v4:
- Switched subtree to be imported as dts/upstream sub-directory rather
than devicetree-rebasing sub-directory to better
ectly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.
Reviewed-by: Neil Armstrong
Reviewed-by: Simon Glass
Signed-off-by: Sumit Garg
---
Changes in v5:
- None
Changes in v4:
- Picked up review tag
Changes in v3:
- Dropped Makefile portio
Since meson-gxbb based boards switched to using upstream DT, so drop
redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files
kept in arch/arm/dts directory for these boards.
Reviewed-by: Neil Armstrong
Signed-off-by: Sumit Garg
---
Changes in v5:
- None
Changes in v4:
- None
Hi Tom,
On Fri, 2 Feb 2024 at 23:32, Tom Rini wrote:
>
> On Fri, Feb 02, 2024 at 06:35:23PM +0530, Sumit Garg wrote:
>
> > Changes in v5:
> > --
> > - Rebased on tip of master (050a9b981d6a835133521b599be3ae189ce70f41)
> > - Created v5_dt branch
Hi Marek,
On Tue, 6 Feb 2024 at 05:51, Marek Vasut wrote:
>
> On 2/2/24 14:05, Sumit Garg wrote:
> > dts/update-dts-subtree.sh is just a wrapper around git subtree commands.
> > Usage from the top level U-Boot source tree, run:
> >
> > $ ./dts/update-dts-subtree.s
-
> drivers/button/button-qcom-pmic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/button/button-qcom-pmic.c
> b/drivers/button/button-qcom-pmic.c
> index 34a976d1e6c6..e6702139ca2d 100644
> --- a/driv
On Tue, 6 Feb 2024 at 18:30, Tom Rini wrote:
>
> On Tue, Feb 06, 2024 at 10:57:12AM +0530, Sumit Garg wrote:
> > Hi Tom,
> >
> > On Fri, 2 Feb 2024 at 23:32, Tom Rini wrote:
> > >
> > > On Fri, Feb 02, 2024 at 06:35:23PM +0530, Sum
Hi Marek,
On Tue, 6 Feb 2024 at 11:50, Sumit Garg wrote:
>
> Hi Marek,
>
> On Tue, 6 Feb 2024 at 05:51, Marek Vasut wrote:
> >
> > On 2/2/24 14:05, Sumit Garg wrote:
> > > dts/update-dts-subtree.sh is just a wrapper around git subtree commands.
> > > U
+ Ian Campbell (Maintainer for devicetree-rebasing tree)
Hi Paul,
Thanks for your nice documentation review.
On Wed, 14 Feb 2024 at 03:01, Paul Barker wrote:
>
> On 02/02/2024 13:05, Sumit Garg wrote:
> > Encourage SoC/board maintainers to migrate to using devicetree-rebasing
>
. So enable corresponding
support as well.
Signed-off-by: Sumit Garg
---
This patch based upon Caleb's series [1].
[1]
https://lore.kernel.org/all/20240215-b4-qcom-common-target-v4-0-ed06355c6...@linaro.org/
configs/qcom_defconfig | 24 +++-
1 file changed, 23 inser
work to import dt-rebasing has been merged, we will drop
> the imported DT and bindings again.
>
> ---
> I have tested this series on the Dragonboard410c, Dragonboard820c, and
> Dragonboard845c. I unfortunately don't have access to a QCS404 EVB board
> to test.
Thanks for inco
On Fri, 16 Feb 2024 at 16:17, Paul Barker wrote:
>
> On 14/02/2024 13:32, Sumit Garg wrote:
> > On Wed, 14 Feb 2024 at 03:01, Paul Barker
> > wrote:
> >> On 02/02/2024 13:05, Sumit Garg wrote:
> >>> +Dependencies
> >>> +
> &
from the FDT, let the board
> do their own validation instead.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/lib/save_prev_bl_data.c | 5 +
> include/init.h | 11 +++
> 2 files changed, 16 insertions(
--
> 1 file changed, 47 insertions(+), 22 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
> index fe1e754bfde0..b63538fce20c 100644
> --- a/drivers/mmc/msm_sdhci.c
> +++ b/drivers/mmc/msm_sdhci.
--
> 1 file changed, 25 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt
> b/doc/device-tree-bindings/mmc/msm_sdhci.txt
> deleted file mode 100644
> index 08a290c66931..
> --- a/doc/device-tr
ompletely so I am not too worried about it.
Reviewed-by: Sumit Garg
-Sumit
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/dts/dragonboard410c.dts | 2 +-
> drivers/clk/qcom/clock-apq8016.c | 2 +-
> drivers/clk/qcom/clock-apq8096.c | 2
+++
> 1 file changed, 22 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
> index 6167c8411678..2a4fef8d28cb 100644
> --- a/drivers/gpio/qcom_pmic_gpio.c
> +++ b/drivers/gpio/qcom_pmic
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Some platforms hard reset when attempting to configure PMIC GPIOs. Add
> support for quirks specified in match data with a single quirk to skip
> this configuration. We rely on the GPIO already be configured correctly,
> which is always the c
e changed, 13 insertions(+), 12 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/clk/qcom/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c
> index f5b352803927..958312b88842 100644
> --- a/drivers/clk/qcom/clock-qcs404.c
> +++ b/drivers/clk/qcom/clock-qcs404
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Introduce support for early debugging. This relies on the previous stage
> bootloader to initialise the UART clocks, when running with U-Boot as
> the primary bootloader this feature doesn't work. It will require a way
> to configure the cloc
ints confusing
> errors.
>
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/dts/dragonboard410c.dts | 3 ++-
> arch/arm/dts/dragonboard820c.dts | 3 ++-
> drivers/serial/serial_msm.c | 25 +
> 3 files changed, 9 insertions(+), 22 deletions(-
> ---
> drivers/gpio/qcom_pmic_gpio.c | 257
> +-
> 1 file changed, 176 insertions(+), 81 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
> index 198cd84bc31e..
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Adjust the DT to match upstream bindings.
>
> Signed-off-by: Caleb Connolly
> ---
> arch/sandbox/dts/sandbox.dtsi | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
Reviewed-by: Sumit Garg
-Su
e do this early enough.
>
> This is required to prevent the first few lines of UART log from being
> dropped.
>
> Reported-by: Sumit Garg
> Signed-off-by: Caleb Connolly
> ---
> drivers/pinctrl/qcom/pinctrl-apq8016.c | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by
| 12 ++++
> 3 files changed, 34 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h
> b/arch/arm/mach-snapdragon/include/mach/gpio.h
> index 8dac62f870b9..c373f5a4cf3d 100644
> --- a/arch/arm/mach-snapdragon/i
8016.c | 26 +++
> drivers/pinctrl/qcom/pinctrl-apq8096.c | 16 +-
> drivers/pinctrl/qcom/pinctrl-qcs404.c | 58
> --
> 3 files changed, 69 insertions(+), 31 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/
t; ---
> board/qualcomm/dragonboard410c/configs/chainloaded.config | 7 +++
> 1 file changed, 7 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/board/qualcomm/dragonboard410c/configs/chainloaded.config
> b/board/qualcomm/dragonboard410c/configs/chainloade
| 22 ++-
> include/dt-bindings/clock/qcom,gcc-msm8916.h | 179
> +++
> 8 files changed, 246 insertions(+), 96 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/dts/dragonboard410c.dts
> b/arch/arm/d
| 2 +-
> board/qualcomm/dragonboard410c/dragonboard410c.c | 48 +++-
> 7 files changed, 45 insertions(+), 186 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/mach-snapdragon/Makefile
> b/arch/arm/mach-snapdragon/Makefile
> index 3a3a29
4 files changed, 1 insertion(+), 145 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/mach-snapdragon/Kconfig
> b/arch/arm/mach-snapdragon/Kconfig
> index ad6671081910..f897c393464f 100644
> --- a/arch/arm/mach-snapdragon/Kconfig
> +++ b/arch/arm/mach-sna
| 67 +++
> configs/qcs404evb_defconfig | 5 +-
> configs/starqltechn_defconfig| 41 -
> include/configs/dragonboard845c.h| 20 ---
> include/configs/qcom.h | 21 +++
> include/configs/
/dragonboard410c/dragonboard410c.c | 2 +-
> 3 files changed, 36 insertions(+), 1 deletion(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 672577d0ddcc..0dba77f86b49 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfi
PCIe PHY can use it when there is no external refclock provided.
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c | 79 +--
1 file changed, 73 insertions(+), 6 deletions(-)
diff --git a/drivers/power/domain/imx8mp-hsiomix.c
b/drivers/power/domain
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c | 50 +--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/power/domain/imx8mp-hsiomix.c
b/drivers/power/domain/imx8mp-hsiomix.c
IG_PCIE_DW_IMX8) += pcie_dw_imx8.o
diff --git a/drivers/pci/pcie_dw_imx8.c b/drivers/pci/pcie_dw_imx8.c
new file mode 100644
index 000..b9921644765
--- /dev/null
+++ b/drivers/pci/pcie_dw_imx8.c
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Linaro Ltd.
+ *
+ * Aut
endor: 0x126f Rev: T0828A0 Prod: AA000720
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Verdin iMX8MP #
Verdin iMX8MP # load nvme 0 $loadaddr
Sumit Garg (7):
clk: imx8mp: Add support for PCIe clocks
reset: imx: Add support for i.MX8MP
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/reset/reset-imx7.c | 114 +
1 file changed, 114 insertions(+)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index eaef2cc2cdf..c1de84dea8b 100644
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.
Signed-off-by: Sumit Garg
---
drivers/phy/Kconfig | 9 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-imx8m-pcie.c | 246
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/clk/imx/clk-imx8mp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a21a3ce34bb..7dfc829df2c 100644
--- a/drivers/clk/imx/clk
Also, enable reset driver which is a prerequisite for PCIe support.
Signed-off-by: Sumit Garg
---
configs/verdin-imx8mp_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 22b8a334dfa..d8bd644322b 100644
+++
> 1 file changed, 101 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/mach-snapdragon/board.c
> b/arch/arm/mach-snapdragon/board.c
> index f445bed3af00..5a859aabd5c4 100644
> --- a/arch/arm/mach-snapdragon/board.
gions by address */
> + count = i;
> + qsort(res, count, sizeof(struct fdt_resource), fdt_cmp_res);
> +
> + /* Now set the right attributes for them. Often a lot of the regions
> are tightly packed together
> +* so we can optimise the number of calls t
onfigs/qcs404evb_defconfig| 56
> --
> 3 files changed, 111 deletions(-)
>
Glad to see qcs404 being supported by generic defconfig.
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/board/qualcomm/qcs404-evb/Makefile
> b/board/qualcomm/qcs404-evb/Makefile
> deleted
61 ++
> doc/board/qualcomm/index.rst | 4 +-
> doc/board/qualcomm/qcs404.rst| 79 --
> doc/board/qualcomm/sdm845.rst| 167
> ---
> 5 files changed, 188 insertions(+), 248 deletions(-)
>
Apart from min
On Tue, 20 Feb 2024 at 17:09, Caleb Connolly wrote:
>
>
>
> On 20/02/2024 06:08, Sumit Garg wrote:
> > On Fri, 16 Feb 2024 at 02:22, Caleb Connolly
> > wrote:
> >>
> >> Introduce support for early debugging. This relies on the previous stage
> >
> Signed-off-by: Caleb Connolly
> ---
> doc/board/qualcomm/dragonboard410c.rst | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/doc/board/qualcomm/dragonboard410c.rst
> b/doc/board/qualcomm/dragonboard410c.rst
> index d0de9dbcbc9a
clude/dt-bindings/soc/qcom,apr.h | 28 ++
> include/dt-bindings/soc/qcom,rpmh-rsc.h| 14 +
> include/dt-bindings/sound/qcom,q6afe.h | 9 +
> include/dt-bindings/sound/qcom,q6asm.h | 26 ++
> include/dt-bindings/sound/qcom,q6dsp-lpa
++
> 3 files changed, 314 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/dts/pm8998.dtsi b/arch/arm/dts/pm8998.dtsi
> new file mode 100644
> index ..3f82715392c6
> --- /dev/null
> +++ b/arch/arm/dts/pm8998.dtsi
>
insertions(+), 4 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 46ba17647f3e..8b048b1faf7c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -576,18 +576,22 @@ M:Caleb Connolly
> M: Neil Armstrong
> R:
+
> 1 file changed, 15 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/include/dt-bindings/clock/qcom,turingcc-qcs404.h
> b/include/dt-bindings/clock/qcom,turingcc-qcs404.h
> new file mode 100644
> index ..838faef57c67
> --- /dev/null
> +++
rch/arm/dts/dragonboard820c.dts | 5 +++--
> drivers/clk/qcom/clock-apq8096.c | 5 +++--
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/dts/dragonboard820c.dts
> b/arch/arm/dts/dragonboard820c.dts
> index 8
rch/arm/dts/pm8994.dtsi | 152
> ++
> arch/arm/dts/pmi8994.dtsi | 65
> 2 files changed, 217 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/dts/pm8994.dtsi b/arch/arm/dts/pm8994.dts
335.h | 15 +
> 5 files changed, 847 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h
> b/include/dt-bindings/clock/qcom,gcc-msm8996.h
> new file mode 100644
> index ..ddfd6fd73081
> --- /dev/null
y
> ---
> arch/arm/dts/msm8916-pm8916.dtsi | 157 ++
> arch/arm/dts/pm8916.dtsi | 178
> +++
> 2 files changed, 335 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/arch/arm/dts/
include/dt-bindings/reset/qcom,gcc-msm8916.h| 100 ++
> include/dt-bindings/sound/apq8016-lpass.h | 9 ++
> include/dt-bindings/sound/qcom,lpass.h | 46 +++
> 7 files changed, 572 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git
i | 30 -
> arch/arm/dts/qcs404-evb.dts | 390 ---
> arch/arm/dts/qcs404-evb.dtsi | 389 +++
> arch/arm/dts/qcs404.dtsi | 1829
> ++
> 8 files changed, 2512 insertions(+), 421 deletions(-)
>
Reviewe
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > pcie_imx doesn't seem to share any useful code for iMX8MP SoC and it is
> > rather tied to quite old port of pcie_designware driver from Linux which
> > suffices only iMX
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Pre-requisite to enable PCIe support on iMX8MP SoC.
>
> Please write a proper commit message .
>
How about the following?
Add support for i.MX8MP reset controller. It is requir
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Pre-requisite to enable PCIe support on iMX8MP SoC.
>
> This commit message is useless, write a proper one.
>
How about the following?
Add support for GPCv2 power domains and c
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > PCIe PHY can use it when there is no external refclock provided.
>
> Commit message needs to be fixed.
How about the following?
Expose high performance PLL clock, so the PCIe PHY c
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> > PHY initialization moved to this standalone PHY driver.
> >
> > Signed-off-by: Sumit Garg
>
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
> > tied to quite old port of pcie_designware driver from Linux which
> > suffices only iMX6 specific ne
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Also, enable reset driver which is a prerequisite for PCIe support.
>
> Commit message needs to be fixed.
Let me reiterate the header here too.
Enable PCIe/NVMe support. Also
On Tue, 20 Feb 2024 at 21:34, Fabio Estevam wrote:
>
> On Tue, Feb 20, 2024 at 10:51 AM Sumit Garg wrote:
> >
> > Also, enable reset driver which is a prerequisite for PCIe support.
> >
> > Signed-off-by: Sumit Garg
> > ---
> > configs/verdin-imx8mp_d
On Wed, 21 Feb 2024 at 14:19, Neil Armstrong wrote:
>
> On 20/02/2024 06:56, Sumit Garg wrote:
> > On Fri, 16 Feb 2024 at 02:22, Caleb Connolly
> > wrote:
> >>
> >> Some platforms hard reset when attempting to configure PMIC GPIOs. Add
> >> supp
On Wed, 21 Feb 2024 at 15:06, Fathi Boudra wrote:
>
> Hi,
>
> On Wed, 21 Feb 2024 at 10:19, Marcel Ziswiler
> wrote:
> >
> > Hi Sumit
> >
> > On Wed, 2024-02-21 at 08:55 +0100, Francesco Dolcini wrote:
> > > Hello Sumit,
> > >
> &g
On Wed, 21 Feb 2024 at 16:11, Marek Vasut wrote:
>
> On 2/21/24 10:18, Marcel Ziswiler wrote:
> > Hi Sumit
> >
> > On Wed, 2024-02-21 at 08:55 +0100, Francesco Dolcini wrote:
> >> Hello Sumit,
> >>
> >> On Tue, Feb 20, 2024 at 06:40:56PM +0530
On Wed, 21 Feb 2024 at 16:11, Marek Vasut wrote:
>
> On 2/21/24 08:55, Francesco Dolcini wrote:
> > Hello Sumit,
> >
> > On Tue, Feb 20, 2024 at 06:40:56PM +0530, Sumit Garg wrote:
> >> Also, enable reset driver which is a prerequisite for PCIe support.
&g
ial-devices.yaml:rtc.yaml
$ make dtbs_check DT_SCHEMA_FILES=/gpio/
$ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml
Sumit Garg (11):
CI: Exclude devicetree-rebasing subtree for CONFIG checks
Makefile: Add support for DT bindings schema checks
scripts/Makefile.lib: Statically define *-u-
to take place. Once that's done it can be added to CI
builds to remain compliant with DT bindings.
Reviewed-by: Simon Glass
Tested-by: Simon Glass
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Switched subtree to be imported as dts/upstream su
Since devicetree-rebasing is an external repo with its own coding style,
exclude it from Azure and gitlab CI CONFIG checks.
Reviewed-by: Tom Rini
Reviewed-by: Ilias Apalodimas
Reviewed-by: Simon Glass
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4
-rebasing directory but still being able to include
*-u-boot.dtsi files.
Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
Reviewed-by: Ilias Apalodimas
Signed-off-by: Sumit Garg
---
Changes in v6:
- Incorporate fix for sandbox CI failure.
Changes in v5:
- None
Changes in v4:
- Incorporate fix to
dts/update-dts-subtree.sh is just a wrapper around git subtree commands.
Usage from the top level U-Boot source tree, run:
$ ./dts/update-dts-subtree.sh pull
$ ./dts/update-dts-subtree.sh pick
Signed-off-by: Sumit Garg
---
Changes in v6:
- Incorporate shell script comments from Marek
Since U-Boot switched away from manual CONFIG_* defines to Kconfig
options, align devicetree documentation accordingly.
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- Fixed inappropriate documentation update.
Changes in v4:
- Separate patch to align documentation to use
ectly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.
Reviewed-by: Neil Armstrong
Reviewed-by: Simon Glass
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Picked up review tag
Changes in v3:
- Dr
Add myself as devicetree-rebasing maintainer.
Reviewed-by: Simon Glass
Reviewed-by: Ilias Apalodimas
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Switched subtree to be imported as dts/upstream sub-directory rather
than devicetree-rebasing sub
Encourage SoC/board maintainers to migrate to using devicetree-rebasing
subtree and maintain a regular sync with Linux kernel devicetree files
and bindings.
Along with that add documentation regarding how to run DT bindings
schema checks.
Signed-off-by: Sumit Garg
---
Changes in v6
Since meson-gxbb based boards switched to using upstream DT, so drop
redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files
kept in arch/arm/dts directory for these boards.
Reviewed-by: Neil Armstrong
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
platforms which currently are compliant
with upstream Linux kernel devicetree files.
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Switched subtree to be imported as dts/upstream sub-directory rather
than devicetree-rebasing sub-directory to better
includes from U-Boot tree, so it shouldn't cause any conflicts.
Tested-by: Bryan Brattlof
Signed-off-by: Sumit Garg
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- New patch to reuse upstream DT includes by U-Boot as per Brian's use-case
for TI K3 SoCs.
x kernel does.
- Patch#7: Picked up tags.
Sumit Garg (8):
clk: imx8mp: Add support for PCIe clocks
reset: imx: Add support for i.MX8MP reset controller
imx8mp: power-domain: Add PCIe support
imx8mp: power-domain: Expose high performance PLL clock
phy: phy-imx8m-pcie: Add support for i.
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/clk/imx/clk-imx8mp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a21a3ce34bbc..7dfc829df2c4 100644
--- a/drivers/clk/imx/clk
Add support for i.MX8MP reset controller, it has same reset IP inside
but with different module layout.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/reset/reset-imx7.c.
Signed-off-by: Sumit Garg
---
drivers/reset/reset-imx7.c | 114 +
1
Add support for GPCv2 power domains and clock handling for PCIe and
PCIe PHY.
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c | 101 --
1 file changed, 78 insertions(+), 23 deletions(-)
diff --git a/drivers/power/domain/imx8mp-hsiomix.c
b/drivers
Expose the high performance PLL as a regular Linux clock, so the
PCIe PHY can use it when there is no external refclock provided.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/pmdomain/imx/imx8mp-blk-ctrl.c
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/phy/freescale/phy-fsl-imx8m-pcie.c.
Signed-off-by: Sumit Garg
---
drivers/phy/Kconfig | 9
+ *
+ * Author: Sumit Garg
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pcie_dw_common.h"
+
+#define PCIE_LINK_CAPABILITY 0x7c
+#defi
Enable PCIe/NVMe support. Also, enable the reset driver which
is a prerequisite for PCIe support.
Acked-by: Francesco Dolcini
Tested-by: Marcel Ziswiler
Signed-off-by: Sumit Garg
---
configs/verdin-imx8mp_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/verdin
Add myself as maintainer for PCIe DWC IMX driver support.
Signed-off-by: Sumit Garg
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0b08ca192397..af23b0c6c862 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1369,6 +1369,12 @@ M
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
> > Pre-requisite to enable PCIe support on iMX8MP SoC.
>
> Commit message needs fixing.
Ack, I missed this one.
-Sumit
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
> > Add support for i.MX8MP reset controller, it has same reset IP
>
> Same as what ?
I can expand it.
>
> > inside
> > but with different module layout.
> >
>
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
>
> [...]
>
> > +static int imx7_reset_assert_imx8mp(struct reset_ctl *rst)
>
> Linux calls those imx8mp_reset_set() can co. which is less confusing
> than imx7...imx8mp() , us
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
> > Add support for GPCv2 power domains and clock handling for PCIe and
> > PCIe PHY.
> >
> > Signed-off-by: Sumit Garg
> > ---
> > d
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
> > Expose the high performance PLL as a regular Linux clock, so the
> > PCIe PHY can use it when there is no external refclock provided.
> >
> > Inspired from counterpar
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
> > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> > PHY initialization moved to this standalone PHY driver.
> >
> > Inspired from counterpar
On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
>
> On 2/26/24 9:04 AM, Sumit Garg wrote:
> > pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
> > tied to quite old port of pcie_designware driver from Linux which
> > suffices only iMX6 specific n
On Mon, 26 Feb 2024 at 16:11, Marek Vasut wrote:
>
> On 2/26/24 11:33 AM, Sumit Garg wrote:
> > On Mon, 26 Feb 2024 at 14:24, Marek Vasut wrote:
> >>
> >> On 2/26/24 9:04 AM, Sumit Garg wrote:
> >>> Add support for i.MX8MP reset controller, it has same r
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