This should be negative EFAULT to indicate an error code.
Reviewed-by: Simon Glass
Signed-off-by: Stephen Boyd
---
boot/bootmeth_cros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index c7b862e512a0..d4c4ed328bd0 100644
--- a
helper functions like
board_get_usable_ram_top_from_coreboot(), dram_init_from_coreboot(), and
dram_init_banksize_from_coreboot() so that boards can still override
these common functions while also supporting booting as a coreboot
payload.
Signed-off-by: Stephen Boyd
---
arch/x86/Kconfig
Add a SPI driver for Qualcomm's GENI hardware.
Signed-off-by: Stephen Boyd
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-geni-qcom.c | 545
3 files changed, 556 insertions(+)
create mode 100644 drivers/sp
Add a driver for Qualcomm's sc7180 pinctrl device (TLMM). This is
largely a copy of a similar driver in U-Boot along with reference to the
Linux driver to fix up the data properly.
Signed-off-by: Stephen Boyd
---
drivers/pinctrl/qcom/Kconfig | 8 ++
drivers/pinctrl/qcom/Mak
Stub the RPMh clock controller on SC7180
Signed-off-by: Stephen Boyd
---
drivers/clk/clk-stub.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk-stub.c b/drivers/clk/clk-stub.c
index 5f5aca41d5b3..23670c2f4425 100644
--- a/drivers/clk/clk-stub.c
+++ b/drivers/clk/clk-stub.c
tracting the FDT from
chromeos kernel partitions
* Move the timestamp file out of arch/x86 as well in a different patch
Stephen Boyd (17):
bootstd: cros: Return negative error code
clk: qcom: Add driver for sc7180
clk/stub: add sc7180-rpmh clock
pinctrl: qcom: Add driver for sc7180
spi:
The clks are already configured properly by coreboot on sc7180, but this
is good enough to make the MMC and USB drivers work.
Reviewed-by: Neil Armstrong
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock
This command isn't x86 specific. Move it up one level so that it can be
used on a platform that can find the coreboot table, i.e. x86 or ARM.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/Kconfig | 4 ++--
cmd/Makefile | 1 +
cmd/{x86 => }/cbsysin
en we want to pick the
DTB from a FIT image based on the board and revision ID bits in the
coreboot tables.
Signed-off-by: Stephen Boyd
---
arch/x86/cpu/coreboot/coreboot.c | 8
common/board_f.c | 4
include/cb_sysinfo.h | 7 +++
lib/coreboot/cb
Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
top of the 4G address space.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/coreboot/Makefile | 4
arch/arm/cpu/armv8/coreboot/cpu
Populate the firmware node with a coreboot node detailing where the
coreboot tables and CBMEM area are located.
Signed-off-by: Stephen Boyd
---
boot/image-fdt.c | 4 ++
include/cb_sysinfo.h | 7 +++
lib/coreboot/cb_sysinfo.c | 120 ++
3
.
Signed-off-by: Stephen Boyd
---
cmd/cbsysinfo.c | 2 ++
include/cb_sysinfo.h | 4
include/coreboot_tables.h | 11 +++
lib/coreboot/cb_sysinfo.c | 15 +++
4 files changed, 32 insertions(+)
diff --git a/cmd/cbsysinfo.c b/cmd/cbsysinfo.c
index ed7b50f6d0fc
The CMOS 'option_table' isn't populated on ARM devices running coreboot.
Check to see if the pointer is NULL and bail out if it is.
Signed-off-by: Stephen Boyd
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/cbsysinfo.c b/cmd/
Set the pstore address and size based on the coreboot tables if the
coreboot tables are populated.
Signed-off-by: Stephen Boyd
---
cmd/pstore.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/cmd/pstore.c b/cmd/pstore.c
index
Move the timestamp code out of x86/cpu/coreboot to lib/coreboot and make
it generic. This lets us migrate the timestamp table from coreboot into
U-Boot's version of boot stage timing and use it on ARM based devices.
---
arch/x86/cpu/coreboot/Makefile | 1 -
arch/x86/cpu/coreb
Add support to decompress LZO images.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 29d7c3279b39..a6341a078019 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -14,6 +14,9
.
Reviewed-by: Caleb Connolly
Signed-off-by: Stephen Boyd
---
arch/arm/mach-snapdragon/board.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index deae4d323789..6850f226f8eb 100644
--- a/arch/arm/mach
Add support to decompress LZ4 images. LZ4 is used on more recent
Chromebooks to store the FIT image.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index a6341a078019..eed66c776d12
Quoting Tom Rini (2025-02-20 17:06:58)
> On Thu, Feb 20, 2025 at 12:58:46PM -0800, Stephen Boyd wrote:
>
> > Lay the groundwork to run U-Boot as a payload on ARM coreboot based
> > devices. Move the coreboot table parsing code out of arch/x86 into
> > lib/coreboot. The h
Quoting Tom Rini (2025-02-20 17:07:11)
> On Thu, Feb 20, 2025 at 12:58:47PM -0800, Stephen Boyd wrote:
>
> > Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
> > top of the 4G address space.
> >
> > Signed-off-by: Ste
Quoting Tom Rini (2025-02-20 17:07:21)
> On Thu, Feb 20, 2025 at 12:58:49PM -0800, Stephen Boyd wrote:
> > diff --git a/cmd/Kconfig b/cmd/Kconfig
> > index 864b6d464ba0..0f456e3b95a2 100644
> > --- a/cmd/Kconfig
> > +++ b/cmd/Kconfig
> > @@ -2898,7 +2898,7 @@ menu
Quoting Caleb Connolly (2025-02-20 17:00:30)
> Hi Stephen,
>
> On 2/20/25 20:58, Stephen Boyd wrote:
> > This series supports running U-Boot as a payload on sc7180 Trogdor
> > Chromebooks like Lazor or Wormdingler. This is a jumble of different
> > patches to get to
here so I'm going to ignore that problem and assume that I can
boot some Linux distro because the eMMC can be read by U-Boot and the
kernel boots.
Stephen Boyd (12):
clk: qcom: Add driver for sc7180
pinctrl: qcom: Add driver for sc7180
spi: Add Qualcomm GENI SPI driver
coreboot: Move cor
Add a driver for Qualcomm's sc7180 pinctrl device (TLMM). This is
largely a copy of a similar driver in U-Boot along with reference to the
Linux driver to fix up the data properly.
Signed-off-by: Stephen Boyd
---
drivers/pinctrl/qcom/Kconfig | 7 ++
drivers/pinctrl/qcom/Mak
Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
top of the 4G address space.
Signed-off-by: Stephen Boyd
---
arch/arm/Kconfig | 2 ++
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/coreboot/Kconfig | 22 +
ar
helper functions like
board_get_usable_ram_top_from_coreboot(), dram_init_from_coreboot(), and
dram_init_banksize_from_coreboot() so that boards can still override
these common functions while also supporting booting as a coreboot
payload.
Signed-off-by: Stephen Boyd
---
arch/x86/Kconfig
The CMOS 'option_table' isn't populated on ARM devices running coreboot.
Check to see if the pointer is NULL and bail out if it is.
Signed-off-by: Stephen Boyd
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/cbsysinfo.c b/cmd/
.
Signed-off-by: Stephen Boyd
---
cmd/cbsysinfo.c | 2 ++
include/cb_sysinfo.h | 4
include/coreboot_tables.h | 11 +++
lib/coreboot/cb_sysinfo.c | 15 +++
4 files changed, 32 insertions(+)
diff --git a/cmd/cbsysinfo.c b/cmd/cbsysinfo.c
index ed7b50f6d0fc
This command isn't x86 specific. Move it up one level so that it can be
used on a platform that can find the coreboot table, i.e. x86 or ARM.
Signed-off-by: Stephen Boyd
---
cmd/Kconfig | 2 +-
cmd/Makefile | 1 +
cmd/{x86 => }/cbsysinfo.c | 0
cmd/x86/
Set the pstore address and size based on the coreboot tables if the
coreboot tables are populated.
Signed-off-by: Stephen Boyd
---
cmd/pstore.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/cmd/pstore.c b/cmd/pstore.c
index
Populate the firmware node with a coreboot node detailing where the
coreboot tables and CBMEM area are located.
Signed-off-by: Stephen Boyd
---
boot/image-fdt.c | 4 ++
include/cb_sysinfo.h | 2 +
lib/coreboot/cb_sysinfo.c | 120 ++
3 files
-off-by: Stephen Boyd
---
arch/arm/mach-snapdragon/board.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index f1319df43147..b410c2972fbd 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach
This should be negative EFAULT to indicate an error code.
Signed-off-by: Stephen Boyd
---
boot/bootmeth_cros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index c7b862e512a0..d4c4ed328bd0 100644
--- a/boot/bootmeth_cros.c
+++ b
The clks are already configured properly by coreboot on sc7180, but this
is good enough to make the MMC and USB drivers work.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-sc7180.c | 150
Add a SPI driver for Qualcomm's GENI hardware.
Signed-off-by: Stephen Boyd
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-geni-qcom.c | 527
3 files changed, 538 insertions(+)
create mode 100644 drivers/sp
Quoting Caleb Connolly (2025-02-26 03:04:29)
>
>
> On 2/25/25 21:49, Stephen Boyd wrote:
>
> > this supposed to work in general? Should I be storing the DTB on disk so
>
> The SystemReady approach is that firmware provides the FDT, if you don't
> pick a DTB the
helper functions like
board_get_usable_ram_top_from_coreboot(), dram_init_from_coreboot(), and
dram_init_banksize_from_coreboot() so that boards can still override
these common functions while also supporting booting as a coreboot
payload.
Signed-off-by: Stephen Boyd
---
arch/x86/Kconfig
Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
top of the 4G address space.
Signed-off-by: Stephen Boyd
---
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/coreboot/Makefile | 4
arch/arm/cpu/armv8/coreboot/cpu
Add a SPI driver for Qualcomm's GENI hardware.
Signed-off-by: Stephen Boyd
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-geni-qcom.c | 527
3 files changed, 538 insertions(+)
create mode 100644 drivers/sp
The clks are already configured properly by coreboot on sc7180, but this
is good enough to make the MMC and USB drivers work.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-sc7180.c | 150
86 as well in a different patch
Stephen Boyd (15):
bootstd: cros: Return negative error code
clk: qcom: Add driver for sc7180
pinctrl: qcom: Add driver for sc7180
spi: Add Qualcomm GENI SPI driver
coreboot: Move coreboot logic out of x86 to a generic place
arm: Support running U-Boot
This command isn't x86 specific. Move it up one level so that it can be
used on a platform that can find the coreboot table, i.e. x86 or ARM.
Signed-off-by: Stephen Boyd
---
cmd/Kconfig | 4 ++--
cmd/Makefile | 1 +
cmd/{x86 => }/cbsysinfo.c | 0
cmd/x86/
This should be negative EFAULT to indicate an error code.
Reviewed-by: Simon Glass
Signed-off-by: Stephen Boyd
---
boot/bootmeth_cros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index c7b862e512a0..d4c4ed328bd0 100644
--- a
Set the pstore address and size based on the coreboot tables if the
coreboot tables are populated.
Signed-off-by: Stephen Boyd
---
cmd/pstore.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/cmd/pstore.c b/cmd/pstore.c
index
.
Signed-off-by: Stephen Boyd
---
cmd/cbsysinfo.c | 2 ++
include/cb_sysinfo.h | 4
include/coreboot_tables.h | 11 +++
lib/coreboot/cb_sysinfo.c | 15 +++
4 files changed, 32 insertions(+)
diff --git a/cmd/cbsysinfo.c b/cmd/cbsysinfo.c
index ed7b50f6d0fc
Populate the firmware node with a coreboot node detailing where the
coreboot tables and CBMEM area are located.
Signed-off-by: Stephen Boyd
---
boot/image-fdt.c | 4 ++
include/cb_sysinfo.h | 7 +++
lib/coreboot/cb_sysinfo.c | 120 ++
3
The CMOS 'option_table' isn't populated on ARM devices running coreboot.
Check to see if the pointer is NULL and bail out if it is.
Signed-off-by: Stephen Boyd
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/cbsysinfo.c b/cmd/
Move the timestamp code out of x86/cpu/coreboot to lib/coreboot and make
it generic. This lets us migrate the timestamp table from coreboot into
U-Boot's version of boot stage timing and use it on ARM based devices.
---
arch/x86/cpu/coreboot/Makefile | 1 -
arch/x86/cpu/coreb
-off-by: Stephen Boyd
---
arch/arm/mach-snapdragon/board.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index 2ef936aab757..cb3df1c2adec 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach
Add support to decompress LZ4 images. LZ4 is used on more recent
Chromebooks to store the FIT image.
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index a6341a078019..eed66c776d12 100644
--- a/cmd/ximg.c
Add support to decompress LZO images.
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 29d7c3279b39..a6341a078019 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -14,6 +14,9 @@
#include
#include
Add a driver for Qualcomm's sc7180 pinctrl device (TLMM). This is
largely a copy of a similar driver in U-Boot along with reference to the
Linux driver to fix up the data properly.
Signed-off-by: Stephen Boyd
---
drivers/pinctrl/qcom/Kconfig | 7 ++
drivers/pinctrl/qcom/Mak
Quoting Caleb Connolly (2025-02-24 06:30:43)
> >
> >>
> >> you might have some luck booting pmOS, we build depthcharge compatible
> >> images for trogdor
> >>
> >> https://images.postmarketos.org/bpo/edge/google-trogdor/
> >>
> >> There's also a generic ARM64 EFI image that should work. You may nee
Set the serial number environment variable based on the value in VPD.
Signed-off-by: Stephen Boyd
---
lib/coreboot/cb_sysinfo.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/lib/coreboot/cb_sysinfo.c b/lib/coreboot/cb_sysinfo.c
index d2e5e6d9bb6e
900.3127680-1-swb...@chromium.org
* Add Kconfig file in lib/coreboot/ to hold the coreboot config stuff
similar to EFI
* Couple new patches for ximg to support extracting the FDT from
chromeos kernel partitions
* Move the timestamp file out of arch/x86 as well in a different patch
St
The clks are already configured properly by coreboot on sc7180, but this
is good enough to make the MMC and USB drivers work.
Reviewed-by: Neil Armstrong
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock
This should be negative EFAULT to indicate an error code.
Reviewed-by: Simon Glass
Signed-off-by: Stephen Boyd
---
boot/bootmeth_cros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index c7b862e512a0..d4c4ed328bd0 100644
--- a
Support setting the frequency of the UART clk on sc7280 so that the
serial console works on devices like hoglin.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/clock-sc7280.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/clk/qcom/clock-sc7280.c b/drivers
Stub the RPMh clock controller on SC7180
Signed-off-by: Stephen Boyd
---
drivers/clk/clk-stub.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk-stub.c b/drivers/clk/clk-stub.c
index 5f5aca41d5b3..23670c2f4425 100644
--- a/drivers/clk/clk-stub.c
+++ b/drivers/clk/clk-stub.c
t;
"bluetooth_mac0" = "8C:FD:F0:40:15:28"
"wifi_mac0" = "8C:FD:F0:40:15:22"
"in_accel_x_lid_calibbias" = "38"
"in_accel_y_lid_calibbias" = "11"
...
Signed-off-by: Stephen Boyd
---
cmd/cbsysinfo.c |
This command isn't x86 specific. Move it up one level so that it can be
used on a platform that can find the coreboot table, i.e. x86 or ARM.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/Kconfig | 4 ++--
cmd/Makefile | 1 +
cmd/{x86 => }/cbsysin
Populate the firmware node with a coreboot node detailing where the
coreboot tables and CBMEM area are located.
Signed-off-by: Stephen Boyd
---
boot/image-fdt.c | 4 ++
include/cb_sysinfo.h | 7 +++
lib/coreboot/cb_sysinfo.c | 120 ++
3
Move the timestamp code out of x86/cpu/coreboot to lib/coreboot and make
it generic. This lets us migrate the timestamp table from coreboot into
U-Boot's version of boot stage timing and use it on ARM based devices.
Signed-off-by: Stephen Boyd
---
arch/x86/cpu/coreboot/Mak
Set the environment variable for the wlan mac address based on the value
stored in VPD.
Signed-off-by: Stephen Boyd
---
lib/coreboot/cb_sysinfo.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/lib/coreboot/cb_sysinfo.c b/lib/coreboot/cb_sysinfo.c
index 92e4f9ca0c0c
Set the MAC address of the wifi device node with an alias like 'wifi0'
or 'wifi' based on the environment variables. This allows us to populate
the wifi device's MAC address on devices like Trogdor that store the
wifi MAC in the VPD.
Signed-off-by: Stephen Boyd
.
Signed-off-by: Stephen Boyd
---
cmd/cbsysinfo.c | 2 ++
include/cb_sysinfo.h | 4
include/coreboot_tables.h | 11 +++
lib/coreboot/cb_sysinfo.c | 15 +++
4 files changed, 32 insertions(+)
diff --git a/cmd/cbsysinfo.c b/cmd/cbsysinfo.c
index ed7b50f6d0fc
Set the pstore address and size based on the coreboot tables if the
coreboot tables are populated.
Signed-off-by: Stephen Boyd
---
cmd/pstore.c | 51 ++-
1 file changed, 42 insertions(+), 9 deletions(-)
diff --git a/cmd/pstore.c b/cmd/pstore.c
early debug console working on boards like Lazor, but it
should work for all Google Trogdor boards.
Signed-off-by: Stephen Boyd
---
board/google/trogdor/Makefile | 3 +++
board/google/trogdor/debug.config | 6 +
board/google/trogdor/debug_uart.c | 41 +++
3
irmware updates.
Signed-off-by: Stephen Boyd
---
doc/board/google/chromebook_trogdor.rst | 69 +
doc/board/google/index.rst | 1 +
2 files changed, 70 insertions(+)
create mode 100644 doc/board/google/chromebook_trogdor.rst
diff --git a/d
Add a config that boots on Trogdor Lazor devices.
Signed-off-by: Stephen Boyd
---
configs/chromebook_trogdor_defconfig | 138 +++
1 file changed, 138 insertions(+)
create mode 100644 configs/chromebook_trogdor_defconfig
diff --git a/configs/chromebook_trogdor_defconfig
Add support to decompress LZO images.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 29d7c3279b39..a6341a078019 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -14,6 +14,9
Add support to decompress LZ4 images. LZ4 is used on more recent
Chromebooks to store the FIT image.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index a6341a078019..eed66c776d12
Add a SPI driver for Qualcomm's GENI hardware.
Signed-off-by: Stephen Boyd
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-geni-qcom.c | 569
3 files changed, 580 insertions(+)
create mode 100644 drivers/sp
Add a driver for Qualcomm's sc7180 pinctrl device (TLMM). This is
largely a copy of a similar driver in U-Boot along with reference to the
Linux driver to fix up the data properly.
Signed-off-by: Stephen Boyd
---
drivers/pinctrl/qcom/Kconfig | 8 ++
drivers/pinctrl/qcom/Mak
helper functions like
board_get_usable_ram_top_from_coreboot(), dram_init_from_coreboot(), and
dram_init_banksize_from_coreboot() so that boards can still override
these common functions while also supporting booting as a coreboot
payload.
Signed-off-by: Stephen Boyd
---
arch/x86/Kconfig
en we want to pick the
DTB from a FIT image based on the board and revision ID bits in the
coreboot tables.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
arch/x86/cpu/coreboot/coreboot.c | 8
common/board_f.c | 4
include/cb_sysinfo.h | 7 ++
The CMOS 'option_table' isn't populated on ARM devices running coreboot.
Check to see if the pointer is NULL and bail out if it is.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/
Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
top of the 4G address space.
Reviewed-by: Tom Rini
Signed-off-by: Stephen Boyd
---
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/coreboot/Makefile | 4
arch/arm/cpu/armv8/coreboot/cpu
al console build is used.
Signed-off-by: Stephen Boyd
---
drivers/serial/serial_msm_geni.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index cb6c09fdd09e..620cb9a59343 100644
---
Set the base of RAM to be the lowest address memory bank from the
coreboot tables.
Signed-off-by: Stephen Boyd
---
lib/coreboot/sdram.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/lib/coreboot/sdram.c b/lib/coreboot/sdram.c
index ac9a95b1d378..25918af003f9
.
Reviewed-by: Caleb Connolly
Signed-off-by: Stephen Boyd
---
arch/arm/mach-snapdragon/board.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index deae4d323789..6850f226f8eb 100644
--- a/arch/arm/mach
Coreboot already initializes the USB3 controller and PHY on Qualcomm
devices. Skip fixing up the USB node on platforms that are a coreboot
payload. This provides a working USB-A port on device like Lazor.
Signed-off-by: Stephen Boyd
---
arch/arm/mach-snapdragon/of_fixup.c | 22
Quoting Casey Connolly (2025-05-28 04:23:01)
> On 5/24/25 00:58, Stephen Boyd wrote:
> > @@ -561,6 +549,16 @@ static int msm_serial_probe(struct udevice *dev)
> > {
> > struct msm_serial_data *priv = dev_get_priv(dev);
> > int ret;
> > + str
Quoting Casey Connolly (2025-06-18 10:59:24)
> Hi Stephen,
>
> There are multiple build errors with this branch, I started trying to
> fix a few but I think there's enough to warrant a respin...
>
> Please build test for x86 and coreboot targets (try buildman)!
>
> CI failures are here
> https://so
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