On 13:05-20231020, Nishanth Menon wrote:
> On 20:52-20231020, Kumar, Udit wrote:
> > Thanks Prasanth
> >
> > On 10/20/2023 12:31 PM, Prasanth Babu Mantena wrote:
> > > EEPROM detection logic in ti_i2c_eeprom_get() involves reading the total
> > > size followed by reading 1-byte size with an offset
On 20:52-20231020, Kumar, Udit wrote:
> Thanks Prasanth
>
> On 10/20/2023 12:31 PM, Prasanth Babu Mantena wrote:
> > EEPROM detection logic in ti_i2c_eeprom_get() involves reading the total
> > size followed by reading 1-byte size with an offset 1. This commit fixes
> > the header matching issue i
On 15:15-20231107, Neha Malcom Francis wrote:
> Hi Prasanth,
>
> On 30/10/23 22:34, Prasanth Babu Mantena wrote:
> > EEPROM detection logic in ti_i2c_eeprom_get() involves reading
> > the total size and the 1-byte size with an offset 1. The commit
> > 9f393a2d7af8 ("board: ti: common: board_detect
On 23:10, Peter Robinson wrote:
Hi Peter,
> Hi Prasanth,
>
> > The channel allocation and deallocation for dma copy was happening on every
> > dma transfer. This is a overhead for transactions like NAND, which does
> > page reads recursively for complete data.
> >
> > So, moving the dma allocatio
On 20:09-20241004, Kumar, Udit wrote:
Hi Udit,
> Hi Prasant,
>
> Thanks for series,
>
> Could we update the subject of patch something like
>
> Remove dma device in spl exit, Sorry but
>
> Add dma device remove in spl exit looks little confusing , are we adding or
> removing ?
Understood. Shou
On 09:59, Kumar, Udit wrote:
> Hi Prasanth,
>
> On 10/6/2024 2:26 PM, Prasanth Mantena wrote:
> > On 20:09-20241004, Kumar, Udit wrote:
> > Hi Udit,
> > > Hi Prasant,
> > >
> > > Thanks for series,
> > >
> > > Could we update the
On 14:56, Venkatesh Yadav Abbarapu wrote:
Hi Venkatesh,
> Enable mt35xu512aba_fixups for all mt35 series flashes to work
> in DTR mode, and return after nor->fixups is updated, otherwise
> it will get overwritten with macronix_octal_fixups.
> This flash works in DTR mode only if CONFIG_SPI_FLASH_M
On 12:09, Venkatesh Yadav Abbarapu wrote:
> Write enable(06h) command will be sent to a flash device to
> set the write enable latch bit before every program, erase,
> write command. After that write disable command (04h) needs
> to be sent to clear the write enable latch.
>
> This write_disable()
On 09:12, Abbarapu, Venkatesh wrote:
Hi Venkatesh,
> Hi Prasanth,
>
> > -Original Message-
> > From: Prasanth Mantena
> > Sent: Monday, November 25, 2024 2:19 PM
> > To: Abbarapu, Venkatesh
> > Cc: u-boot@lists.denx.de; j-humphr...@ti.com; Simek, Mic
On 15:52, Venkatesh Yadav Abbarapu wrote:
> Enable mt35xu512aba_fixups for all mt35 series flashes to work
> in DTR mode, and return after nor->fixups is updated, otherwise
> it will get overwritten with macronix_octal_fixups.
> This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU
> is enab
On 21:01, Kumar, Udit wrote:
Hi Udit,
>
> On 12/10/2024 7:27 PM, Prasanth Babu Mantena wrote:
> > From: Vaishnav Achath
> >
> > J722S R5 SPL uses sec-proxy threads 28 and 29 for communication with
> > TIFS. Mark these as valid threads in the driver.
>
> Please mention doc link also,
>
> Also i
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