This patchset needs to apply after patchset in [1]. These PCIe series patches
are based on the JH7110 RISC-V SoC and VisionFive V2 board.
The PCIe driver depends on gpio, pinctrl, clk and reset driver to do init.
The PCIe dts configuation includes all these setting.
The PCIe drivers codes has bee
From: Mason Huo
Add the stg clocks for StarFive JH7110 PCIe controller.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
drivers/clk/starfive/clk-jh7110.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/clk/starfive/clk-jh7110.c
b/drivers/clk
From: Mason Huo
Add pcie driver for StarFive JH7110, the driver depends on
starfive gpio, pinctrl, clk and reset driver to do init.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
drivers/pci/Kconfig
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
arch/riscv/dts/jh7110.dtsi | 79 ++
arch/riscv/dts/starfive_visionfive2.dts | 104
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 99 +++
arch/riscv/dts/jh7110.dtsi
This patchset needs to apply after patchset in [1]. These PCIe series patches
are based on the JH7110 RISC-V SoC and VisionFive V2 board.
[1]
https://patchwork.ozlabs.org/project/uboot/cover/20230303032432.7837-1-yanhong.w...@starfivetech.com/
The PCIe driver depends on gpio, pinctrl, clk and re
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
From: Mason Huo
Add pcie driver for StarFive JH7110, the driver depends on
starfive gpio, pinctrl, clk and reset driver to do init.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
drivers/pci/Kconfig
On 2023/3/8 15:31, Pali Rohár wrote:
> Hello! See few comments below.
>
> On Wednesday 08 March 2023 13:48:31 Minda Chen wrote:
>> From: Mason Huo
>>
>> Add pcie driver for StarFive JH7110, the driver depends on
>> starfive gpio, pinctrl, clk and reset
On 2023/3/11 1:42, Pali Rohár wrote:
> On Friday 10 March 2023 18:36:44 Minda Chen wrote:
>> On 2023/3/8 15:31, Pali Rohár wrote:
>> > Hello! See few comments below.
>> >
>> > On Wednesday 08 March 2023 13:48:31 Minda Chen wrote:
>> >> From: Maso
Hi Joe and Ramon
Sorry to disturb you. Could you please review this patchset. Thanks
On 2023/6/21 17:05, Minda Chen wrote:
> StarFive JH7110 uboot support PCIe and using rtl8169 network adapter
> PCIe device. But compile warning in rtl8169 driver cause CI test fail.
> So commit this
en
included in [1].
Mason Huo (3):
starfive: pci: Add StarFive JH7110 pcie driver
configs: starfive-jh7110: Add support for PCIe host driver
riscv: dts: starfive: Enable PCIe host controller
Minda Chen (1):
i2c: designware: Add CONFIG_ACPIGEN limitation to designware_i2c_pci.c
...
From: Mason Huo
Add PCIe host driver and nvme driver in configure file.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74 +++
2 files changed, 85 insertions
As the designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain designware i2c and PCI but do not use ACPI,
This file will be can't be compiled. So add ACPIGEN to
designware_i2c_pci.c
Signed-off-by: Minda Chen
---
drivers/i2c/Makefile | 2 ++
1 file changed, 2 inser
From: Mason Huo
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Acked-by: Pali Rohár
---
drivers/pci/Kconfig
For RISC-V architeture, hardware maintain the dcache coherency.
Software do not flush the cache. So even cache-line size larger
than descriptor size, driver can work.
Signed-off-by: Minda Chen
---
drivers/net/rtl8169.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a
While compiling rtl8169.c, There are many "make pointer from
integer without a cast" compile warnings. fix them with
adding cast.
Signed-off-by: Minda Chen
---
drivers/net/rtl8169.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/rtl8169.c
Add PCIe device rtl8169 net adapter driver support.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 59e39c6f9b..7fc1569b59 100644
--- a
aligned size warning
patch 3 add new device ID
patch 4 enable 8169 in JH7110 SoC configs file.
Minda Chen (4):
net: rtl8169: Fix compile warning in rtl8169
net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V
net: rtl8169: Add one device ID 0x8161
configs: starfive-jh7110: Add
Add rtl8169 NIC device ID and reorder the device ID.
Signed-off-by: Minda Chen
---
drivers/net/rtl8169.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 34e4cff1e9..963702777c 100644
--- a/drivers/net/rtl8169.c
+++ b
On 2023/7/21 3:42, Simon Glass wrote:
> Hi,
>
> On Thu, 20 Jul 2023 at 05:24, Minda Chen wrote:
>>
>> As the designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
>> JH7110) contain designware i2c and PCI but do not use ACPI,
>> This file will be can
From: Mason Huo
Add PCIe host driver and nvme driver in configure file.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Reviewed-by: Leo Yu-Chi Liang
---
configs/starfive_visionfive2_defconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/configs
From: Mason Huo
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Acked-by: Pali Rohár
Reviewed-by: Leo Yu-Chi Liang
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Reviewed-by: Leo Yu-Chi Liang
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain Designware i2c and PCI but do not use ACPI,
This file will be can't be compiled. So add a new Kconfig for
designware_i2c_pci.c, which depends on ACPIGEN
Signed-off-by: Minda Chen
---
drivers/i2c/Kconfig
host driver
riscv: dts: starfive: Enable PCIe host controller
Minda Chen (1):
i2c: designware: Add Kconfig for designware_i2c_pci.c
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +
arch/riscv/dts/jh7110.dtsi| 74
configs/starfive_visionfive2_defconfig
xhci_wait_for_event() waiting TRB_TRANSFER event may return
NULL. Checking the return value to avoid crash.
Signed-off-by: Minda Chen
---
drivers/usb/host/xhci-ring.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index
On 2023/10/17 19:20, Marek Vasut wrote:
> On 10/17/23 08:20, Minda Chen wrote:
>> xhci_wait_for_event() waiting TRB_TRANSFER event may return
>> NULL. Checking the return value to avoid crash.
>>
>> Signed-off-by: Minda Chen
>
> How did you trigger this error
On 2023/10/18 10:35, Marek Vasut wrote:
> On 10/18/23 03:22, Minda Chen wrote:
>>
>>
>> On 2023/10/17 19:20, Marek Vasut wrote:
>>> On 10/17/23 08:20, Minda Chen wrote:
>>>> xhci_wait_for_event() waiting TRB_TRANSFER event may return
>>&
On 2023/10/18 18:11, Marek Vasut wrote:
> On 10/18/23 05:46, Minda Chen wrote:
>>
>>
>> On 2023/10/18 10:35, Marek Vasut wrote:
>>> On 10/18/23 03:22, Minda Chen wrote:
>>>>
>>>>
>>>> On 2023/10/17 19:20, Marek Vasut wrote:
>
On 2023/10/18 18:55, Marek Vasut wrote:
> On 10/18/23 12:16, Minda Chen wrote:
>>
>>
>> On 2023/10/18 18:11, Marek Vasut wrote:
>>> On 10/18/23 05:46, Minda Chen wrote:
>>>>
>>>>
>>>> On 2023/10/18 10:35, Marek Vasut wrote:
>&
On 2023/3/24 2:19, Pali Rohár wrote:
> On Thursday 23 March 2023 18:51:38 Minda Chen wrote:
>> On 2023/3/11 1:42, Pali Rohár wrote:
>> > On Friday 10 March 2023 18:36:44 Minda Chen wrote:
>> >> On 2023/3/8 15:31, Pali Rohár wrote:
>> >> > Hello
On 2023/3/25 20:31, Pali Rohár wrote:
> On Friday 24 March 2023 18:57:33 Minda Chen wrote:
>> On 2023/3/24 2:19, Pali Rohár wrote:
>> > On Thursday 23 March 2023 18:51:38 Minda Chen wrote:
>> >> On 2023/3/11 1:42, Pali Rohár wrote:
>> >> > On F
On 2023/3/25 21:22, Pali Rohár wrote:
> On Wednesday 08 March 2023 13:48:33 Minda Chen wrote:
>> From: Mason Huo
>>
>> Enable and add pinctrl configuration for PCIe host controller.
>> Also add JH7110 stg syscon configuration.
>>
>> Signed-off-by:
This patchset needs to apply after patchset in [1]. These PCIe series patches
are based on the JH7110 RISC-V SoC and VisionFive V2 board.
[1]
https://patchwork.ozlabs.org/project/uboot/cover/20230329034224.26545-1-yanhong.w...@starfivetech.com
The PCIe driver depends on gpio, pinctrl, clk and re
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_12a_defconfig | 9 +
configs/starfive_visionfive2_13b_defconfig | 9 +
2 files changed, 18 insertions(+)
diff --git a/configs
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74
From: Mason Huo
Add pcie driver for StarFive JH7110, the driver depends on
starfive gpio, pinctrl, clk and reset driver to do init.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
drivers/pci/Kconfig
On 2023/3/30 1:27, Pali Rohár wrote:
> Hello!
>
> On Wednesday 29 March 2023 18:01:41 Minda Chen wrote:
>> From: Mason Huo
>>
>> Add pcie driver for StarFive JH7110, the driver depends on
>> starfive gpio, pinctrl, clk and reset driver to do init.
>>
&
On 2023/3/31 20:59, Pali Rohár wrote:
> On Friday 31 March 2023 18:35:00 Minda Chen wrote:
>> On 2023/3/30 1:27, Pali Rohár wrote:
>> > Hello!
>> >
>> > On Wednesday 29 March 2023 18:01:41 Minda Chen wrote:
>> >> + /* PCIe PCI Standard Configu
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_12a_defconfig | 10 ++
configs/starfive_visionfive2_13b_defconfig | 10 ++
2 files changed, 20 insertions(+)
diff --git a/configs
This patchset needs to apply after patchset in [1]. These PCIe series patches
are based on the JH7110 RISC-V SoC and VisionFive V2 board.
[1]
https://patchwork.ozlabs.org/project/uboot/cover/20230329034224.26545-1-yanhong.w...@starfivetech.com
The PCIe driver depends on gpio, pinctrl, clk and re
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74
From: Mason Huo
Add pcie driver for StarFive JH7110, the driver depends on
starfive gpio, pinctrl, clk and reset driver to do init.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
drivers/pci/Kconfig
On 2023/4/11 10:55, Bin Meng wrote:
> On Tue, Apr 11, 2023 at 9:03 AM Minda Chen
> wrote:
>>
>> From: Mason Huo
>>
>> Add pcie driver for StarFive JH7110, the driver depends on
>> starfive gpio, pinctrl, clk and reset driver to do init.
>>
>>
On 2023/4/11 13:20, Bin Meng wrote:
> On Tue, Apr 11, 2023 at 11:53 AM Minda Chen
> wrote:
>>
>>
>>
>> On 2023/4/11 10:55, Bin Meng wrote:
>> > On Tue, Apr 11, 2023 at 9:03 AM Minda Chen
>> > wrote:
>> >>
>> >> From
On 2023/4/12 5:29, Pali Rohár wrote:
> Hello!
>
> On Tuesday 11 April 2023 09:02:07 Minda Chen wrote:
>> +int starfive_pcie_config_write(struct udevice *udev, pci_dev_t bdf,
>> + uint offset, ulong value,
>> +
This patchset needs to apply after patchset in [1]. These PCIe series patches
are based on the JH7110 RISC-V SoC and VisionFive V2 board.
[1]
https://patchwork.ozlabs.org/project/uboot/cover/20230329034224.26545-1-yanhong.w...@starfivetech.com
The PCIe driver depends on gpio, pinctrl, clk and re
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_12a_defconfig | 10 ++
configs/starfive_visionfive2_13b_defconfig | 10 ++
2 files changed, 20 insertions(+)
diff --git a/configs
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 88
From: Mason Huo
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
drivers/pci/Kconfig| 13
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
These PCIe series patches are based on the JH7110 RISC-V SoC and VisionFive V2
board.
The PCIe driver depends on gpio, pinctrl, clk and reset driver to do init.
The PCIe dts configuation includes all these setting.
The PCIe drivers codes has been tested on the VisionFive V2 boards.
The test devi
From: Mason Huo
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Acked-by: Pali Rohár
---
drivers/pci/Kconfig
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74
On 2023/7/26 11:07, Leo Liang wrote:
> On Tue, Jul 25, 2023 at 05:46:47PM +0800, Minda Chen wrote:
>> As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
>> JH7110) contain Designware i2c and PCI but do not use ACPI,
>> This file will be can't be comp
--
>> >
>> > Heinrich Schuchardt (2):
>> > riscv: sifive: initialize PCI on Unmatched
>> > acpi: Add missing RISC-V acpi_table header
>> >
>> > Mason Huo (3):
>> > starfive: pci: Add StarFive JH7110 pcie driver
>&g
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen
---
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
b/arch
Get the correct ECAM offset and record the secondary bus
number in Multiple RC case.
Signed-off-by: Minda Chen
---
drivers/pci/pcie_plda_common.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c
index
Some devices need SYS_CACHE_LINE_SIZE macro. Add StarFive
SYS_CACHE_SHIFT_6 to enable it.
Signed-off-by: Minda Chen
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 867cbcbe74..15da2a8559 100644
--- a/arch/riscv/Kconfig
Add PCI_XHCI support to enable usb3-host functions.
Also add usb command and keyboard config.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
StarFive VF2 VTI usb-host controller connect to pcie0 RC.
Enable pcie0 first the enable USB function.
patch1 is Get the correct ECAM offset in multiple PCIe RC.
patch2 is enable pcie0 dts node.
patch3 is enable SYS_CACHE_LINE_SIZE
patch4 is Add VF2 USB related configuration.
Minda Chen (4
On 2023/8/3 12:49, Bin Meng wrote:
> On Thu, Aug 3, 2023 at 11:22 AM Minda Chen
> wrote:
>>
>> Some devices need SYS_CACHE_LINE_SIZE macro. Add StarFive
>> SYS_CACHE_SHIFT_6 to enable it.
>>
>> Signed-off-by: Minda Chen
>> ---
>> arch/ris
Get the correct ECAM offset and record the secondary bus
number in Multiple RC case.
Signed-off-by: Minda Chen
---
drivers/pci/pcie_plda_common.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c
index
StarFive VF2 VLI usb-host controller connect to pcie0 RC.
Enable pcie0 first the enable USB function.
patch1 is Get the correct ECAM offset in multiple PCIe RC.
patch2 is enable pcie0 dts node.
patch3 is enable SYS_CACHELINE_SIZE
patch4 is Add VF2 USB related configuration.
Minda Chen (4):
pci
Add XHCI_PCI to enable usb3-host functions.
Also add usb command and keyboard config.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
Some device driver need SYS_CACHELINE_SIZE macro. Add StarFive
SYS_CACHE_SHIFT_6 to enable it.
Signed-off-by: Minda Chen
---
arch/riscv/cpu/jh7110/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig
index 4d9581165b
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen
---
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
b/arch
>
> Hey,
>
> After going from Vendor SPL/OpenSBI/U-Boot to OpenSBI v1.4++ plus
> v2024.07-rc4 SPL/U-Boot I ran into a boot loop problem relating to
> PCI:
> U-Boot 2024.07-rc4 (Jun 13 2024 - 15:09:34 +0100)
>
> CPU: sifive,u74-mc
> Model: StarFive VisionFive 2 v1.2A
>
en "usb
reset" to
scan usb devices. If you have any issue about this. Also reply it in this.
Thanks.
> On Sun, May 19, 2024 at 11:20 PM Minda Chen
> wrote:
> >
> >
> >
> > >
> > > Hi, there is a compile warning. I don't know why.
> >
>
> Hi,
>
> On Sun, Jun 23, 2024 at 6:28 PM Minda Chen
> wrote:
> >
> >
> >
> > >
> > > Minda, can you test USB Host function on VisionFive2? I guess that
> > > it is connected to the USB-C port. For the boards with JH7110 and
>
set PHY mode before calling cdns3 role start function.
- patch 1-4 correct the code format.(follow Marek's comments.)
- patch 2 Add set 125M clock in PHY init function.
- Add new patch5.
Minda Chen (8):
usb: cdns3: Set USB PHY mode in cdns3_core_init_role(
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate to generic PHY mode and call
generic_phy_set_mode().
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/core.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/usb/cdns3/core.c b/drivers
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 202
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled.
Signed-off-by: Minda Chen
---
drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions
Add cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-starfive.c | 183 +
3 files changed, 192 insertions(+)
create mode 100644 drivers/usb/cdns3
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 174ac24dc7..35137eec59 100644
--- a/configs
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14 +++
drivers/phy/starfive/Makefile | 6
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 52 +++
2 files changed, 57 insertions(+)
diff --git a/arch/riscv
>
> On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt
> wrote:
> >
> > On 7/4/24 07:50, Minda Chen wrote:
> > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > So the codes can be used in visionfive2 and star64 7110 board.
> &g
>
> Hi,
>
> On 04/07/2024 08:50, Minda Chen wrote:
> > USB PHY maybe need to set PHY mode in different USB dr mode. So
> > translate to generic PHY mode and call generic_phy_set_mode().
> >
> > Signed-off-by: Minda Chen
> &
>
>
>
> On 04/07/2024 08:50, Minda Chen wrote:
> > Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic PHY driver
> > and can be used as USB 3.0 driver.
> >
> > Signed-off-by: Minda Chen
> > ---
> > drivers/phy/starfive/Kconfig
>
> On 7/4/24 07:50, Minda Chen wrote:
> > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > So the codes can be used in visionfive2 and star64 7110 board.
> >
> > The driver is almost the same with kernel driver.
> >
> > Test with
ling cdns3 role start function.
- patch 1-4 correct the code format.(follow Marek's comments.)
- patch 2 Add set 125M clock in PHY init function.
- Add new patch5.
Minda Chen (8):
usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()
phy: starfive: Add Starfi
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/drd.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/usb/cdns3/drd.c b/drivers
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
Reviewed-by: Roger Quadros
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14 +++
drivers/phy/starfive
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 237
Add cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-starfive.c | 191 +
3 files changed, 200 insertions(+)
create mode 100644 drivers/usb/cdns3
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled.
Signed-off-by: Minda Chen
---
drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 52 +++
2 files changed, 57 insertions(+)
diff --git a/arch/riscv
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 174ac24dc7..35137eec59 100644
--- a/configs
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
>
> On Sat, Jul 20, 2024 at 6:47 PM E Shattow wrote:
> >
> > Hi, I am testing on Milk-V Mars CM Lite, and I add to these devicetree
> > changes at runtime from board/starfive/visionfive2/spl.c
> >
> > On Thu, Jul 18, 2024 at 6:38 PM Minda Chen
> wrote:
>
> On Mon, Jul 22, 2024 at 6:29 PM Minda Chen
> wrote:
> >
> >
> >
> > >
> > > On Sat, Jul 20, 2024 at 6:47 PM E Shattow wrote:
> > > >
> > > > Hi, I am testing on Milk-V Mars CM Lite, and I add to these
> > >
> -邮件原件-
> 发件人: E Shattow
> 发送时间: 2024年7月23日 21:06
> 收件人: Minda Chen
> 抄送: Marek Vasut ; Tom Rini ; Roger
> Quadros ; Neil Armstrong ;
> Alexey Romanov ; Sumit Garg
> ; Mark Kettenis ; Nishanth
> Menon ; Rick Chen ; Leo Yu-Chi Liang
> ; u-boot@list
>
> For some JH7110 boards, USB host overcurent pin is not reserved, To make USB
> host work, overcurrent pin must be disabled. So set the pin default disabled.
>
> Signed-off-by: Minda Chen
> ---
> drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +--
>
> USB PHY maybe need to set PHY mode in different USB dr mode. So translate
> USB PHY mode to generic PHY mode and call generic_phy_set_mode().
>
> Signed-off-by: Minda Chen
> ---
> drivers/usb/cdns3/drd.c | 14 ++
> 1 file changed, 14 insertions(+)
&
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