>> If it is right or wrong to use that as an MTD is a matter of opinion.
>
> I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add this
to the mtd subsystem? One is saving space, but I agree with Marek, this
isn't a val
Am 2023-02-21 11:42, schrieb Ulf Samuelsson:
Den 2023-02-21 kl. 10:08, skrev Michael Walle:
If it is right or wrong to use that as an MTD is a matter of
opinion.
I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add
Sorry, I didn't follow this too closely. Do you have some pointers?
I just saw your latest mail. Thanks.
-michael
If the use of MTD is restricted to passive serial, this is OK with me.
Yeah, but that is not how upstream things work. You need to also think
of any other use cases.
These are the things I want to achieve.
* transfer data using the SPI driver and not use board files.
For that, the FPGA shou
Hi,
This series adjusts binman to enforce just 4 extensions for output
images:
.bin
.rom
.itb
.img
Other extensions will produce an error. With this rule observed,
buildman
can keep the required files.
How does this work? I didn't get all the patches from this series, which
m
Am 2023-08-24 05:02, schrieb Simon Glass:
A '.update' extension is not allowed anymore, so change it.
Signed-off-by: Simon Glass
Looks good to me, as it is just an intermediate binary.
Acked-by: Michael Walle
The mails are bouncing with
550 5.1.1 User Unknown (in reply to RCPT TO command)
Remove the entry and mark the ARM STM STV0991 arch as Orphan.
Signed-off-by: Michael Walle
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
CCing other ST people, maybe someone want to take over instead
Hi,
> This series adjusts binman to enforce just 4 extensions for output
> images:
>
>.bin
>.rom
>.itb
>.img
>
> Other extensions will produce an error. With this rule observed,
> buildman
> can keep the required files.
How does this work? I didn't get all the patches from this
Hi,
The mails are bouncing with
550 5.1.1 User Unknown (in reply to RCPT TO command)
Remove the entry and mark the ARM STM STV0991 arch as Orphan.
Signed-off-by: Michael Walle
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
CCing other ST people, maybe someone want to take over instead
Hi!
> On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
> > On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár wrote:
> > >
> > > Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> > > to correct SOC/platform value. So do not overwrite it in board config
> > > include files.
Am 2022-08-16 20:17, schrieb Pali Rohár:
> > If I understand correctly
> > the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
> > boards were able to override it to reflect the hardware configuration.
>
> Anyway, I think that this patch should not cause issue as it is changing
> on
Am 2022-08-16 21:38, schrieb Pali Rohár:
On Tuesday 16 August 2022 20:17:08 Pali Rohár wrote:
Hello!
On Tuesday 16 August 2022 11:37:48 Michael Walle wrote:
> Hi!
>
> > On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
> > > On Sun, Aug 1, 2021 at 12:23
Am 2022-08-16 22:00, schrieb Pali Rohár:
Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200
MHz.
This information is undocumented in public Marvell Kirkwood Functional
Specifications [2], but is available in Linux v3.15 kirkwood code [1].
Commit 8ac303d49f89 ("arm: kirkwood:
Am 2022-08-17 00:39, schrieb Pali Rohár:
On Wednesday 17 August 2022 00:14:20 Pali Rohár wrote:
On Tuesday 16 August 2022 23:34:13 Michael Walle wrote:
> Am 2022-08-16 22:00, schrieb Pali Rohár:
> > Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200
> >
Am 2022-08-17 10:36, schrieb Pali Rohár:
On Wednesday 17 August 2022 01:23:34 Michael Walle wrote:
Am 2022-08-17 00:39, schrieb Pali Rohár:
> On Wednesday 17 August 2022 00:14:20 Pali Rohár wrote:
> > On Tuesday 16 August 2022 23:34:13 Michael Walle wrote:
> > > Am 2022-08
Am 2022-08-17 10:43, schrieb Michael Walle:
3) There is a chance that the timer code is actually pretty
straight-forward
and we don't need DM_CLK.
FWIW I'm working on 3) at the moment. So if that works out, we can use
CONFIG_TIMER on kirkwood and then apply your initial patch. As
Convert the Buffalo Linkstation LS-CHLv2 and XHL boards to DM_GPIO,
DM_ETH, DM_SERIAL and CONFIG_TIMER.
Patches 01-02 fix TCLK handling on the kirkwood SoC if the clock is
166MHz.
Patches 03-04 add CONFIG_TIMER support for kirkwood/mvebu.
Patches 05-21 will then update the lsxl board
Michael
If we switch to CONFIG_TIMER, we don't need the legacy timer macros and
functions anymore. Add the proper guards to exclude them from compiling.
Cc: Pali Rohár
Signed-off-by: Michael Walle
---
arch/arm/mach-kirkwood/include/mach/config.h | 2 ++
arch/arm/mach-mvebu/Makefile
: Pali Rohár
Signed-off-by: Michael Walle
---
lib/time.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/lib/time.c b/lib/time.c
index 96074b84af..bbf191f673 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -47,12 +47,15 @@ ulong timer_get_boot_us(void
From: Pali Rohár
Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz.
This information is undocumented in public Marvell Kirkwood Functional
Specifications [2], but is available in Linux v3.15 kirkwood code [1].
Commit 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_S
Add timer support for Kirkwood and MVEBU devices.
Cc: Pali Rohár
Signed-off-by: Michael Walle
---
drivers/timer/Kconfig | 6
drivers/timer/Makefile | 1 +
drivers/timer/orion-timer.c | 63 +
3 files changed, 70 insertions(+)
create mode
The gpio-button driver depends on DM_GPIO, add it to Kconfig to avoid
build errors.
Signed-off-by: Michael Walle
---
drivers/button/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/button/Kconfig b/drivers/button/Kconfig
index 6db3c5e93a..8ce2de37d6 100644
--- a/drivers
The board only has a 4Mbit flash and two sectors are reserved for the
u-boot environment and the device tree.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 2 ++
configs/lsxhl_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/lschlv2_defconfig b/configs
This is not needed. The user can do a "env default -f -a".
Signed-off-by: Michael Walle
---
include/configs/lsxl.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index e1108619f2..db5f7a93f9 100644
--- a/include/configs/lsxl.h
+++
Make the binary smaller by removing unused features.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 3 +--
configs/lsxhl_defconfig | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index cabedeb460
This is not needed. The user can force setting the variables with
"setenv -f".
Signed-off-by: Michael Walle
---
board/buffalo/lsxl/lsxl.c | 4
configs/lschlv2_defconfig | 1 -
configs/lsxhl_defconfig | 1 -
3 files changed, 6 deletions(-)
diff --git a/board/buffalo/lsxl/lsxl
Cleanup the included header files in the board code. These are all
leftovers from earlier days.
Signed-off-by: Michael Walle
---
board/buffalo/lsxl/lsxl.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 106d46d436..42221eef3a
The board code needs this to be set. Otherwise, the recovery mechanism
doesn't work. Therefore, select this option automatically with the
board.
Signed-off-by: Michael Walle
---
arch/arm/mach-kirkwood/Kconfig | 1 +
board/buffalo/lsxl/lsxl.c | 2 --
configs/lschlv2_defconfig
Drop our own CONFIG_FDTFILE handling in favor of the generic
CONFIG_DEFAULT_FDT_FILE one.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 1 +
configs/lsxhl_defconfig | 1 +
include/configs/lsxl.h| 14 +++---
3 files changed, 5 insertions(+), 11 deletions(-)
diff
We can load the ramdisk as the last step. This way we don't have to set
the intermediate variable 'ramdisk_len' and can remove it.
Signed-off-by: Michael Walle
---
include/configs/lsxl.h | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/include/c
use the default early malloc size.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 4 ++--
configs/lsxhl_defconfig | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 4e356fb150..57e54130d2 10064
Enable the orion timer driver and we are good.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 2 ++
configs/lsxhl_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 57e54130d2..e9cc632696 100644
--- a
-boot.dtsi.
Signed-off-by: Michael Walle
---
arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi | 4
arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi | 4
2 files changed, 8 insertions(+)
diff --git a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
index 208b02c9da
Update the board's README to reflect all the recent changes.
Signed-off-by: Michael Walle
---
board/buffalo/lsxl/README | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/board/buffalo/lsxl/README b/board/buffalo/lsxl/README
index fffb1
We still need to be able to boot legacy images. Esp. the debian
installer will have a kernel with an appended DTB.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 3 +++
configs/lsxhl_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/configs/lschlv2_defconfig b
figure the environment. Instead the network
console is only enabled when the push button is pressed during boot.
Signed-off-by: Michael Walle
---
arch/arm/mach-kirkwood/Kconfig | 1 +
board/buffalo/lsxl/lsxl.c | 14 --
configs/lschlv2_defconfig | 1 -
configs/lsxhl_defconfig
which makes debugging a bit harder. Also, there is no GPIO fan
driver for now.
Signed-off-by: Michael Walle
---
arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi | 9 ++
arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi | 9 ++
board/buffalo/lsxl/lsxl.c | 140 +-
co
Just enabling the Kconfig option for DM_ETH and DM_MDIO is enough.
Additionally, we can remove the old hardcoded config.
Signed-off-by: Michael Walle
---
configs/lschlv2_defconfig | 2 ++
configs/lsxhl_defconfig | 2 ++
include/configs/lsxl.h| 8
3 files changed, 4 insertions
Use the common kernel_addr_r, ramdisk_addr_r and fdt_addr_r variable
names.
Signed-off-by: Michael Walle
---
include/configs/lsxl.h | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
>On 8/18/2022 6:40 AM, Tom Rini wrote:
>> On Wed, Aug 17, 2022 at 02:26:32AM +, Peng Fan (OSS) wrote:
>>
>>> Hi Tom,
>>>
>>> Please pull fsl-qoriq-2022-8-17
>>>
>>> CI:
>>> https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/13155
>>
>> First, applied to u-boot/master, than
- dynamic prompts
- various cleanups
changes since v2:
- only mark secure ram on layerscape SoCs which actually have it.
changes since v1:
- rebased onto the latest master
Michael Walle (5):
armv8: layerscape: spl: mark OCRAM as non-secure
board: sl28: implement additional bootsources
board
By default the OCRAM is marked as secure. While the SPL runs in EL3 and
thus can access it, DMA devices cannot. Mark the whole OCRAM as
non-secure.
This will fix MMC and SD card boot on LS1028A when using SPL instead of
TF-A.
Signed-off-by: Michael Walle
---
arch/arm/cpu/armv8/fsl-layerscape
The board is able to boot from the following source:
- user-updateble SPI flash
- write-protected part of the same SPI flash
- eMMC
- SD card
Implement the needed function hooks to support all of these boot
sources.
Signed-off-by: Michael Walle
---
board/kontron/sl28/common.c| 22
Depending on the boot source, set different CLI prompts. This will help
the user to figure out in which mode the bootloader was started. There
are two special modes: failsafe and SDHC boot.
Signed-off-by: Michael Walle
---
board/kontron/sl28/sl28.c | 20
configs
The frequency of the system counter is static which is given by the
COUNTER_FREQUENCY option. Remove COUNTER_FREQUENCY_REAL.
Signed-off-by: Michael Walle
---
include/configs/kontron_sl28.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/kontron_sl28.h b/include/configs
During startup the SPL will print where the u-boot proper is read from.
Instead of using the default names, provide more user friendly names.
Signed-off-by: Michael Walle
---
board/kontron/sl28/spl.c | 16
1 file changed, 16 insertions(+)
diff --git a/board/kontron/sl28/spl.c
Am 2022-08-23 17:01, schrieb Stefan Roese:
Applied to u-boot-marvell/master, with my small fix for the ds109
board
Great! Thanks, Stefan.
-michael
Hi,
>On 24.08.22 00:33, Pali Rohár wrote:
>> Hello Stefan! Now when U-Boot contains new orion-timer.c driver, which
>> Michael wrote, I think that it mvebu platform should switch to use it.
>> Because build process for armada boards prints deprecation warning that
>> new timer is not being used. C
Am 2022-08-30 13:53, schrieb Stefan Roese:
Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE
enabled, like pogo_v4.
Signed-off-by: Stefan Roese
---
drivers/timer/orion-timer.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/timer/orion-ti
Am 2022-08-30 13:53, schrieb Stefan Roese:
Now that the new timer support is available for these platforms, let's
select this IF for all these platforms. This way it's not necessary
that each board changes it's config header.
Signed-off-by: Stefan Roese
---
arch/arm/Kconfig
Am 2022-09-01 10:53, schrieb Stefan Roese:
As there is no Orion5 based target in mainline U-Boot any more, let's
completely remove the support for this pretty old Marvell platform.
Signed-off-by: Stefan Roese
Cc: Tony Dinh
Cc: Pali Rohár
Cc: Michael Walle
--- a/drivers/net/Kconfig
Am 2022-09-02 08:25, schrieb Stefan Roese:
While testing on some Kirkwood platforms it was noticed that the timer
did not function correctly all the time. The driver did not correctly
handle 32bit timer value wrap arounds. Using the timer_conv_64()
conversion function fixes this issue.
Fixes: e
Am 2022-09-04 02:02, schrieb Tony Dinh:
Hi Stefan,
Sorry, that message was prematurely sent (fat finger). Please see the
continuation below.
On Sat, Sep 3, 2022 at 4:43 PM Tony Dinh wrote:
Hi Stefan,
On Sat, Sep 3, 2022 at 3:44 AM Stefan Roese wrote:
>
> Hi Tony,
>
> On 03.09.22 11:44, Ton
Hi,
>> Add a compatible string for binman, so we can extend fixed-partitions
>> in various ways.
>
> I've been thinking at the proper way to describe the binman partitions.
> I am wondering if we should really extend the fixed-partitions
> schema. This description is really basic and kind of supp
Hi,
>> Add a compatible string for binman, so we can extend fixed-partitions
>> in various ways.
>
> I've been thinking at the proper way to describe the binman partitions.
> I am wondering if we should really extend the fixed-partitions
> schema. This description is really basic and kind of sup
Hi,
>> >> Add a compatible string for binman, so we can extend fixed-partitions
>> >> in various ways.
>> >
>> > I've been thinking at the proper way to describe the binman partitions.
>> > I am wondering if we should really extend the fixed-partitions
>> > schema. This description is really bas
Hi,
I'm still not sure why that compatible is needed. Also I'd need to
change
the label which might break user space apps looking for that specific
name.
Also, our board might have u-boot/spl or u-boot/spl/bl31/bl32, right
now
that's something which depends on an u-boot configuration variable
time.
Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.
Signed-off-by: Michael Walle
---
arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts | 3 ++-
arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts | 3 +
Am 2021-02-24 17:30, schrieb Michael Walle:
If the environment variable "ethact" is not set, the first device in
the
uclass is returned. This depends on the probing order of the ethernet
devices. Moreover it is not not configurable at all.
Try to return the ethernet device with seq
Am 2021-02-25 16:51, schrieb Michael Walle:
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is
from
the linux tree:
$ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l
0
$ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l
633
In u
Hi,
> + printf("Disabling WDT\n");
> + writel(0, 0x10007000);
Please don't use magic numbers. Also, I guess this should be a
real watchdog driver and u-boot will take care of disabling it
if the user wants to.
> +
> + printf("Enabling SCP SRAM\n");
> + for (unsigned int val = 0xF
>> On 12/9/22 04:55, Tony Dinh wrote:
>> > Hi Simon et al,
>> >
>> > (Resend to include u-boot mailing list)
>> >
>> > I'm in the process of converting Kirkwood boards to use DM SERIAL. I
>> > could not seem to get it to work, having tried adding
>> > CONFIG_DM_SERIAL, and also playing with various
The compiler complains about the missing declaration of print_size():
net/wget.c:415:3: warning: implicit declaration of function ‘print_size’
[-Wimplicit-function-declaration]
Fix it.
Signed-off-by: Michael Walle
---
net/wget.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/wget.c b
The wget command uses TCP, but fails to select PROT_TCP in Kconfig.
Instead it selects the non-existing symbol TCP. Fix the typo.
Signed-off-by: Michael Walle
---
cmd/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d93731f2af
So leaving 4-byte switched by UBoot SPI chip made it unusable to
RockChip Bootrom. I found this by dumping Bootrom and decompiling it.
>>
>> Sync with engineer working on these area, and get below:
>>
>> Yes, this "4-byte addressing problem in SPI" issue is in SoCs including
>> rk3328, th
Hi,
Am 2023-01-05 18:10, schrieb Rafał Miłecki:
From: Rafał Miłecki
Sometimes reading NVMEM cell value involves some data reformatting. It
requires passing updated size value to the caller. Support that.
Wouldn't it make more sense to convert that driver to
proper nvmem layouts, where
(1) y
Hi,
Am 2023-01-10 11:54, schrieb Rafał Miłecki:
From: Rafał Miłecki
U-Boot environment variables are stored in ASCII format so "ethaddr"
requires parsing into binary to make it work with Ethernet interfaces.
This includes support for indexes to support #nvmem-cell-cells = <1>.
Signed-off-by:
Hi Heinrich,
> Any runtime device drivers for variable storage should not be in the
> U-Boot runtime but live in the secure world (e.g. OP-TEE) FF-A is the
> new ARM protocol for talking to the secure world and hence fits into
> the picture.
What if I just want a simple embedded boot stack where
Hi Mark,
> Any runtime device drivers for variable storage should not be in the
> U-Boot runtime but live in the secure world (e.g. OP-TEE) FF-A is the
> new ARM protocol for talking to the secure world and hence fits into
> the picture.
What if I just want a simple embedded boot stack where I
On Tue Jun 4, 2024 at 9:47 AM CEST, Christian Loehle wrote:
> On 6/3/24 22:28, Tim Harvey wrote:
> > On Mon, Jun 3, 2024 at 1:18 AM Christian Loehle
> > wrote:
> >>
> >> On 5/31/24 21:47, Tim Harvey wrote:
> >>> Greetings,
> >>>
> >>> I'm seeing an issue on an imx8mm board (imx8mm-venice-gw73xx) w
Hi,
On Mon May 13, 2024 at 10:56 PM CEST, Michael Walle wrote:
> Add network support for the V3s which only supports the internal
> PHY. Adding support was straight forward. The emac driver just needs
> the compatible string and some platform data and the clock driver
> needs to know
On Tue May 14, 2024 at 1:43 AM CEST, Michael Walle wrote:
> The V3s is identical regarding register layout, clocks and resets to
> the sun6i variants. Therefore, we can just add the MACH_SUN8I_V3S to
> the sun6i compatible ones.
>
> SPI boot was tested on a custom board with a Gig
Due to the lazy probing, the gadget driver might not be probed when the
u-boot cli is active. In this case the "ums" command won't work, for
example. If enabled, probe the USB gadget during board_init().
Signed-off-by: Michael Walle
---
board/sunxi/board.c | 4
1 file change
CDR1 and CDR2 handling. By fixing that
I achieved loading speeds of about 1.5MB/s.
Michael Walle (2):
spi: sunxi: drop max_hz handling
spi: sunxi: fix clock divider calculation for max frequency setting
drivers/spi/spi-sunxi.c | 28 +++-
1 file changed, 15 insertions
flash reads are very slow with just about 215kb/s.
In fact, the SPI uclass will already take care of everything and we just
have to clamp the frequency to the values the driver/hardware supports.
Thus, drop the whole max_hz handling.
Signed-off-by: Michael Walle
---
drivers/
.
While at it, correct the comment above the calculation.
Signed-off-by: Michael Walle
---
drivers/spi/spi-sunxi.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index bfb402902b8..3048ab0ecf7 100644
--- a/drivers/spi/spi
Right now, the maximal transfer speed from an SPI flash on a V3s is
about 240kb/s. That is pretty slow. It turns out, that due to an
error u-boot is setting the maximum frequency to 1MHz. By fixing
that another bug is unearthed: one cannot set a clock divider of 1:1
due to the handling between CDR
whole max_hz handling.
>
> Looks good to me, I verified this by timing the read, this patch indeed
> significantly increases the performance. Also changing the limit in the
> DT gets reflected in the driver and in the read speed. Also verified
> that the values read from the SPI flash a
> > - if ((div / 2) <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
> > + if (div != 1 && ((div / 2) <= (SUN4I_CLK_CTL_CDR2_MASK + 1))) {
> > div /= 2;
>
> This is still not fully correct, is it? If I ask for 10 MHz, the
> algorithm should select 8 MHz (24/3) or actually 6 MHz (24/4), but it
>
igns the CDR2 calculation with the linux driver.
Suggested-by: Andre Przywara
Signed-off-by: Michael Walle
---
drivers/spi/spi-sunxi.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index bfb402902b8..f110a8b7658 100644
.
While at it, correct the comment above the calculation.
Signed-off-by: Michael Walle
---
drivers/spi/spi-sunxi.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index f110a8b7658..81f1298adea 100644
--- a/drivers/spi/spi
error in the (valid) case that there is no ramdisk in the image.
With this, I'm able to boot a linux kernel using fastboot again:
fastboot --base 0x4100 --header-version 2 --dtb /path/to/dtb \
--cmdline "root=/dev/mmcblk0p1 rootwait" boot path/to/Image
Signed-off-by: Micha
oot again:
fastboot --base 0x4100 --header-version 2 --dtb /path/to/dtb \
--cmdline "root=/dev/mmcblk0p1 rootwait" boot path/to/Image
Signed-off-by: Michael Walle
---
boot/image-android.c | 7 +++
boot/image-board.c | 4 +++-
include/image.h | 2 +-
3 files changed,
>> This is simply awesome, but I see one possible issue -- the need to have
>> proper environment variables defined for a particular board or device,
>> to make the buttons work as expected. Obviously, those environment
>> variables can be absent or can become missing for numerous reasons.
>
> Is
Hi,
Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide
the fallback defaults. However, the users can still mess the things
up,
but again, they can do that already in many places.
I disagree. In my case that is a last resort recovery. And it should
work in any case. Even if the
Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide
the fallback defaults. However, the users can still mess the things
up,
but again, they can do that already in many places.
I disagree. In my case that is a last resort recovery. And it should
work in any case. Even if the user
+static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
..
+ printf("Caution! OTP data bits can't be erased! Continue (y/n)?\n");
Please note, that with current SPI-NOR flashes this is not true and
there is usually some
Hi,
+static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int
argc,
+ char *const argv[])
+{
..
+ printf("Caution! OTP data bits can't be erased! Continue
(y/n)?\n");
Please note, that with current SPI-NOR flashes this is not true and
there is usually some kind of
On Wed May 1, 2024 at 4:42 AM CEST, Tom Rini wrote:
> Remove from this board vendor directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini
Acked-by: Michael Walle
On Wed May 1, 2024 at 4:41 AM CEST, Tom Rini wrote:
> Remove from this board vendor directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini
Acked-by: Michael Walle
custom board.
Michael Walle (2):
clk: sunxi: add EMAC and EPHY clocks and resets for the V3s SoC
net: sun8i_emac: add support for the V3s
drivers/clk/sunxi/clk_v3s.c | 6 ++
drivers/net/sun8i_emac.c| 7 +++
2 files changed, 13 insertions(+)
--
2.39.2
Add the clock gate registers as well as the reset register bits for the
EMAC and EPHY for the V3s. These are needed by the sun8i network driver.
Signed-off-by: Michael Walle
---
drivers/clk/sunxi/clk_v3s.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/sunxi/clk_v3s.c b
Add the compatible string for the emac found on the V3s SoC. The SoC
only supports the internal PHY. There are no (R)MII signals on any pins.
Signed-off-by: Michael Walle
---
drivers/net/sun8i_emac.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers
The V3s is identical regarding register layout, clocks and resets to
the sun6i variants. Therefore, we can just add the MACH_SUN8I_V3S to
the sun6i compatible ones.
SPI boot was tested on a custom board with a Gigadevice GD25Q64 8MiB
SPI flash.
Signed-off-by: Michael Walle
---
arch/arm/mach
Hi,
On Thu Mar 28, 2024 at 12:18 PM CET, Neha Malcom Francis wrote:
> On 27-Mar-24 8:03 PM, Michael Walle wrote:
> > On Wed Mar 27, 2024 at 8:01 AM CET, Neha Malcom Francis wrote:
> >> On 26/03/24 19:18, Michael Walle wrote:
> >>> On Fri Mar 22, 2024 at 2:10 PM
On Thu Mar 28, 2024 at 4:09 PM CET, Tom Rini wrote:
> On Mon, Jan 01, 2024 at 10:07:47PM +0100, Marek Vasut wrote:
>
> > Configure LEDs on BCM54210E so they would blink on activity
> > and indicate link speed. Without this the LEDs are always on
> > if cable is plugged in.
> >
> > Signed-off-by: M
size.
Fixes: 38922b1f4acc ("net: ti: am65-cpsw: Add support for multi port
independent MAC mode")
Signed-off-by: Michael Walle
---
drivers/net/ti/am65-cpsw-nuss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti
Hi,
> > > > > And on top of that, it will just be a base board and there will
> > > > > likely be some carrier device trees (overlay? I'm not sure yet).
> > > > >
> > > > > As far as I can tell, you've put the memory configuration into the
> > > > > device tree, so I'll probably need to switch be
Hi,
On Thu Apr 4, 2024 at 11:10 AM CEST, Neha Malcom Francis wrote:
> But again in the interest of time... this would mean this cleaning up effort
> be
> kept on hold. If we can agree to move to using the generator later as the
> final
> solution, can we pick up this series for now?
Agreed. I
Hi,
On Fri Apr 12, 2024 at 5:03 AM CEST, Neha Malcom Francis wrote:
> On 05/04/24 13:12, Michael Walle wrote:
> > On Thu Apr 4, 2024 at 11:10 AM CEST, Neha Malcom Francis wrote:
> >> But again in the interest of time... this would mean this cleaning up
> >> effort be
&
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