On Mon, Aug 19, 2024 at 06:17:02PM +0800, Chia-Wei Wang wrote:
> Define and parse the header of the First Mutable Code (FMC)
> of AST2700 SoCs at runtime phase.
>
> The FMC header contains the information to load prebuilt binaries
> required for device initialization such as DRAM and VGA.
>
> Sig
On Mon, Aug 19, 2024 at 06:17:03PM +0800, Chia-Wei Wang wrote:
> Add driver for AST2700 to initialize DRAM in SPL.
>
> This patch also refactors the Kconfig dependency of
> Aspeed DRAM drivers as some of them are shared among
> the file structures of RV and ARM ISAs.
>
> Signed-off-by: Chia-Wei W
On Mon, Aug 19, 2024 at 06:17:04PM +0800, Chia-Wei Wang wrote:
> Enable the driver support for the DRAM and timer devices.
>
> Signed-off-by: Chia-Wei Wang
> ---
> configs/ibex-ast2700_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
Hi Tom,
The following changes since commit 7b2d4ecd7f6593771dd3118c8bab525d727a91e0:
Merge branch 'master-spi-fixes' of
https://source.denx.de/u-boot/custodians/u-boot-sh (2024-09-09 13:54:10 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-ris
On Thu, Jul 18, 2024 at 12:33:22PM +0800, Kongyang Liu wrote:
> Add basic support for SpacemiT's Banana Pi F3 board
>
> Signed-off-by: Kongyang Liu
> Reviewed-by: Leo Yu-Chi Liang
> ---
>
> Changes in v2:
> - Change license to GPL-2.0-or-later
> - Add memory node for dts
> - Add ft_board_setup
On Tue, Sep 10, 2024 at 03:49:34PM +0800, Jacky Chou wrote:
> The AST2700 is the 7th generation SoC from Aspeed.
> And use the driver to support clause 22 access.
>
> Signed-off-by: Jacky Chou
> ---
> drivers/net/aspeed_mdio.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Lian
Hi Tom,
The following changes since commit 78d898eec080b02059c8dc09318b8761044fea85:
Merge patch series "phycore-am62/4: Add more boot sources" (2024-09-10
14:56:12 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git next
for you to fet
Hi Tom,
The following changes since commit bfdfc6c12e8ca68fff1a7ed3892c180143a6a0ef:
Revert "acpi_table: Fix coverity defect in acpi_write_spcr" (2024-10-28
20:53:34 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch
On Thu, Aug 08, 2024 at 02:14:17AM +, Anton Blanchard wrote:
> If we take an exception before u-boot is relocated, there's a good
> chance we will end up in an endless loop of exceptions because resume is
> invalid until after relocation.
>
> Signed-off-by: Anton Blanchard
> ---
> arch/riscv
On Wed, Oct 23, 2024 at 11:17:53AM +0100, Conor Dooley wrote:
> From: Conor Dooley
>
> The clock driver for PolarFire SoC now requires syscon and regmap
> features, so imply them to preserve implication of the clock driver.
>
> Signed-off-by: Conor Dooley
> ---
> board/microchip/mpfs_icicle/Kc
On Wed, Oct 23, 2024 at 11:17:52AM +0100, Conor Dooley wrote:
> From: Conor Dooley
>
> Why get a devicetree description wrong once when you can get it wrong
> twice? The original mistake, which the driver supports was failing to
> describe the main PLL that the "cfg" and "periph" clocks parented
Hi Tom,
On Mon, Oct 28, 2024 at 09:20:10AM -0600, Tom Rini wrote:
> [EXTERNAL MAIL]
> Date: Mon, 28 Oct 2024 09:20:10 -0600
> From: Tom Rini
> To: Leo Liang
> Cc: u-boot@lists.denx.de, r...@andestech.com
> Subject: Re: [GIT PULL] u-boot-riscv/next
>
> On Mon, Oct 28,
On Thu, Oct 17, 2024 at 08:16:49PM +0200, Heinrich Schuchardt wrote:
> * Messages written with log_err() should be terminated with linefeed.
> * Spell device-tree with hyphen as elsewhere in U-Boot.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/lib/fdt_fixup.c | 2 +-
> 1 file change
Hi Mayuresh,
On Fri, Aug 23, 2024 at 09:41:25AM +, Mayuresh Chitale wrote:
> Add insn-def.h which is similar to that in linux and contains the macros
> to generate any instruction of type 'I' using the assembler's .insn
> directive.
>
> Signed-off-by: Mayuresh Chitale
> ---
> arch/riscv/inc
On Sat, Oct 26, 2024 at 04:35:28AM -0700, E Shattow wrote:
> Fix bad delay values copied from vendor board support package of Star64,
> improves
> performance and reliability of bottom network port.
>
> Fixes: 7ebf7e77c0616ef0d2f58cc1684c230f656bd3d6
> Signed-off-by: E Shattow
> ---
> board/sta
On Sat, Oct 26, 2024 at 05:40:15AM -0700, E Shattow wrote:
> Milk-V Mars vendor board support package has value 0xa (multiplier=150) for
> both
> rx and tx delay. Upstream Linux has this as 1500 for both rx and tx delay.
> There
> is no documentation for why this should remain 1900 so correct it
On Sat, Oct 19, 2024 at 10:31:09AM +0200, Heinrich Schuchardt wrote:
> When moving from vendor U-Boot to the upstream U-Boot it is necessary to
> reset the environment.
>
> Provide the 'env erase' sub-command.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> configs/starfive_visionfive2_defconfig
On Fri, Aug 23, 2024 at 09:41:26AM +, Mayuresh Chitale wrote:
> Define CBO inval and flush instructions and use those for the
> dcache inval and flush operations respectively.
>
> Signed-off-by: Mayuresh Chitale
> ---
> arch/riscv/Kconfig | 4 ++
> arch/riscv/lib/cache.c | 96 ++
Hi Tom,
The following changes since commit 28dc47038edc4e93f32d75a357131bcf01a18d85:
Merge branch 'u-boot-nand-20241005' of
https://gitlab.denx.de/u-boot/custodians/u-boot-nand-flash into next
(2024-10-05 11:19:24 -0600)
are available in the Git repository at:
https://source.denx.de/u-boo
Hi Tom,
The following changes since commit 3df6145db0ed3430a2af089db5a82372bea3f4d5:
x86: Missed removal of CMD_BOOTEFI_HELLO_COMPILE (2024-10-27 20:11:36 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up t
Hi Lekkit,
On Sun, Sep 22, 2024 at 01:11:01PM +0300, lek...@at.encryp.ch wrote:
> [EXTERNAL MAIL]
>
> From: LekKit <50500857+lek...@users.noreply.github.com>
>
> Enable framebuffer for better virtual machine integration.
> Some guests need EFI FB to work properly.
> ---
> board/emulation/qemu-r
On Sun, Sep 22, 2024 at 01:11:00PM +0300, lek...@at.encryp.ch wrote:
> [EXTERNAL MAIL]
>
> From: LekKit <50500857+lek...@users.noreply.github.com>
>
> QEMU supports NVMe devices, but U-Boot only tries to boot from Virtio.
> This is problematic when explicitly using NVMe, so fix that.
>
> Additio
On Sun, Sep 22, 2024 at 01:11:01PM +0300, lek...@at.encryp.ch wrote:
> [EXTERNAL MAIL]
>
> From: LekKit <50500857+lek...@users.noreply.github.com>
>
> Enable framebuffer for better virtual machine integration.
> Some guests need EFI FB to work properly.
> ---
> board/emulation/qemu-riscv/Kconfig
On Sun, Sep 22, 2024 at 01:11:02PM +0300, lek...@at.encryp.ch wrote:
> [EXTERNAL MAIL]
>
> From: LekKit <50500857+lek...@users.noreply.github.com>
>
> This patch series enables full RVVM virtual machine support which was
> earlier inconveniently provided as out-of-tree patchset.
>
> This should
On Tue, Sep 17, 2024 at 10:10:36AM +0200, Heinrich Schuchardt wrote:
> The SBI 3.0 specification [1] adds the following extensions:
>
> * Firmware Features Extension
> * Message Proxy Extension
>
> Let the sbi command detect their availability.
>
> The Firmware Features Extension is already impl
On Fri, Sep 20, 2024 at 12:05:23PM +0300, biguncle...@gmail.com wrote:
> From: Maksim Kiselev
>
> Starting with Linux commit 7569486d79ae ("gpio: dwapb: Add ngpios
> DT-property support") the "snps,nr-gpios" property was marked
> as deprecated.
>
> And since all newly added dw-apb-gpio nodes are
On Fri, Sep 20, 2024 at 12:05:24PM +0300, biguncle...@gmail.com wrote:
> From: Maksim Kiselev
>
> Enable GPIO command and DWAPB_GPIO driver for LicheePi4A board.
>
> Signed-off-by: Maksim Kiselev
> ---
> configs/th1520_lpi4a_defconfig | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Hi Tom,
The following changes since commit 56accc56b9aab87ef4809ccc588e1257969cd271:
bios_emulator: fix first argument of pci_{read,write}_config_* function calls
(2024-11-04 18:01:58 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
On Wed, Oct 30, 2024 at 03:58:36PM +0800, Nick Hu wrote:
> Enable the clock gating bit of ccache when the platform has the ccache0.
>
> Signed-off-by: Nick Hu
> ---
> drivers/cache/cache-sifive-ccache.c | 33 ++---
> 1 file changed, 30 insertions(+), 3 deletions(-)
Revie
On Fri, Nov 01, 2024 at 10:49:54AM +0100, Michal Simek wrote:
> Align smode defconfig with upstream QEMU. It could be the part of commit
> 9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
>
> Signed-off-by: Michal Simek
> ---
>
> configs/xilinx_mbv32_smode_defconfig | 12 ++--
> 1 file
On Fri, Nov 01, 2024 at 10:50:45AM +0100, Michal Simek wrote:
> The commit 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
> added support for 32bit version. 64bit version is also available that's why
> wire it up too.
> DT is providing description for generic QEMU target.
>
> Sign
On Fri, Nov 01, 2024 at 10:49:53AM +0100, Michal Simek wrote:
> DTB should be also placed to DDR. It should be the part of commit
> 9d688e6da5c9 ("riscv: mbv: Align DT with QEMU").
>
> Signed-off-by: Michal Simek
> ---
>
> board/xilinx/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletio
On Wed, Oct 30, 2024 at 02:46:39PM +0100, Andreas Schwab wrote:
> To restore MMC boot, enable SPL_SYS_MMCSD_RAW_MODE and recover
> SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
> SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION.
>
> Fixes: 2a00d73d081 ("spl: mmc: Try to clean up raw-mode options")
> ---
> confi
On Tue, Nov 19, 2024 at 09:35:32PM +0100, Thomas Bonnefille wrote:
> [EXTERNAL MAIL]
>
> On Mon Nov 18, 2024 at 11:01 AM CET, Leo Liang wrote:
> > On Tue, Nov 12, 2024 at 03:57:37PM +0100, Thomas Bonnefille wrote:
> > > [EXTERNAL MAIL]
> > >
> > >
Hi,
On Tue, Nov 12, 2024 at 03:57:36PM +0100, Thomas Bonnefille wrote:
> [EXTERNAL MAIL]
>
> Provide a page describing the usage of U-Boot on the LicheeRV Nano and a
> description of the board.
>
> Signed-off-by: Thomas Bonnefille
> ---
> doc/board/sophgo/licheerv_nano.rst | 72
>
On Mon, Nov 11, 2024 at 08:24:04PM +0100, Yuri Zaporozhets wrote:
> If BIOSEMU is compiled for RISC-V (SiFive Unmatched board) and the function
> dm_pci_run_vga_bios() is executed, U-Boot stops with error message saying
> that the SPL malloc pool is too small. So increase the default pool size
> wh
On Tue, Nov 12, 2024 at 11:42:23AM +0100, Heinrich Schuchardt wrote:
> With the move from script based booting to using bootmeth a lot of
> environment variables have changed. To always use the default environment
> it is recommendable to erase the environment stored in the SPI flash.
> This can be
On Tue, Nov 12, 2024 at 03:57:37PM +0100, Thomas Bonnefille wrote:
> [EXTERNAL MAIL]
>
> Import a slightly modified version of the LicheeRV Nano and SG2002
> device trees from the Linux Kernel. The current supported IPs are UART,
> MMC, Timer, PLIC and CLINT.
>
> Signed-off-by: Thomas Bonnefille
On Tue, Nov 12, 2024 at 05:27:22PM +0100, Andreas Schwab wrote:
> To restore MMC boot, enable SPL_SYS_MMCSD_RAW_MODE and recover
> SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
> SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION.
>
> Fixes: 2a00d73d081 ("spl: mmc: Try to clean up raw-mode options")
> Signed-off-b
On Tue, Nov 19, 2024 at 09:59:59PM +0100, Yuri Zaporozhets wrote:
> Currently, the PCI subsystem selects the small "region 2" (which starts at
> 0x700)
> as bus_addr/phys_addr. As a consequence, the BAR0 on PCIe video card cannot
> be initialized,
> because it simply doesn't fit into 0x10
Hi Tom,
The following changes since commit 3881c6b90350b0b04085ad46ef64989b43967eef:
configs: Resync with savedefconfig (2024-11-26 08:17:35 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to bdca70632dad
Hi Tom,
The following changes since commit 2b1c8d3b2da46ce0f7108f279f04bc66f1d8d09a:
cmd: Fix Kconfig coding style (2025-01-31 11:29:05 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to faf237d1b43c3221e
On Thu, Jan 23, 2025 at 03:21:40AM +0100, Heinrich Schuchardt wrote:
> If CONFIG_AVAILABLE_HARTS=y, variable available_harts_lock is created in
> the data section which will not be writable while executing from flash.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/Kconfig | 1 +
> 1 f
On Fri, Jan 24, 2025 at 05:00:14PM +0100, Heinrich Schuchardt wrote:
> Bhyve is the hypervisor used by FreeBSD.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> Fix typo in subject
> ---
> cmd/riscv/sbi.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang
On Sat, Jan 11, 2025 at 09:55:26AM +0800, Yu-Chien Peter Lin wrote:
> Allow specifying load address of OP-TEE binary. It is
> recommended that the specified address aligns with the
> base address of an PMP-protected NAPOT region and matches
> the CFG_TDDRAM_START configuration in OP-TEE.
>
> Signe
On Sat, Jan 11, 2025 at 09:55:27AM +0800, Yu-Chien Peter Lin wrote:
> The following diagram illustrates the boot flow for OP-TEE OS
> initialization on RISC-V.
>
> (1)---+
> | U-Boot SPL |
> ++
> |
> v
> (2)---
On Thu, Jan 23, 2025 at 09:11:35AM +, Yao Zi wrote:
> JH7110 SoC requires no specific handling before entering Linux kernel.
> Let's drop the specific implementation to avoid duplication.
>
> Signed-off-by: Yao Zi
> ---
> arch/riscv/cpu/jh7110/Makefile | 1 -
> arch/riscv/cpu/jh7110/cpu.c
On Thu, Jan 23, 2025 at 09:11:34AM +, Yao Zi wrote:
> The current implementation is equivalent to the fallback one, so
> this shouldn't change any behaviour but cleans the code up only.
>
> Signed-off-by: Yao Zi
> ---
> arch/riscv/cpu/generic/Makefile | 1 -
> arch/riscv/cpu/generic/cpu.c
On Thu, Jan 23, 2025 at 09:11:33AM +, Yao Zi wrote:
> Most RISC-V SoCs have similar cleanup_before_linux() functions. Let's
> provide a weak symbol as fallback to reduce duplicated code.
>
> Signed-off-by: Yao Zi
> ---
> arch/riscv/cpu/cpu.c | 17 +
> 1 file changed, 17 inser
Hi Tom,
The following changes since commit 3b3c7280b82b1f08807a070ac066cd02919dfde1:
smbios: address build warning (2024-12-15 11:41:32 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git next
for you to fetch changes up to e59241f8b1315
Hi Huan,
On Mon, Jan 20, 2025 at 10:22:47AM +0800, Huan Zhou wrote:
> [EXTERNAL MAIL]
>
> Implement functionality to probe and calculate the DRAM size
> during the boot phase for the RISC-V spacemit K1 platform.
>
> Tested-by: Marcel Ziswiler # BPI-F3 16G
> Signed-off-by: Huan Zhou
> ---
> Thi
On Mon, Jan 20, 2025 at 12:29:20PM +0800, Huan Zhou wrote:
> [EXTERNAL MAIL]
>
> Implement functionality to probe and calculate the DRAM size
> during the boot phase for the RISC-V spacemit K1 platform.
>
> Tested-by: Marcel Ziswiler # BPI-F3 16G
> Signed-off-by: Huan Zhou
> ---
> This patch in
On Fri, Jan 10, 2025 at 04:53:08PM +0800, Yu-Chien Peter Lin wrote:
> [EXTERNAL MAIL]
>
> Some RISC-V platforms do not define the d-cache line size
> through SYS_CACHE_SHIFT_n. Set a default value of 64 bytes
> for such cases.
>
> Signed-off-by: Yu-Chien Peter Lin
> ---
> This patch resolves com
On Tue, Dec 31, 2024 at 10:35:57PM -0800, E Shattow wrote:
> Split out StarFive VisionFive2 multi-board target specific configuration
> into starfive-visionfive2-binman.dtsi in preparation for removal of
> jh7110-u-boot and jh7110-common-u-boot in part or whole as sent upstream.
>
> Signed-off-by:
On Wed, Jan 15, 2025 at 12:46:40AM +0800, Junhui Liu wrote:
> Add support for K230 CanMV board with serial console and usb otg
> support. It can boot via vendor's u-boot-spl and boot into Linux
> via tftp through the onboard RTL8152.
>
> Signed-off-by: Junhui Liu
> ---
> board/canaan/k230_canmv/
On Wed, Jan 15, 2025 at 12:46:37AM +0800, Junhui Liu wrote:
> Canaan Kendryte K230 SoC instantiates a dwc2 v4.30a core. This patch
> adds the compatible for it.
>
> Signed-off-by: Junhui Liu
> ---
> The USB function on K230 currently relies on patch [1], which updates
> the core reset flow of dwc
On Wed, Jan 15, 2025 at 12:46:38AM +0800, Junhui Liu wrote:
> Add initial dts for K230-CanMV powered by Canaan Kendryte K230 SoC,
> which has two RISC-V C908 cores, a big core with vector 1.0 extension
> and a small core without vector extension.
>
> This patch is basically comes from Linux Kernel
On Wed, Jan 15, 2025 at 12:46:39AM +0800, Junhui Liu wrote:
> Add Canaan K230 SoC with sysreset support, running without cache
> enabled.
>
> Signed-off-by: Junhui Liu
> ---
> arch/riscv/Kconfig | 5 +
> arch/riscv/cpu/k230/Kconfig | 14 ++
> arch/riscv/cpu/k230/Makef
On Wed, Jan 15, 2025 at 12:46:41AM +0800, Junhui Liu wrote:
> Add description of compiling u-boot for K230 CanMV.
>
> Since the vendor's u-boot-spl verifies u-boot header [1], it is
> necessary to use the Python script from vendor to add the header to the
> u-boot image.
>
> [1]
> https://github
On Mon, Jan 06, 2025 at 01:04:04PM +, Mayuresh Chitale wrote:
> Enhance the existing extension probing mechanism by adding support for
> more extensions and probing using the "riscv,isa" property. This patch
> is ported from the latest upstream linux.
>
> Signed-off-by: Mayuresh Chitale
> ---
On Mon, Jan 06, 2025 at 01:04:05PM +, Mayuresh Chitale wrote:
> Update the cpu probing to fallback to "riscv,isa" property if
> "riscv,isa-extensions" is not available and modify the riscv CMO code
> to use the block size that was probed during cpu setup.
>
> Signed-off-by: Mayuresh Chitale
>
Hi Tom,
The following changes since commit 178f6ecb21fe12ada74a9a1a08093c812b15eea5:
Merge patch series "bootstd: Support recording images" (2025-01-15 19:27:14
-0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch chang
On Mon, Feb 10, 2025 at 12:22:08PM -0800, E Shattow wrote:
> Use LwIP network stack and enable wget HTTP command. The tftpput command
> is not currently supported by LwIP network stack so remove it.
>
> Signed-off-by: E Shattow
> ---
> configs/starfive_visionfive2_defconfig | 3 ++-
> 1 file cha
On Thu, Feb 06, 2025 at 02:05:03PM +0100, Heinrich Schuchardt wrote:
> Variable $fdtfile needs to be set for automatically loading a device-tree
> from the ESP or boot partition.
>
> * Set CONFIG_DEFAULT_FDT_FILE in the defconfig.
> * Add $fdtfile to the default environment.
>
> Signed-off-by: He
On Mon, Feb 10, 2025 at 10:57:43AM +0800, Hal Feng wrote:
> Update the maintainer file and mark jh7110 / visionfive2 related files
> with N: patterns.
>
> Signed-off-by: Hal Feng
> ---
>
> Changes since v2:
> - Mark visionfive2 related files with N: pattern.
>
> Changes since v1:
> - Mark jh711
On Mon, Feb 10, 2025 at 12:18:28PM +0100, Heinrich Schuchardt wrote:
> The configuration descriptions generated by binman contain the vendor
> device-tree directory. Instead of adding it to all match strings just strip
> it off.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> no change
Hi Tom,
The following changes since commit 7a45cb4ffeff034304789954bb222ddd7d02104a:
fs/erofs: fix an integer overflow in symlink resolution (2025-02-18 12:32:07
-0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch chan
On Thu, Feb 27, 2025 at 02:47:33PM +, Yao Zi wrote:
> Availability of RISC-V SBI service implies a prior stage exists. As SBI
> firmware usually passes a FDT to the loaded program, let's select
> OF_HAS_PRIOR_STAGE if SBI is enabled.
>
> With previously added fallback version of board_fdt_blob
Hi Tom,
The following changes since commit 409d37e869e91453d94319792e17d1d882259b49:
led: Fix next Coverity scan error (2025-03-04 12:07:23 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 6e71966fa8a5e
On Tue, Nov 12, 2024 at 11:26:44AM +0100, Heinrich Schuchardt wrote:
> Without 'nvme scan' the ESP on the NVMe drive is not found early.
> EFI variables cannot be persisted.
>
> Hit any key to stop autoboot: 0
> Cannot persist EFI variables without system partition
> ** Booting bootfl
On Thu, Feb 27, 2025 at 02:47:29PM +, Yao Zi wrote:
> It's common for S-Mode U-Boot to retrieve a FDT blob along with taking
> control from SBI firmware. Add a weak version of board_fdt_blob_setup to
> make use of it by default and avoid copy-pasting similar functions among
> boards.
>
> Signe
On Thu, Feb 27, 2025 at 02:47:30PM +, Yao Zi wrote:
> The default version should work for RISC-V QEMU.
>
> Signed-off-by: Yao Zi
> ---
> board/emulation/qemu-riscv/qemu-riscv.c | 8
> 1 file changed, 8 deletions(-)
Reviewed-by: Leo Yu-Chi Liang
On Thu, Feb 27, 2025 at 02:47:31PM +, Yao Zi wrote:
> The default version should work for Starfive VisionFive 2.
>
> Signed-off-by: Yao Zi
> ---
> board/starfive/visionfive2/starfive_visionfive2.c | 10 --
> 1 file changed, 10 deletions(-)
Reviewed-by: Leo Yu-Chi Liang
On Thu, Feb 27, 2025 at 02:47:32PM +, Yao Zi wrote:
> The default version should work for both SiFive Unmatched and Unleashed.
>
> Signed-off-by: Yao Zi
> ---
> board/sifive/unleashed/unleashed.c | 11 ---
> board/sifive/unmatched/unmatched.c | 10 --
> 2 files changed, 21 de
On Thu, Feb 27, 2025 at 02:47:33PM +, Yao Zi wrote:
> Availability of RISC-V SBI service implies a prior stage exists. As SBI
> firmware usually passes a FDT to the loaded program, let's select
> OF_HAS_PRIOR_STAGE if SBI is enabled.
>
> With previously added fallback version of board_fdt_blob
Hi Huan,
Please run scripts/checkpatch.pl against your patchset
and respin a v2 after all the warnings & errors are attended to.
Thanks,
Leo
On Tue, Mar 04, 2025 at 03:03:28PM +0800, Huan Zhou wrote:
> Add spacemit reset driver.
> ---
> drivers/reset/Kconfig | 7 +
> drivers/rese
On Sun, Mar 02, 2025 at 09:50:17AM +0100, Heinrich Schuchardt wrote:
> The zkr ISA extension can be used to generate random numbers. Since RVA22
> zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
> driver detects if the extension is usable during driver binding. Let's
> enable
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