On Tue, Apr 16, 2024 at 03:52:38PM +0800, Kongyang Liu wrote:
> Add sysreset driver for cv1800b SoC
>
> Signed-off-by: Kongyang Liu
> ---
>
> drivers/sysreset/Kconfig| 5 +++
> drivers/sysreset/Makefile | 1 +
> drivers/sysreset/sysreset_cv1800b.c | 64 ++
Hi Tom,
The following changes since commit ff0de1f0557ed7d2dab47ba976a37347a1fdc432:
Merge patch series "Update PHYTEC SOM Detection" (2024-04-29 10:56:05 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up t
On Thu, May 02, 2024 at 08:06:43AM +0200, Lukas Funke wrote:
> [EXTERNAL MAIL]
>
> On 24.04.2024 13:01, Heinrich Schuchardt wrote:
> > On 24.04.24 09:43, lukas.funke-...@weidmueller.com wrote:
> > > From: Lukas Funke
> > >
> > > Rename spl_soc_init() to spl_dram_init() because the generic functi
On Tue, May 14, 2024 at 07:51:42AM +0200, Heinrich Schuchardt wrote:
> * We already have a header 'backtrace', there is no need to repeat the
> word backtrace on every line.
> * Add a blank line before the backtrace section of the crash report for
> improved readability.
> * If U-Boot is compil
On Mon, May 06, 2024 at 05:10:06PM +0800, Hanyuan Zhao wrote:
> Without the NULL check, if the devicetree that u-boot loads does not have a
> compatible property then a store access fault will be raised and force the
> machine to reset, due to the NULL pointer we passed to strlen. This commit
> add
Hi Tom,
The following changes since commit c8ffd1356d42223cbb8c86280a083cc3c93e6426:
Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
(2024-05-13 09:15:51 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for y
On Thu, Mar 28, 2024 at 10:58:24AM +0100, Łukasz Stelmach wrote:
> [EXTERNAL MAIL]
>
> When virtio_init() gets called from board_init() PCI isn't ready. Thus,
> virtio-over-PCI (e.g. network interfaces) devices can't be detected and
> used without additional `virtio scan` scan in the shell or a sc
On Tue, Apr 02, 2024 at 10:49:07AM +0200, Heinrich Schuchardt wrote:
> Currently in set_fdtfile() we set the value of environment variable fdtfile
> unconditionally. The implies that a value in the environment will be
> ignored.
>
> With the patch environment variable fdtfile will only be set if i
On Tue, Apr 02, 2024 at 10:49:12AM +0200, Heinrich Schuchardt wrote:
> Add instructions to build U-Boot for the Milk-V Mars board
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v3:
> no change
> v2:
> describe how to preset fdtfile
> ---
> doc/board/starfive/index.rst | 1 +
>
On Tue, Apr 02, 2024 at 10:49:10AM +0200, Heinrich Schuchardt wrote:
> The differences between the Milk-V Mars board and the VisionFive 2 board
> are small enough that we can support both using the same U-Boot build.
>
> * The model and compatible property are taken from proposed Linux patches.
>
Hi Tom,
The following changes since commit 069d07396e30aa9be396c1dd3fc158ac199e6843:
Merge tag 'efi-2024-07-rc1' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2024-04-08 14:33:59 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.
On Mon, Apr 22, 2024 at 04:43:59PM -0300, Daniel Henrique Barboza wrote:
> [EXTERNAL MAIL]
>
> Hi,
>
> In QEMU we have a 'max' type CPU that implements (almost) all extensions that
> QEMU
> is able to emulate. Recently, in QEMU commit 249e0905d05, we bumped the
> extensions
> for this CPU.
>
>
On Wed, Apr 24, 2024 at 09:43:38AM +0200, lukas.funke-...@weidmueller.com wrote:
> From: Lukas Funke
>
> Rename spl_soc_init() to spl_dram_init() because the generic function
> name does not reflect what the function actually does. Also
> spl_dram_init() is commonly used for dram initialization a
On Fri, Sep 11, 2020 at 04:04:13PM +0800, Bin Meng wrote:
> On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
> >
> > Some IPIs may already be pending when U-Boot is started. This could be a
> > problem if a secondary hart tries to handle an IPI before the boot hart has
> > initialized the IPI d
Hi, Bin
On Mon, Sep 14, 2020 at 10:07:57AM +0800, Bin Meng wrote:
> Hi Leo,
>
> On Mon, Sep 14, 2020 at 9:58 AM Leo Liang wrote:
> >
> > On Fri, Sep 11, 2020 at 04:04:13PM +0800, Bin Meng wrote:
> > > On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
> >
On Wed, Mar 17, 2021 at 11:10:58AM +0800, Bin Meng wrote:
> In preparation to add SiFive Unmatched board support, let's rename
> the existing fu540 board to unleashed.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - fix a typo in the commit message
> - rename fu540.rst
>
> arch/ris
Hi Heinrich,
On Mon, Mar 22, 2021 at 12:02:48PM +0100, Heinrich Schuchardt wrote:
> The value returned by setjmp must be nonzero. If zero is passed as
> parameter it must be replaced by 1.
>
> This patch reduces the code size a bit.
>
> Signed-off-by: Heinrich Schuchardt
> Sean Anderson
I thi
Hi Green,
On Mon, Mar 22, 2021 at 03:11:08PM +0800, Green Wan wrote:
> I found I didn't clean the folder before I ran the build test. The changes
> below for board/sifive/unmatched/Makefile was missing. Sorry about that.
>
> -obj-y += hifive-unmatched-fu740.o
> +obj-y += unmatched.o
>
> -
>
Hi Green,
On Tue, Mar 23, 2021 at 01:35:38AM -0700, Green Wan wrote:
> Add a callback riscv_hart_early_init() to ./arch/riscv/cpu/start.S to
> allow different riscv hart perform setup code for each hart as early
> as possible. Since all the harts enter the calback, they must be able
> to run the s
On Thu, Mar 25, 2021 at 03:31:50PM +0800, Heinrich Schuchardt wrote:
> Provide a unit test for the longjmp() library function
>
> Signed-off-by: Heinrich Schuchardt
>
> v4:
> use volatile for variable changed between setjmp and longjmp
> v3:
> check variable on stack
> v2:
>
On Sat, Mar 20, 2021 at 12:31:35PM +, Heinrich Schuchardt wrote:
> Provide optimized versions of memcpy(), memmove(), memset() copied from
> the Linux kernel.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/Kconfig | 78 ++
> arch/riscv/include/asm
On Fri, Mar 26, 2021 at 05:03:54PM +0800, Green Wan wrote:
> On Fri, Mar 26, 2021 at 9:34 AM Sean Anderson wrote:
> >
> > On 3/25/21 9:22 PM, Leo Liang wrote:
> > > Hi Green,
> > >
> > > On Tue, Mar 23, 2021 at 01:35:38AM -0700, Green Wan wrote:
> &
On Sat, Mar 27, 2021 at 07:57:35PM +0800, Bin Meng wrote:
> Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
> adds the official DT bindings for CLINT, which uses "sifive,clint0"
> as the compatible string. "riscv,clint0" is now legacy and has to
> be kept for backward co
On Thu, Apr 01, 2021 at 04:48:51PM +0800, Dylan Dai-Rong Jhong(??) wrote:
> Adding timeout mechanism to avoid spi driver from stucking
> in the while loop in __atcspi200_spi_xfer().
>
> Signed-off-by: Dylan Jhong
> ---
> drivers/spi/atcspi200_spi.c | 10 --
> 1 file changed, 8 insert
Hi Green,
There seems to be some compilation failure when running CI test.
CI trest result:
(https://dev.azure.com/ycliang-tw/u-boot-riscv/_build/results?buildId=24&view=logs&j=24a4c78b-f197-51e6-cd79-c14cda102aad&t=6a1228d0-d58c-5c15-8977-c1c59ea93a2c&l=280)
Could you please also check and fix
Hi Tom,
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7078
The following changes since commit e9c99db7787e3b5c2ef05701177c43ed1c023c27:
Merge branch '2021-04-07-CI-improvements' (2021-04-07 15:54:07 -0400)
are available in the Git repository at:
g...@source.denx.de:u-bo
Hi Green,
This patch series seems to have failed CI test.
Could you please check the CI result ? Thanks!
https://dev.azure.com/ycliang-tw/u-boot-riscv/_build/results?buildId=28&view=results
Best regards,
Leo
On Fri, May 07, 2021 at 10:36:47AM -0700, Green Wan wrote:
> Add SiFive fu740 cpu to su
On Mon, May 10, 2021 at 05:08:16PM +0800, Bin Meng wrote:
> This reverts commit bc8bbb77f74f21582b3bfd790334397757f88575.
>
> This commit breaks U-Boot booting on SiFive Unleashed board, as
> there is no such CSR on U54 core.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/fu540/spl.c | 1
Hi Tom,
CI result:
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7504
The following changes since commit 530c8d4af2e18c6142ab7cac6f11dd92c02b2bc9:
Merge branch
'2021-05-13-extension-board-detection-and-DT-overlay-application' (2021-05-13
13:09:14 -0400)
are available in
On Thu, May 13, 2021 at 04:46:17PM +0800, Bin Meng wrote:
> At present U-Boot SPL fails to boot on SiFive Unleashed board, due
> to a load address misaligned exception happens when loading the FIT
> image in spl_load_simple_fit(). The exception happens in memmove()
> which is called by fdt_splice_(
On Thu, May 13, 2021 at 04:46:18PM +0800, Bin Meng wrote:
> Currently all assembly optimized implementation of memory routines
> show up at the top level of the RISC-V architecture Kconfig menu.
> Let's group them together into a submenu.
>
> Signed-off-by: Bin Meng
>---
Reviewed-by: Leo Yu-Chi
Hi Tom,
CI result:
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7572
The following changes since commit e644dfbb1786a4a3308b068e1f61cd9e2dfac237:
configs: Resync with savedefconfig (2021-05-15 08:10:13 -0400)
are available in the Git repository at:
g...@source.denx.de
On Fri, May 14, 2021 at 11:45:30AM +0800, Green Wan wrote:
> Hi Bin,
>
> Thanks, I'll include that revert. Just traced back the git log. My original
> patch is based on fu740. I guess it was merged to fu540 since fu740 series
> wasn't present yet.
>
> Hi Rick,
>
> Not sure whether you'll pick fu
On Tue, May 18, 2021 at 05:56:08PM +0800, Bin Meng wrote:
> Hi Green,
>
> On Tue, May 18, 2021 at 5:43 PM Green Wan wrote:
> >
> >
> >
> > On Tue, May 18, 2021 at 3:45 PM Bin Meng wrote:
> >>
> >> Hi Green,
> >>
> >> On Tue, M
gt; As I mentioned before, pcie_dw_common.c is not part of fu740 patch. The error
> is actually nothing to do with fu740 patchset. Even I fix those warning
> message. It will not be in same patch series.
>
>
> - Green
>
>
> Leo Liang <ycli...@andestech.com>於 202
Hi Tom,
The following changes since commit 428bec7cf956c3558bbdfda4d2ba23beb73a68ba:
Merge branch '2021-05-17-assorted-fixes' (2021-05-18 14:17:54 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to a4691f363
On Wed, May 19, 2021 at 07:16:15PM +0800, Green Wan wrote:
> Fix compilation error when Werror is turned on. The warning could
> possible break some CI builds.
>
> Signed-off-by: Green Wan
> ---
> drivers/pci/pcie_dw_common.c | 54 +++-
> 1 file changed, 29 insert
On Thu, May 20, 2021 at 03:40:27PM +0800, Green Wan wrote:
> Add fu740 support. One abstract layer is added for supporting
> multiple chips such as fu540 and fu740.
>
> Signed-off-by: Green Wan
> ---
> arch/riscv/cpu/fu540/Kconfig | 2 +-
> drivers/clk/sifive/Kconfig | 8 +-
> driv
Hi Tom,
The following changes since commit eb53b943be2949ca40a8e05532cd74cda058:
Merge https://source.denx.de/u-boot/custodians/u-boot-sh (2021-05-23 10:15:15
-0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch change
21 at 11:24 PM Tom Rini <tr...@konsulko.com> wrote:
> >
> >
> > On Wed, May 26, 2021 at 04:12:50PM +0800, Leo Liang wrote:
> >
> > Hi Tom,
> >
> > The following changes since commit
> > eb53b943be2949ca40a8e05532cd74cda058:
> >
&
Hi Tom,
The following changes since commit ffd810487ec2ff6095edf3f3d058d7ed6eb85ff3:
Merge tag 'u-boot-stm32-20210528' of
https://source.denx.de/u-boot/custodians/u-boot-stm (2021-05-28 14:11:06 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-ris
On Fri, Jun 04, 2021 at 11:58:23AM +0800, Sean Anderson wrote:
> Changes in v2:
> - Convert stage to enum
> - Only force probe clocks pre-reloc
> - Rebase on u-boot/master
>
> Sean Anderson (11):
> clk: Allow force setting clock defaults before relocation
> clk: k210: Rewrite to remove CCF
>
On Fri, Jun 04, 2021 at 01:51:09PM +0800, Bin Meng wrote:
> The SPDX license header is currently missing. Add one.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/dts/ae350_32.dts | 2 ++
> arch/riscv/dts/ae350_64.dts | 2 ++
> 2 files changed, 4 insertions(+)
>
Reviewed-by: Leo Yu-Chi Liang
On Fri, Jun 04, 2021 at 01:51:10PM +0800, Bin Meng wrote:
> There are two spaces before "debug' in bootargs. Drop one.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/dts/ae350_32.dts | 2 +-
> arch/riscv/dts/ae350_64.dts | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
Reviewed-by:
On Fri, Jun 04, 2021 at 01:51:11PM +0800, Bin Meng wrote:
> PLIC nodes don't have child nodes, so #address-cells is not needed.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/dts/ae350_32.dts | 2 --
> arch/riscv/dts/ae350_64.dts | 2 --
> 2 files changed, 4 deletions(-)
Reviewed-by: Leo Yu-
On Fri, Jun 04, 2021 at 01:51:12PM +0800, Bin Meng wrote:
> All the device nodes that refer to plic0 as their interrupt parent
> have 2 cells encoded in their interrupts property, but plic0 only
> provides 1 cell in #interrupt-cells which is incorrect.
>
> Signed-off-by: Bin Meng
> ---
>
> arch
On Wed, Jun 16, 2021 at 12:34:14AM +0800, Dimitri John Ledkov wrote:
> Set default fdtfile names for unleashed and unmatched boards, as used
> in the upstream Linux kernel. This allows sysboot command to find and
> load appropriate dtb for the matching kernel from universal stock
> Ubuntu RISCV roo
On Fri, Jun 11, 2021 at 12:16:08PM +0800, Sean Anderson wrote:
> This is effectively a complete rewrite to remove all dependency on CCF.
> The code is now smaller, and so is the binary. It also takes up less memory
> at runtime (since we don't have to create 40 udevices). In general, I am
> much ha
On Fri, Jun 11, 2021 at 12:16:09PM +0800, Sean Anderson wrote:
> Now that there no separate PLL driver, we can no longer make the PLL
> functions static. By moving the PLL driver in with the rest of the clock
> code, we can make these functions static again. We still keep the pll
> header for unit
On Fri, Jun 11, 2021 at 12:16:10PM +0800, Sean Anderson wrote:
> Since we are no longer using CCF we cannot use the default soc_clk_dump.
> Instead, implement our own.
>
> Signed-off-by: Sean Anderson
> ---
>
> (no changes since v1)
>
> drivers/clk/kendryte/clk.c | 68 +
On Fri, Jun 11, 2021 at 12:16:11PM +0800, Sean Anderson wrote:
> This adds support for setting clock rates, which was left out of the
> initial CCF expunging. There are several tricky bits here, mostly related
> to the PLLS:
>
> * The PLL's bypass is broken. If the PLL is reconfigured, any child c
On Fri, Jun 11, 2021 at 12:16:12PM +0800, Sean Anderson wrote:
> This speeds up boot by preventing multiple reconfigurations of the PLLs.
>
> Signed-off-by: Sean Anderson
> ---
>
> (no changes since v1)
>
> drivers/clk/kendryte/clk.c | 15 ---
> 1 file changed, 8 insertions(+), 7 d
On Fri, Jun 11, 2021 at 12:16:13PM +0800, Sean Anderson wrote:
> This driver no longer serves a purpose now that we have moved away from
> CCF. Drop it.
>
> Signed-off-by: Sean Anderson
> ---
>
> (no changes since v1)
>
> drivers/clk/kendryte/Makefile | 2 +-
> drivers/clk/kendryte/bypass.c
On Fri, Jun 11, 2021 at 12:16:14PM +0800, Sean Anderson wrote:
> Now that we have only one clock driver, we don't need to have our own
> subdirectory. Move the driver back with the rest of the clock drivers.
>
> The MAINTAINERS for kendryte pinctrl is also fixed since it has always been
> wrong.
>
On Fri, Jun 11, 2021 at 12:16:15PM +0800, Sean Anderson wrote:
> Linux has had some stability issues when using AISRAM with a different
> frequency from SRAM. Mirror their change here now that we relocate into
> AISRAM.
>
> Signed-off-by: Sean Anderson
> ---
>
> Changes in v3:
> - Add CLK_K210_S
On Fri, Jun 11, 2021 at 12:16:16PM +0800, Sean Anderson wrote:
> Now that the k210 clock driver does not depend on CCF, we should no longer
> imply it (and probably should not have in the first place). We can also
> reduce the pre-relocation malloc arena back to something sensible.
>
> Signed-off-
Hi Tom,
Please pull u-boot-riscv/next into -next.
The following changes on the "next" branch since commit
c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
Merge tag 'xilinx-for-v2021.07-rc5' of
https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34
-0400)
are available in
On Wed, Jun 16, 2021 at 04:07:26PM +0800, Bin Meng wrote:
> Hi Leo,
>
> On Wed, Jun 16, 2021 at 3:44 PM Leo Liang wrote:
> >
> > Hi Tom,
> >
> > Please pull u-boot-riscv/next into -next.
> >
> > The following changes on the "next" branch sin
Hi Tom,
Please pull u-boot-riscv/next into -next.
The following changes on the "next" branch since commit
c4737cd594b5c4c47aff789fc53f7dd36ed03c94:
Merge tag 'xilinx-for-v2021.07-rc5' of
https://source.denx.de/u-boot/custodians/u-boot-microblaze (2021-06-11 08:29:34
-0400)
are available in
On Wed, Jun 16, 2021 at 10:59:18AM -0400, Tom Rini wrote:
> On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote:
>
> > Hi Tom,
> >
> > Please pull u-boot-riscv/next into -next.
> >
> > The following changes on the "next" branch since commit
On Thu, Jun 17, 2021 at 06:58:01AM +0800, Bin Meng wrote:
> Hi Leo,
>
> On Wed, Jun 16, 2021 at 10:59 PM Tom Rini wrote:
> >
> > On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote:
> >
> > > Hi Tom,
> > >
> > > Please pull u-boot-riscv
Hi Tom,
Please pull u-boot-riscv/next into -next.
The following changes since commit 173c3bcd7dca47f1a8f7371a229681d20c7821cc:
Merge tag 'ti-v2021.10-next-v2' of
https://source.denx.de/u-boot/custodians/u-boot-ti into next (2021-06-13
07:48:22 -0400)
are available in the Git repository at:
Hi Tom,
The following changes since commit 9301a5cc99dd0c298e2f7fe2fa98a7287fcda772:
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2021-06-15
08:23:04 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch c
On Mon, Jun 28, 2021 at 07:13:08PM +0800, Green Wan wrote:
> Replace 'pciaux' with 'pcieaux', including name string and function
> prefix. The old name string, 'pciaux', might cause an error if PCIe
> driver is changed to use clk_get_by_name() with 'pcieaux' to get
> clock.
>
> Signed-off-by: Gree
Hi Tianrui,
On Wed, Jun 30, 2021 at 09:51:54AM +0800, Tianrui Wei wrote:
> This patch adds openpiton-riscv64 SOC support. In particular, this
> board supports a standard bootflow through zsbl->u-boot SPL->
> opensbi->u-boot proper->Linux. There are separate defconfigs for
> building u-boot SPL and
Hi Tianrui,
On Wed, Jun 30, 2021 at 03:14:23PM +0800, Leo Liang wrote:
> Hi Tianrui,
> On Wed, Jun 30, 2021 at 09:51:54AM +0800, Tianrui Wei wrote:
> > This patch adds openpiton-riscv64 SOC support. In particular, this
> > board supports a standard bootflow through zsbl->u-b
On Wed, Jun 30, 2021 at 03:43:07PM +0800, Tianrui Wei wrote:
> This patch adds openpiton-riscv64 SOC support. In particular, this
> board supports a standard bootflow through zsbl->u-boot SPL->
> opensbi->u-boot proper->Linux. There are separate defconfigs for
> building u-boot SPL and u-boot prope
On Wed, Jun 30, 2021 at 11:23:45PM +0800, Zong Li wrote:
> Add initial support for the PCB description EEPROM for SiFive HiFive
> Unmatched boards.
>
> This implementation is refactored based on Paul Walmsley's porting and
> adopt the suggestions from David Abdurachmanov.
>
> Signed-off-by: Paul
On Wed, Jun 30, 2021 at 11:23:46PM +0800, Zong Li wrote:
> Enable the Opencores I2C controller on FU740
>
> Signed-off-by: Zong Li
> ---
> arch/riscv/cpu/fu740/Kconfig | 2 ++
> board/sifive/unmatched/Kconfig | 1 +
> 2 files changed, 3 insertions(+)
>
Reviewed-by: Leo Yu-Chi Liang
On Wed, Jun 30, 2021 at 11:23:47PM +0800, Zong Li wrote:
> Enable SPL_I2C_SUPPORT for fu740, and add 'u-boot,dm-spl' property in
> i2c node.
>
> Signed-off-by: Zong Li
> ---
> arch/riscv/cpu/fu740/Kconfig | 1 +
> arch/riscv/dts/fu740-c000-u-boot.dtsi | 4
> 2 files changed, 5 inse
On Wed, Jun 30, 2021 at 11:23:48PM +0800, Zong Li wrote:
> There are different DDR parameter settings for different board
> revisions. Add a new interface to get the PCB revision to determine
> which DT should be selected at runtime.
>
> Signed-off-by: Zong Li
> ---
> arch/riscv/include/asm/arch
On Wed, Jun 30, 2021 at 11:23:49PM +0800, Zong Li wrote:
> The difference between unmatched rev3 and rev1 is DDR timing, the rev3
> uses 1866 MT/s for 16GiB, and rev1 uses 2133 MT/s for 8GiB.
>
> Signed-off-by: Zong Li
> ---
> arch/riscv/dts/Makefile |2 +-
> .../fu740-
On Wed, Jun 30, 2021 at 11:23:50PM +0800, Zong Li wrote:
> There are two revisions of unmatched board with different DDR timing,
> we'd like to support multi-dtb mechanism in SPL, then it selects the
> right DTB at runtime according to PCB revision in I2C EEPROM.
>
> Signed-off-by: Zong Li
> ---
Hi Tom,
The following changes since commit 1311dd37ecf476be041d0452d4ee38619aadd5de:
Merge branch '2021-07-01-update-CI-containers' (2021-07-05 15:29:44 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 4b4
Hi Tianrui,
On Wed, Jul 07, 2021 at 12:02:00PM +0800, Tianrui Wei wrote:
> Previous device tree for OpenPitonemits a warning during compilation,
typo: OpenPiton emits ?
> thus was rejected by Tom. This commit fixes the previous warning and
Tom has actually accepted the patch, so this line could
Hi Tom,
This is a follow up PR for OpenPiton's dts.
Thanks for the catch.
The following changes since commit 5617efd2c882562b716a61bc0dc0edda46b045df:
Merge branch '2021-07-06-platform-updates' (2021-07-06 18:10:10 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/
00735049, "IPI Extension" },
> { 0x52464E43, "RFENCE Extension" },
> { 0x0048534D, "Hart State Management Extension" },
> + { 0x53525354, "System Reset Extension" },
> };
>
> static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc,
> --
> 2.28.0
>
Reviewed-by: Leo Liang
-nor";
> reg = <0>;
> spi-max-frequency = <5000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> m25p,fast-read;
> broken-flash-reset;
> };
> --
> 2.29.2
>
Reviewed-by: Leo Liang
On Fri, Jul 09, 2021 at 04:06:01PM +0800, Zong Li wrote:
> This patch reverts the following commits:
> - 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1")
> - ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board")
>
> We won't plan to support unmatched that the revision below
On Fri, Jul 09, 2021 at 04:26:35PM +0800, Zong Li wrote:
> We wouldn't like to allow user to change the serial number, so remove
> the command for changing serial number in EEPROM.
>
> Signed-off-by: Zong Li
> Suggested-by: David Abdurachmanov
> ---
> .../unmatched/hifive-platform-i2c-eeprom.c
Hi Zong,
On Fri, Jul 09, 2021 at 04:06:01PM +0800, Zong Li wrote:
> This patch reverts the following commits:
> - 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1")
> - ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board")
>
> We won't plan to support unmatched that the revi
On Tue, Apr 06, 2021 at 10:50:16AM +0300, Vitaly Wool wrote:
> If force_reloc flag is not set and booti is called for an address
> ouside RAM (i. e. QSPI NOR flash), we should honor that and not try
> to force relocation in a bogus fashion.
>
> Signed-off-by: Vitaly Wool
> ---
> arch/riscv/lib/i
On Thu, Jul 08, 2021 at 09:08:20AM +0800, Vincent Chen wrote:
> Create a new function spl_reset_device_by_gpio to reset the device
> whose reset pin is connected to the GPIO. Then, using this function
> to initialize GEMGXL.
>
> Signed-off-by: Vincent Chen
> ---
> board/sifive/unmatched/spl.c |
On Thu, Jul 08, 2021 at 09:08:21AM +0800, Vincent Chen wrote:
> Ensure USB hub, PCIe-USB bridge, and ULPI device to be reset
> even if the rebooting is without power-cycling.
>
> Signed-off-by: Vincent Chen
> ---
> board/sifive/unmatched/spl.c | 36
> 1 file
Hi Tom,
The following changes since commit c9204859bbdb924cda811813c545032971656480:
Merge branch 'master' of git://source.denx.de/u-boot-sh (2021-07-20 19:31:40
-0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes
On Tue, Jul 20, 2021 at 04:28:34AM +0800, Heinrich Schuchardt wrote:
> Provide library functions to read:
>
> * SBI implementation version
> * machine vendor ID
> * machine architecture ID
> * machine implementation ID
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-by: Leo Yu-Chi Liang
On Tue, Jul 20, 2021 at 01:13:56PM +0800, Sean Anderson wrote:
> On 7/20/21 12:59 AM, Heinrich Schuchardt wrote:
> > Am 20. Juli 2021 03:11:34 MESZ schrieb Sean Anderson :
> >> On 7/19/21 4:28 PM, Heinrich Schuchardt wrote:
> >>> Let the sbi command display:
> >>>
> >>> * SBI implementation version
On Thu, Jul 22, 2021 at 12:33:03AM +0800, Heinrich Schuchardt wrote:
> Add the System Reset Extension and the Hart State Management Extension
> definitions.
>
> Add missing RFENCE Extension enum values.
>
> The SBI 0.1 extension constants are needed for for the sbi command. Remove
> an #ifdef.
>
Hi Dimitri,
On Sat, Jul 24, 2021 at 12:12:25AM +0800, Dimitri John Ledkov wrote:
> Commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
> Kconfig") removed preboot commands in RISC-V targets and broke
> extlinux support as reported by Fu Wei .
>
> The patch finishes migration of
Hi Heinrich,
On Thu, Jul 22, 2021 at 01:02:10AM +0800, Sean Anderson wrote:
> On 7/21/21 12:33 PM, Heinrich Schuchardt wrote:
> > Add the System Reset Extension and the Hart State Management Extension
> > definitions.
> >
> > Add missing RFENCE Extension enum values.
> >
> > The SBI 0.1 extensio
On Thu, Jul 22, 2021 at 12:33:05AM +0800, Heinrich Schuchardt wrote:
> Provide sysreset driver using the SBI system reset extension.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> remove a superfluous check in sbi_sysreset_request()
> ---
> MAINTAINERS | 1 +
> a
On Mon, Jul 26, 2021 at 08:59:02PM +0800, Heinrich Schuchardt wrote:
> The series provides library functions to read
>
> * SBI implementation version
> * machine vendor ID
> * machine architecture ID
> * machine implementation ID
>
> and enhances the sbi command to display this information.
>
>
On Mon, Jul 26, 2021 at 06:20:17PM +0800, Dimitri John Ledkov wrote:
> Commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
> Kconfig") removed preboot commands in RISC-V targets and broke
> extlinux support as reported by Fu Wei .
>
> The patch finishes migration of CONFIG_USE_P
Hi Tom,
Please pull some RISC-V updates.
CI result:
https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/6505
The following changes since commit cbe607b920bc0827d8fe379ed4f5ae4e2058513e:
Merge tag 'xilinx-for-v2021.04-rc3' of
https://gitlab.denx.de/u-boot/custodians/u-boot-micro
On Tue, Dec 22, 2020 at 06:59:03PM -0500, Sean Anderson wrote:
> This enables the necessary config options.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Simon Glass
> ---
>
> (no changes since v1)
>
> board/sipeed/maix/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/boa
On Wed, Aug 05, 2020 at 12:42:19PM -0400, Sean Anderson wrote:
> This define was left over from a previous revision, and was never used.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Heinrich Schuchardt
> Reviewed-by: Bin Meng
> ---
>
> include/configs/sipeed-maix.h | 3 ---
> 1 file change
On Thu, Mar 04, 2021 at 05:00:48PM +, Heinrich Schuchardt wrote:
> Use constants for extension IDs.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> cmd/riscv/sbi.c | 30 +++---
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/cmd/riscv/sbi.c b/cmd/
On Thu, Mar 04, 2021 at 05:00:50PM +, Heinrich Schuchardt wrote:
> Select missing Kconfig dependencies.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> drivers/pinctrl/Kconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index
Hi Tom,
I am Leo, just recently joined the community.
and been picking up the guide line of uboot's development.
I am a bit curious about the policy on the cover letter of patchsets.
Is cover letter mandatory ?
IMHO, making it mandatory, especially on patchsets that consist of more than 1
patch
Dear Wolfgang,
On Mon, Jul 06, 2020 at 08:03:46PM +0800, Wolfgang Denk wrote:
> Dear Leo,
>
> In message <20200706023510.gb2...@andestech.com> you wrote:
> >
> > I am Leo, just recently joined the community.
> > and been picking up the guide line of uboot's development.
> >
> > I am a bit curious
201 - 300 of 577 matches
Mail list logo
