ization
is failing. These configs are enabled in "am65x_evm_r5_defconfig" but
are missing from "am65x_evm_r5_usbdfu_defconfig". Fix that by updating
"am65x_evm_r5_usbdfu_defconfig" to include "am65x_evm_r5_defconfig".
Signed-off-by: Hrushikesh Salunke
---
This
;pxe: Precursor series for
supporting read_all() in extlinux / PXE""
Hrushikesh Salunke (3):
pci: pcie_cdns_ti: Include linux/sizes.h header
pci: pcie_cdns_ti: Enable PCIe root-complex mode in AM64 SoC
configs: am64x_evm_a53_defconfig: Enable configs for PCIe support
configs/am6
Driver uses macro SZ_4G to configure inbound base address register.
The macro is used without including the header file in which it is
defined. Fix this.
Fixes: 59ad5480098 ("pci: Add TI K3 Cadence PCIe Controller")
Signed-off-by: Hrushikesh Salunke
---
drivers/pci/pcie_cdns_ti.c | 1
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. Add support to configure PCIe0 in Root-
Complex mode of operation.
Signed-off-by: Hrushikesh Salunke
---
drivers/pci/pcie_cdns_ti.c | 10 ++
1 file changed, 10 insertions(+)
diff --
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. To support PCIe functionality with PCIe0
instance in Root-Complex mode enable corresponding configs. Also enable
configs to support NVMe over PCIe.
Signed-off-by: Hrushikesh Salunke
---
co
mmc 1
UMS: LUN 0, dev mmc 1, hwpart 0, sector 0x0, count 0x3b72400
Signed-off-by: Hrushikesh Salunke
---
This patch is based on following commit on master branch
0fd7ee0306a (origin/master, origin/HEAD) scripts/checkpatch.pl: Upgrade
IS_ENABLED_CONFIG to error for U-Boot
c
On 20/02/25 20:07, Tom Rini wrote:
On Thu, Feb 20, 2025 at 03:32:41PM +0530, Hrushikesh Salunke wrote:
Increase the size of malloc region allocated before relocation, as
current size is insufficient for dfu boot causing it to overflow and
corrupt the stack.
Enable the fixed regulator
boot DDRSS initialization
is failing. These configs are enabled in "am65x_evm_r5_defconfig" but
are missing from "am65x_evm_r5_usbdfu_defconfig".
Signed-off-by: Hrushikesh Salunke
---
This patch is based on following commit in master branch
7a45cb4ffe fs/erofs: fix an integer overflow i
ization
is failing. These configs are enabled in "am65x_evm_r5_defconfig" but
are missing from "am65x_evm_r5_usbdfu_defconfig". Fix that by updating
"am65x_evm_r5_usbdfu_defconfig" to include "am65x_evm_r5_defconfig".
Signed-off-by: Hrushikesh Salunke
---
On 12/06/25 22:43, Tom Rini wrote:
On Thu, Jun 12, 2025 at 02:19:10PM +0530, Hrushikesh Salunke wrote:
Introduce support for Device Firmware Upgrade (DFU) over PCIe in
U-Boot. Traditionally, the DFU protocol is used over USB, where a
device enters DFU mode and allows a host to upload
PCIe as a boot mode where a host can load images directly into device
memory using DFU over PCIe
Signed-off-by: Hrushikesh Salunke
---
This patch is based on commit
9de873b4c30 Merge patch series "linux/bitfield.h: sync from
Linux 6.15 + winbond"
Changes since v2
Put the usage of ma
On 16/06/25 22:33, Tom Rini wrote:
On Mon, Jun 16, 2025 at 10:14:44PM +0530, Hrushikesh Salunke wrote:
Introduces support for Device Firmware Upgrade (DFU) over PCIe in
U-Boot. Traditionally, the DFU protocol is used over USB, where a
device enters DFU mode and allows a host to upload
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
which is a Cadence PCIe Controller. To support PCI Endpoint
functionality with the PCIe0 instance of PCIe, enable the corresponding
configs.
Signed-off-by: Hrushikesh Salunke
---
configs/am64x_evm_a53_defconfig | 2 ++
1
Add support for Endpoint mode of operation in the Cadence PCIe
Controller present on TI's K3 SoCs. This driver is an adaptation of the
Linux kernel v6.15 driver (drivers/pci/controller/cadence/pci-j721e.c).
Signed-off-by: Hrushikesh Salunke
---
drivers/pci_endpoint/Kconfig
AM64X SoC supports PCIe boot, when PCIe controller is configured in
endpoint mode. Now U-Boot has support required for PCIe boot add PCIe
as a valid "bootmedia" to allow booting over PCIe on AM64X.
Signed-off-by: Hrushikesh Salunke
---
arch/arm/mach-k3/am64x/boot.c | 3 +++
1 file
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
and it supports PCIe boot. Enable config options for PCIe boot.
Signed-off-by: Hrushikesh Salunke
---
configs/am64x_evm_a53_defconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/configs/am64x_evm_a53_defcon
b4c30 Merge patch series "linux/bitfield.h: sync from
Linux 6.15 + winbond"
Hrushikesh Salunke (2):
pci_endpoint: Add TI K3 Cadence PCIe Endpoint Controller driver
configs: am64x_evm_a53_defconfig: Enable configs for PCI Endpoint mode
configs/am64x_evm_a53_defconfig|
since v1
1. As per feedback from Tom Rini removed the config CONFIG_PCI_DFU_MAGIC_WORD
as it was using default value.
2. Rebased on current next.
v1:
https://patchwork.ozlabs.org/project/uboot/cover/20250612085534.3457522-1-h-salu...@ti.com/
Hrushikesh Salunke (3):
arm: mach-k3: am64x: Add PCIe
PCIe as a boot mode where a host can load images directly into device
memory using DFU over PCIe
Signed-off-by: Hrushikesh Salunke
---
This patch is based on commit
9de873b4c30 Merge patch series "linux/bitfield.h: sync from
Linux 6.15 + winbond"
Changes since v1
As per feedback fro
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
and it supports PCIe boot. Enable configs options for PCIe boot.
Signed-off-by: Hrushikesh Salunke
---
configs/am64x_evm_r5_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs/am64x_evm_r5_defcon
/commit/5b7b83a9839be643410c31d56f17c2d430245813
Signed-off-by: Hrushikesh Salunke
---
This patch is based on commit
59d00e20fce Merge tag 'v2025.07-rc4' into next
drivers/phy/cadence/phy-cadence-torrent.c | 225 +-
1 file changed, 130 insertions(+), 95 deletions(-)
K3 Cadence PCIe Endpoint Controller
driver")
Signed-off-by: Hrushikesh Salunke
---
This patch is based on commit
f2220962f9c Merge patch series "sandbox: enable CONFIG_CMD_BOOTEFI_SELFTEST by
default"
drivers/pci_endpoint/pcie_cdns_ti_ep.c | 3 ++-
1 file changed, 2 insertions(+
On 27/06/25 06:40, Tom Rini wrote:
On Mon, 16 Jun 2025 22: 19: 27 +0530, Hrushikesh Salunke wrote: > This
series adds support for the Endpoint mode on Cadence PCIe controller >
on TI's K3 family of SoCs. The driver is an adaptation of the Linux >
driver (drivers/pci/controll
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
which is a Cadence PCIe Controller. To support PCI Endpoint
functionality with the PCIe0 instance of PCIe, enable the corresponding
configs.
Signed-off-by: Hrushikesh Salunke
---
configs/am64x_evm_a53_defconfig | 2 ++
1
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
and it supports PCIe boot. Enable configs options for PCIe boot.
Signed-off-by: Hrushikesh Salunke
---
configs/am64x_evm_r5_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/am64x_evm_r5_defc
PCIe as a boot mode where a host can load images directly into device
memory using DFU over PCIe
Signed-off-by: Hrushikesh Salunke
---
This patch is based on commit
59d00e20fce Merge tag 'v2025.07-rc4' into next
This feature is tested on AM64X EVM. Following are the logs corres
-rc4' into next
Regards,
Hrushikesh
Hrushikesh Salunke (2):
pci_endpoint: Add TI K3 Cadence PCIe Endpoint Controller driver
configs: am64x_evm_a53_defconfig: Enable configs for PCI Endpoint mode
configs/am64x_evm_a53_defconfig| 2 +
drivers/pci_endpoint/Kconfig |
,
Hrushikesh
Hrushikesh Salunke (3):
arm: mach-k3: am64x: Add PCIe device as a boot media
configs: am64x_evm_r5_defconfig: Enable configs for PCIe boot
configs: am64x_evm_a53_defconfig: Enable configs for PCIe boot
arch/arm/mach-k3/am64x/boot.c | 3 +++
configs/am64x_evm_a53_defconfig | 8
AM64X SoC supports PCIe boot, when PCIe controller is configured in
endpoint mode. Now U-Boot has support required for PCIe boot add PCIe
as a valid "bootmedia" to allow booting over PCIe on AM64X.
Signed-off-by: Hrushikesh Salunke
---
arch/arm/mach-k3/am64x/boot.c | 3 +++
1 file
Add support for Endpoint mode of operation in the Cadence PCIe
Controller present on TI's K3 SoCs. This driver is an adaptation of the
Linux driver.
Signed-off-by: Hrushikesh Salunke
---
drivers/pci_endpoint/Kconfig | 6 +
drivers/pci_endpoint/Makefile | 1 +
dr
TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
and it supports PCIe boot. Enable config options for PCIe boot.
Signed-off-by: Hrushikesh Salunke
---
configs/am64x_evm_a53_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs/am64x_evm_a53_defc
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