node in device tree so that S-mode
software can access this information.
This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra
---
arch/riscv
Keep all the fdt fixups together for better code management.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
arch/riscv/lib/bootm.c | 33 -
arch/riscv/lib/fdt_fixup.c | 33 +
2 files changed, 33 insertions(+), 33
gt; > >
> > > On Fri, Apr 17, 2020 at 9:12 AM Rick Chen wrote:
> > > >
> > > > Hi Bin
> > > >
> > > > > Hi Rick,
> > > > >
> > > > > On Fri, Apr 17, 2020 at 8:51 AM Rick Chen
> > > > >
FU540 uses OF_SEPARATE instead of OF_PRIOR_STAGE.
Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
arch/riscv/lib/fdt_fixup.c | 15 +++
configs/sifive_fu540_defconfig | 1 +
2 files changed, 16 insertions
b
in Linux kernel will parse this node and pass it to the real kernel
in "a0" before jumping to it.
Signed-off-by: Atish Patra
Reviewed-by: Rick Chen
Reviewed-by: Bin Meng
Tested-by: Heinrich Schuchardt
---
arch/riscv/lib/bootm.c | 22 ++
1 file changed, 22 inserti
fi-boot-hartid".
2. Changed the property type to u32 instead of u64 for RV32 compatibility.
Atish Patra (6):
riscv: Add boot hartid to device tree
fdtdec: Fix boundary check
riscv: Provide a mechanism to fix DT for reserved memory
riscv: Setup reserved-memory node for FU540
riscv: Copy the
.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
lib/fdtdec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index eb11fc898e30..07ba9f5c97e9 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1311,7 +1311,8 @@ int fdtdec_add_reserved_memory
node in device tree so that S-mode
software can access this information.
This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra
Reviewed-by: Bin
Keep all the fdt fixups together for better code management.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
arch/riscv/lib/bootm.c | 33 -
arch/riscv/lib/fdt_fixup.c | 33 +
2 files changed, 33 insertions(+), 33
The DT used by U-Boot may be different from the DT being passed to
the OS if the DT is loaded from external media such as network or
mmc. In that case, the reserved-memory node needs to be copied to
the DT passed to the OS.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
arch/riscv/lib
onfig
> @@ -193,6 +193,7 @@ config SYS_MALLOC_F_LEN
>
> config SMP
> bool "Symmetric Multi-Processing"
> + depends on SBI_V01 || !RISCV_SMODE
> help
> This enables support for systems with more than one CPU. If
> you say N here, U-Boot will run on single and multiprocessor
> --
> 2.7.4
>
Reviewed-by: Atish Patra
--
Regards,
Atish
On Mon, Apr 20, 2020 at 1:41 AM Rick Chen wrote:
>
> Hi Atish
>
> > From: Atish Patra [mailto:atish.pa...@wdc.com]
> > Sent: Sunday, April 19, 2020 3:32 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra; Bin Meng; Anup Patel; Lukas Auer; Heinrich Schuchardt;
ious version:
1. Renamed the DT node property to "boot-hartid" from "efi-boot-hartid".
2. Changed the property type to u32 instead of u64 for RV32 compatibility.
Atish Patra (6):
riscv: Add boot hartid to device tree
fdtdec: Fix boundary check
riscv: Provide a mechanism to fix
The DT used by U-Boot may be different from the DT being passed to
the OS if the DT is loaded from external media such as network or
mmc. In that case, the reserved-memory node needs to be copied to
the DT passed to the OS.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
Tested-by: Bin Meng
b
in Linux kernel will parse this node and pass it to the real kernel
in "a0" before jumping to it.
Signed-off-by: Atish Patra
Reviewed-by: Rick Chen
Reviewed-by: Bin Meng
Tested-by: Heinrich Schuchardt
Tested-by: Bin Meng
---
arch/riscv/lib/bootm.c | 22 ++
1 file ch
.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
lib/fdtdec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 9ecfa2a2d743..460f0d250b4d 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1311,7 +1311,8 @@ int fdtdec_add_reserved_memory
node in device tree so that S-mode
software can access this information.
This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra
Reviewed-by: Bin
FU540 uses OF_SEPARATE instead of OF_PRIOR_STAGE.
Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
arch/riscv/lib/fdt_fixup.c | 15 +++
configs/sifive_fu540_defconfig | 1 +
2 files
Keep all the fdt fixups together for better code management.
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
arch/riscv/lib/bootm.c | 33 -
arch/riscv/lib/fdt_fixup.c | 33 +
2 files changed, 33 insertions(+), 33
On Tue, Apr 21, 2020 at 1:25 AM Rick Chen wrote:
>
> Hi Atish
>
> > On Mon, Apr 20, 2020 at 1:41 AM Rick Chen wrote:
> > >
> > > Hi Atish
> > >
> > > > From: Atish Patra [mailto:atish.pa...@wdc.com]
> > > > Sent: Sunday, April 1
SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled.
There is no point in supporting SMP related (IPI and fences) SBI calls
when SBI_V02 is enabled.
Modify all the SMP related SBI calls to be defined only for SBI_V01.
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/sbi.h
]) blockquote[type=cite] blockquote[type=cite]
blockquote[type=cite] blockquote[type=cite] blockquote[type=cite] {
border-color: rgb(233,185,110);
}
On Thu, 2019-10-10 at 14:23 -0700, Atish Patra wrote:
> Add gz parsing logic so that booti can parse both Image
> and Image.gz to boot Linux. Cu
On Thu, 2019-10-10 at 14:23 -0700, Atish Patra wrote:
> Add gz parsing logic so that booti can parse both Image
> and Image.gz to boot Linux. Currently, it is difficult to calculate
> a safe address for every board where the Image.gz can be
> decompressed.
> It is also not possibl
ge->fdt_addr, &uboot_node);
> if (ret) {
> - pr_err("Can't find U-Boot node, %d", ret);
> + pr_err("Can't find U-Boot node, %d\n", ret);
> hang();
> }
>
> --
> 2.26.2
>
Reviewed-by: Atish Patra
--
Regards,
Atish
On Wed, Jun 10, 2020 at 2:05 AM Bin Meng wrote:
>
> Hi Atish,
>
> On Wed, Jun 3, 2020 at 2:23 AM Atish Patra wrote:
> >
> > On Thu, May 28, 2020 at 1:47 AM Bin Meng wrote:
> > >
> > > From: Bin Meng
> > >
> > > The FDT blob migh
Use fdtdec_get_addr_size_auto_parent that automatically calculate the
cell sizes and optimized for the given usecase.
Signed-off-by: Atish Patra
---
arch/riscv/lib/fdt_fixup.c | 2 +-
lib/fdtdec.c | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/lib/fdt_fixup
Not all errors are fatal. If a reserved memory node already exists in the
destination device tree, we can continue to boot without failing.
Signed-off-by: Atish Patra
---
arch/riscv/lib/fdt_fixup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/lib/fdt_fixup.c b
On Wed, Jun 17, 2020 at 5:46 PM Bin Meng wrote:
>
> Hi Atish,
>
> On Thu, Jun 18, 2020 at 7:51 AM Atish Patra wrote:
> >
> > fdtdec_get_addr_size uses a fixed value for address_cells & size_cells
> > which may not work correctly always. fdtdec_get_addr_siz
On Thu, Jun 18, 2020 at 12:19 AM Bin Meng wrote:
>
> Hi Atish,
>
> On Thu, Jun 18, 2020 at 3:04 PM Atish Patra wrote:
> >
> > On Wed, Jun 17, 2020 at 5:46 PM Bin Meng wrote:
> > >
> > > Hi Atish,
> > >
>
fdtdec_get_addr_size reads the uses a fixed value for address & size
cell properties which may not be correct always.
Use the auto variant of the function which automatically reads
#address-cells & #size-cells from parent and uses to read the "reg"
property.
Signed-off-by: Ati
Not all errors are fatal. If a reserved memory node already exists in the
destination device tree, we can continue to boot without failing.
Signed-off-by: Atish Patra
---
arch/riscv/lib/fdt_fixup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/lib/fdt_fixup.c b
fdtdec_get_addr_size_no_parent is not an optimized version if parent
node is already available with the caller.
Use fdtdec_get_addr_size_auto_parent to read the "reg" property
Signed-off-by: Atish Patra
---
arch/riscv/lib/fdt_fixup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
the Bin's series. Dropped the fix generic fdtdec code.
2. Added bootefi fix.
ption-prefix PATCH v2
Atish Patra (3):
riscv: Do not return error if reserved node already exists
riscv: Use optimized version of fdtdec_get_addr_size_no_parent
cmd: bootefi: Honor the address & size cells properti
On Thu, Jun 18, 2020 at 11:51 PM Heinrich Schuchardt wrote:
>
> On 6/19/20 3:51 AM, Atish Patra wrote:
> > fdtdec_get_addr_size reads the uses a fixed value for address & size
> > cell properties which may not be correct always.
> >
> > Use the auto variant o
:
>
> -qemu-system-riscv32 -nographic -machine virt -kernel spl/u-boot-spl \
> +qemu-system-riscv32 -nographic -machine virt -bios spl/u-boot-spl \
> -device loader,file=u-boot.itb,addr=0x8020
>
> - For 64-bit RISC-V::
>
> -qemu-system-riscv64 -nographic
On Tue, Jun 23, 2020 at 12:24 AM Bin Meng wrote:
>
> Hi Atish,
>
> On Fri, Jun 19, 2020 at 9:52 AM Atish Patra wrote:
> >
> > Not all errors are fatal. If a reserved memory node already exists in the
> > destination device tree, we can continue to boot without
On Tue, Jun 23, 2020 at 5:51 PM Bin Meng wrote:
>
> Hi Atish,
>
> On Wed, Jun 24, 2020 at 2:17 AM Atish Patra wrote:
> >
> > On Tue, Jun 23, 2020 at 12:24 AM Bin Meng wrote:
> > >
> > > Hi Atish,
> > >
> > > On Fri, Jun 19, 2020 at 9:
fdtdec_get_addr_size_no_parent is not an optimized version if parent
node is already available with the caller.
Use fdtdec_get_addr_size_auto_parent to read the "reg" property
Signed-off-by: Atish Patra
Reviewed-by: Bin Meng
---
arch/riscv/lib/fdt_fixup.c | 6 +++---
1 file
Not all errors are fatal. If a reserved memory node already exists in the
destination device tree, we can continue to boot without failing.
Signed-off-by: Atish Patra
---
arch/riscv/lib/fdt_fixup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/lib/fdt_fixup.c b
is already merged.
2. Fixed minor typos.
Changes from v1->v2:
1. Rebased on top of the Bin's series. Dropped the fix generic fdtdec code.
2. Added bootefi fix.
Atish Patra (2):
riscv: Do not return error if reserved node already exists
riscv: Use optimized version of fdtdec_get_addr_siz
0;
> +
> err = riscv_fdt_copy_resv_mem_node(src_fdt_addr, fdt);
> if (err < 0)
> return err;
> --
> 2.7.4
>
Reviewed-by: Atish Patra
--
Regards,
Atish
/configs/sifive_fu540_defconfig
> +++ b/configs/sifive_fu540_defconfig
> @@ -16,7 +16,6 @@ CONFIG_DISPLAY_CPUINFO=y
> CONFIG_DISPLAY_BOARDINFO=y
> CONFIG_SPL_SEPARATE_BSS=y
> CONFIG_SPL_YMODEM_SUPPORT=y
> -CONFIG_OF_BOARD_FIXUP=y
> CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> CONFIG_SPL_CLK=y
> --
> 2.7.4
>
Reviewed-by: Atish Patra
--
Regards,
Atish
o accommodate new
> node");
> + return err;
> + }
> +
> fdt_for_each_subnode(node, src, offset) {
> name = fdt_get_name(src, node, NULL);
>
> --
> 2.7.4
>
Reviewed-by: Atish Patra
--
Regards,
Atish
Hi,
The latest master (423e08cb7701 (origin/master, origin/HEAD) Merge
branch '2020-07-28-misc-soc-improvements') seems to be broken for
HiFive Unleashed.
It already has Bin's fix for unleashed.
a0018fc8209c riscv: Make SiFive HiFive Unleashed board boot again
dram start and size is corrupted fo
On Thu, Jul 30, 2020 at 4:04 AM Heinrich Schuchardt wrote:
>
> On 30.07.20 12:16, Sean Anderson wrote:
> > On 7/30/20 6:03 AM, Heinrich Schuchardt wrote:
> >> Dear Sean,
> >>
> >> when trying to run grubriscv64.efi from the
> >> trini/u-boot-gitlab-ci-runner:bionic-20200526-18Jun2020 Docker image
On Thu, Jul 30, 2020 at 1:19 PM Heinrich Schuchardt wrote:
>
> Am 30. Juli 2020 22:11:39 MESZ schrieb Heinrich Schuchardt
> :
> >Am 30. Juli 2020 20:31:47 MESZ schrieb Atish Patra
> >:
> >>On Thu, Jul 30, 2020 at 4:04 AM Heinrich Schuchardt
> >> wro
The Cfp for topic proposals for RISC-V micro conference is open now. The
deadline is 15th August.
Here is the announcement.
https://www.linuxplumbersconf.org/blog/2020/risc-v-microconference-accepted-into-2020-linux-plumbers-conference/
FYI: The Linux plumbers event will be virtual this year. Mor
On Sun, Aug 2, 2020 at 9:26 PM Bin Meng wrote:
>
> Hi Atish,
>
> On Thu, Jul 30, 2020 at 5:43 AM Atish Patra wrote:
> >
> > Hi,
> > The latest master (423e08cb7701 (origin/master, origin/HEAD) Merge
> > branch '2020-07-28-misc-soc-improvements'
On Sat, Aug 8, 2020 at 7:59 AM Heinrich Schuchardt wrote:
>
> Hello Anup,
>
> I have looking at you OpenSBI code firmware/payloads/test_head.S. Here
> like in U-Boot's common/spl/spl_opensbi.c you put all but one hart in to
> an enless loop (hang).
>
> When Linux boots via UEFI it will wake up the
On Sat, Aug 8, 2020 at 9:17 AM Heinrich Schuchardt wrote:
>
> On 8/8/20 5:32 PM, Sean Anderson wrote:
> > On 8/8/20 10:59 AM, Heinrich Schuchardt wrote:
> >> Hello Anup,
> >>
> >> I have looking at you OpenSBI code firmware/payloads/test_head.S. Here
> >
> > I think the real start is in firmware/f
On Tue, Aug 4, 2020 at 7:33 AM Pragnesh Patel wrote:
>
> Hi Atish,
>
> >-Original Message-
> >From: U-Boot On Behalf Of Pragnesh Patel
> >Sent: 04 August 2020 19:55
> >To: Atish Patra ; Bin Meng ;
> >Rick Chen
> >Cc: Anup Patel ; Lukas
ic const init_fnc_t init_sequence_f[] = {
> setup_board_part2,
> #endif
> display_new_sp,
> -#ifdef CONFIG_OF_BOARD_FIXUP
> - fix_fdt,
> -#endif
> INIT_FUNC_WATCHDOG_RESET
> reloc_fdt,
> reloc_bootstage,
> --
> 2.17.1
>
Reviewed-by: Atish Patra
--
Regards,
Atish
On Sun, Aug 9, 2020 at 1:28 PM Heinrich Schuchardt wrote:
>
> Am 9. August 2020 22:08:23 MESZ schrieb Atish Patra :
> >On Sat, Aug 8, 2020 at 9:17 AM Heinrich Schuchardt
> >wrote:
> >>
> >> On 8/8/20 5:32 PM, Sean Anderson wrote:
> >> &g
On Mon, Aug 10, 2020 at 10:30 PM Heinrich Schuchardt wrote:
>
> On 8/11/20 3:55 AM, Rick Chen wrote:
> > Hi Heinrich
> >
> >> Am 9. August 2020 22:08:23 MESZ schrieb Atish Patra
> >> :
> >>> On Sat, Aug 8, 2020 at 9:17 AM Heinrich Schuchardt
&g
On Fri, 2019-11-22 at 18:19 -0800, Atish Patra wrote:
> On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote:
> > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov wrote:
> > > On Sat, Nov 9, 2019 at 2:14 AM Atish Patra
> > > wrote:
> > > > Add compres
- define supported languages
> *
> @@ -179,6 +190,11 @@ efi_status_t efi_init_obj_list(void)
> if (ret != EFI_SUCCESS)
> goto out;
>
> + /* Architecture specific setup */
> + ret = efi_setup_arch_specific();
> + if (ret != EFI_SUCCESS)
> +
specific UEFI variables or configuration tables can be created.
> >
> > Signed-off-by: Heinrich Schuchardt
> > Reviewed-by: Atish Patra
>
> OK, so I have a couple of questions:
>
> - does RISC-V use device tree? if so, why are you not passing the
> active hart via a property
On Thu, Feb 6, 2020 at 12:10 PM Alexander Graf wrote:
>
>
> On 06.02.20 19:28, Atish Patra wrote:
> > On Tue, Feb 4, 2020 at 11:43 PM Ard Biesheuvel
> > wrote:
> >> On Wed, 5 Feb 2020 at 05:53, Heinrich Schuchardt
> >> wrote:
> >>> RISC-V boo
On Thu, Feb 6, 2020 at 2:07 PM Ard Biesheuvel wrote:
>
> On Thu, 6 Feb 2020 at 21:06, Atish Patra wrote:
> >
> > On Thu, Feb 6, 2020 at 12:10 PM Alexander Graf wrote:
> > >
> > >
> > > On 06.02.20 19:28, Atish Patra wrote:
> > > > On T
RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
zero in absence of any usage.
Signed-off-by: Atish Patra
---
arch/riscv/lib
/* IAT */
> + .quad 0 /* Delay Import Descriptor */
> + .quad 0 /* CLR Runtime Header */
> + .quad 0 /* Reserved */
>
> /* Section table */
> section_table:
> --
> 2.17.0
Reviewed-by: Atish Patra
--
Regards,
Atish
's patch was drawn in because CI test would fail at "86. test/py
> qemu-riscv32 --> test_efi_selftest" with this patch alone.
>
>
> Atish Patra (1):
> riscv: Fix efi header for RV32
>
> Leo Yu-Chi Liang (2):
> riscv: Fix efi header size for RV32
For some
On 1/22/19 1:30 AM, Andreas Schwab wrote:
On Jan 21 2019, Anup Patel wrote:
On Mon, Jan 21, 2019 at 10:40 PM Andreas Schwab wrote:
On Jan 21 2019, Anup Patel wrote:
There is a fix required in BBL for real board. We have not send
this fix to riscv-pk.
Just to clarify, we hacked U-boot
OpenSBI version 0.1 is now publicly available in GitHub at
https://github.com/riscv/opensbi.
OpenSBI is an open source implementation of the RISC-V Supervisor Binary
Interface (SBI). RISC-V SBI specifications are maintained as an
independent project by the RISC-V Foundation in [Github].
This i
Probably your cross compilation is not set. Can you try this ?
export ARCH=riscv
export CROSS_COMPILE=
Sent from my iPhone
> On Feb 4, 2019, at 11:17 AM, Andreas Schwab wrote:
>
>> On Feb 03 2019, Anup Patel wrote:
>>
>> Can try with https://github.com/riscv/opensbi.git ?
>
> AS-DEPpla
On 2/10/19 10:47 AM, Auer, Lukas wrote:
On Sat, 2019-02-09 at 06:33 +, Anup Patel wrote:
From: Atish Patra
The readme guide describes the procedure to build, flash and boot
Linux
using U-boot on HiFive Unleashed. It also explains the current state
of
U-boot support and future action items
ly enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Anup Patel
Signed-off-by: Atish Patra
---
arch/riscv/Kconfig | 4
board/sifive/
On 1/20/19 12:22 PM, Auer, Lukas wrote:
Hi Anup,
On Fri, 2019-01-18 at 11:19 +, Anup Patel wrote:
From: Atish Patra
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
Why would the cl
because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
---
arch/riscv/Kconfig | 4
board/sifive/fu540/Kconfig | 42
+
board/sifive
On 1/20/19 12:34 PM, Auer, Lukas wrote:
Hi Anup,
On Fri, 2019-01-18 at 11:18 +, Anup Patel wrote:
This patchset adds SiFive Freedom Unleashed (FU540) support
to RISC-V U-Boot.
The patches are based upon latest RISC-V U-Boot tree
(git://git.denx.de/u-boot-riscv.git) at commit id
91882c472d8
On Fri, 2019-06-28 at 08:38 +, Anup Patel wrote:
> This patchset adds:
> 1. SiFive SPI driver
> 2. New MMC SPI driver based on DM_MMC and DM_SPI
> 3. Enables SiFive SPI driver and MMC SPI driver for SiFive Unleashed
> board
>
> With this patch series, we can now load files from SD card on SiFi
On 4/18/19 12:15 PM, Kevin Hilman wrote:
Palmer, Anup,
On Tue, Mar 12, 2019 at 1:55 AM Palmer Dabbelt wrote:
On Mon, 11 Mar 2019 07:33:25 PDT (-0700), bmeng...@gmail.com wrote:
On Thu, Feb 14, 2019 at 7:58 AM Kevin Hilman wrote:
Kevin Hilman writes:
Hi Anup,
Anup Patel writes:
This
On 4/18/19 4:16 PM, Kevin Hilman wrote:
Atish Patra writes:
On 4/18/19 12:15 PM, Kevin Hilman wrote:
Palmer, Anup,
On Tue, Mar 12, 2019 at 1:55 AM Palmer Dabbelt wrote:
On Mon, 11 Mar 2019 07:33:25 PDT (-0700), bmeng...@gmail.com wrote:
On Thu, Feb 14, 2019 at 7:58 AM Kevin Hilman
On 4/19/19 1:44 PM, Kevin Hilman wrote:
On Fri, Apr 19, 2019 at 1:38 PM Kevin Hilman wrote:
Atish Patra writes:
On 4/18/19 4:16 PM, Kevin Hilman wrote:
Atish Patra writes:
On 4/18/19 12:15 PM, Kevin Hilman wrote:
Palmer, Anup,
On Tue, Mar 12, 2019 at 1:55 AM Palmer Dabbelt wrote
, compressed images such as Image.gz are not supported.
Signed-off-by: Atish Patra
---
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/image.c | 60 +
cmd/Kconfig | 2 +-
cmd/booti.c | 8 --
4 files changed, 68 insertions(+), 3
On 4/23/19 5:16 PM, Marek Vasut wrote:
On 4/24/19 1:36 AM, Atish Patra wrote:
This patch adds booti support for RISC-V Linux kernel. The existing
bootm method will also continue to work as it is.
It depends on the following kernel patch which adds the header to the
flat Image.
https
-by: Atish Patra
---
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/image.c | 53 +
cmd/Kconfig | 2 +-
cmd/booti.c | 8 +--
4 files changed, 61 insertions(+), 3 deletions(-)
create mode 100644 arch/riscv/lib/image.c
diff --git
Add gz parsing logic so that booti can parse both Image
and Image.gz.
Signed-off-by: Atish Patra
---
arch/riscv/lib/image.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c
index e8802007c446
On 4/25/19 10:33 PM, Marek Vasut wrote:
On 4/25/19 9:56 PM, Atish Patra wrote:
Add gz parsing logic so that booti can parse both Image
and Image.gz.
Signed-off-by: Atish Patra
---
arch/riscv/lib/image.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion
On 4/26/19 11:05 AM, Marek Vasut wrote:
On 4/26/19 7:08 PM, Atish Patra wrote:
On 4/25/19 10:33 PM, Marek Vasut wrote:
On 4/25/19 9:56 PM, Atish Patra wrote:
Add gz parsing logic so that booti can parse both Image
and Image.gz.
Signed-off-by: Atish Patra
---
arch/riscv/lib/image.c | 28
On 4/30/19 2:52 AM, Marek Vasut wrote:
On 4/30/19 3:27 AM, Atish Patra wrote:
[...]
Yes. FIT image parsing can be done in that way. However, the idea was
here to load Image.gz directly. Image.gz is default compressed Linux
kernel image format in RISC-V.
Sigh, and the image header is
On 4/30/19 12:11 PM, Marek Vasut wrote:
On 4/30/19 8:13 PM, Atish Patra wrote:
On 4/30/19 2:52 AM, Marek Vasut wrote:
On 4/30/19 3:27 AM, Atish Patra wrote:
[...]
Yes. FIT image parsing can be done in that way. However, the idea was
here to load Image.gz directly. Image.gz is default
On 4/30/19 2:42 PM, Marek Vasut wrote:
On 4/30/19 10:38 PM, Atish Patra wrote:
On 4/30/19 12:11 PM, Marek Vasut wrote:
On 4/30/19 8:13 PM, Atish Patra wrote:
On 4/30/19 2:52 AM, Marek Vasut wrote:
On 4/30/19 3:27 AM, Atish Patra wrote:
[...]
Yes. FIT image parsing can be done in that way
On 5/1/19 3:34 AM, Marek Vasut wrote:
On 5/1/19 12:06 AM, Atish Patra wrote:
On 4/30/19 2:42 PM, Marek Vasut wrote:
On 4/30/19 10:38 PM, Atish Patra wrote:
On 4/30/19 12:11 PM, Marek Vasut wrote:
On 4/30/19 8:13 PM, Atish Patra wrote:
On 4/30/19 2:52 AM, Marek Vasut wrote:
On 4/30/19 3:27
://patchwork.kernel.org/patch/10925543/
Tested on HiFive Unleashed and QEMU.
Signed-off-by: Atish Patra
--
Changes from v2->v3
1. Updated the image header structure as per kernel patch.
2. Removed Image.gz support as it will be added as separate RFC patch.
---
arch/riscv/lib/Makefile | 1 +
arch/riscv/
://patchwork.kernel.org/patch/10925543/
Tested on HiFive Unleashed and QEMU.
Signed-off-by: Atish Patra
Reviewed-by: Tom Rini
Tested-by: Karsten Merker
---
Changes from v3->v4
1. Rebased on top of master to avoid git am errors.
Changes from v2->v3
1. Updated the image header structure as per kernel pa
On 5/5/19 4:07 AM, Karsten Merker wrote:
On Wed, May 01, 2019 at 01:07:31PM -0700, Atish Patra wrote:
This patch adds booti support for RISC-V Linux kernel. The existing
bootm method will also continue to work as it is.
It depends on the following kernel patch which adds the header to the
flat
On 5/6/19 2:27 PM, Tom Rini wrote:
On Mon, May 06, 2019 at 11:10:57PM +0200, Heinrich Schuchardt wrote:
On 5/6/19 10:39 PM, Karsten Merker wrote:
On Mon, May 06, 2019 at 10:06:39PM +0200, Heinrich Schuchardt wrote:
On 5/6/19 8:11 PM, Atish Patra wrote:
This patch adds booti support for RISC
://patchwork.kernel.org/patch/10925543/
Tested on HiFive Unleashed and QEMU.
Signed-off-by: Atish Patra
Reviewed-by: Tom Rini
Tested-by: Karsten Merker
---
Changes from v4->v5
1. Update help text for booti.
Changes from v3->v4
1. Rebased on top of master to avoid git am errors.
Changes from v2->v3
1
On 3/21/19 4:06 PM, Bin Meng wrote:
On Thu, Mar 21, 2019 at 11:39 PM Troy Benjegerdes wrote:
On Sun, Mar 17, 2019 at 07:28:31PM +0100, Lukas Auer wrote:
This patch series adds SMP support for RISC-V to U-Boot. It allows
U-Boot to run on multi-hart systems (hart is the RISC-V terminology for
h
On 5/20/19 10:26 AM, Björn Töpel wrote:
Waking this thread up, because I'm seeing similar behavior as Karsten
-- i.e. the system hangs when launching init.
Software:
QEMU emulator version 4.0.50 (v4.0.0-576-g6d8e75d41c58)
Linux kernel v5.2-rc1, defconfig
OpenSBI commit 392749f6338a ("docs: Add d
/tree/drivers/clk/sifive/fu540-prci.c#n610
Fix by aligning the U-Boot DT match string to the string that's used
in the upstream DT bindings and the Linux kernel driver.
Signed-off-by: Paul Walmsley
Signed-off-by: Paul Walmsley
Cc: Anup Patel
Cc: Atish Patra
Cc: Alexander Graf
---
d
-off-by: Paul Walmsley
Cc: Anup Patel
Cc: Atish Patra
Cc: Alexander Graf
---
drivers/clk/sifive/fu540-prci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index 2d47ebc6b1..d79d1a5351 100644
--- a/drivers/clk
On 5/29/19 10:48 PM, Bin Meng wrote:
On Thu, May 30, 2019 at 1:06 PM Atish Patra wrote:
On 5/29/19 6:19 PM, Bin Meng wrote:
On Sun, May 26, 2019 at 5:13 PM Paul Walmsley wrote:
The U-Boot PRCI driver for the SiFive FU540 uses an out-of-date DT
binding string, since the U-boot PRCI driver
On Tue, 2019-06-25 at 06:30 +, Anup Patel wrote:
> This series update SiFive Unleashed clock driver and Cadence MACB
> driver
> so that:
> 1. It is in sync with upstream Linux driver
> 2. It uses latest DT bindings as-per upstream Linux driver
>
> With this series, we can now use latest DT bin
On Mon, 2019-07-08 at 11:27 +, Chester Lin wrote:
> Change the symbol from "RISCV" to "RSCV" so the magic number can be
> 32-bit
> long, which is consistent with other architectures. This change can
> also
> be compatible with grub because grub defines this field as 32-bit
> long.
>
It is inc
> On Feb 12, 2019, at 4:18 PM, Kevin Hilman wrote:
>
> Anup Patel writes:
>
>> From: Atish Patra
>>
>> The readme guide describes the procedure to build, flash and boot Linux
>> using U-Boot on HiFive Unleashed. It also explains the current state of
On 2/13/19 1:52 AM, Auer, Lukas wrote:
On Wed, 2019-02-13 at 01:31 +, Atish Patra wrote:
On Feb 12, 2019, at 4:18 PM, Kevin Hilman
wrote:
Anup Patel writes:
From: Atish Patra
The readme guide describes the procedure to build, flash and boot
Linux
using U-Boot on HiFive Unleashed. It
...@sifive.com; Atish
Patra
Subject: Re: [PATCH v2 0/9] SMP support for RISC-V
Apparently sometimes u-boot tries to boot the kernel on heart
0 (the E51
core), which will then fail to start userspace, since that
cannot cope with the
missing fpu.
That's not possible
Yes, it is.
OpenSBI v0.3 (M
On 3/5/19 2:54 PM, Lukas Auer wrote:
Harts on RISC-V boot independently, U-Boot is responsible for managing
them. Functions are called on other harts with smp_call_function(),
which sends inter-processor interrupts (IPIs) to all other available
harts. Available harts are those marked as available
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