On 1/20/19 12:22 PM, Auer, Lukas wrote:
Hi Anup,
On Fri, 2019-01-18 at 11:19 +0000, Anup Patel wrote:
From: Atish Patra <atish.pa...@wdc.com>
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
Why would the clock device not be available?
I suspect the problem is that the clock driver is not probed pre-
relocation. Adding DM_FLAG_PRE_RELOC to the driver flags would fix
this.
The problem is serial driver gets probed first before clock driver even
if we add DM_FLAG_PRE_RELOC.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Won't this cause issues if an incorrect baudrate is set?
It might be possible that baudrate is configured by earlier boot stage.
Thus, any early information can be displayed in console by the serial
driver even if it is not configured correctly by u-boot.
Regards,
Atish
Thanks,
Lukas
Signed-off-by: Atish Patra <atish.pa...@wdc.com>
Signed-off-by: Anup Patel <anup.pa...@wdc.com>
Reviewed-by: Alexander Graf <ag...@suse.de>
---
drivers/serial/serial_sifive.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_sifive.c
b/drivers/serial/serial_sifive.c
index ea4d35d48c..537bc7a975 100644
--- a/drivers/serial/serial_sifive.c
+++ b/drivers/serial/serial_sifive.c
@@ -99,27 +99,27 @@ static int _sifive_serial_getc(struct uart_sifive
*regs)
static int sifive_serial_setbrg(struct udevice *dev, int baudrate)
{
- int err;
+ int ret;
struct clk clk;
struct sifive_uart_platdata *platdata = dev_get_platdata(dev);
+ u32 clock = 0;
- err = clk_get_by_index(dev, 0, &clk);
- if (!err) {
- err = clk_get_rate(&clk);
- if (!IS_ERR_VALUE(err))
- platdata->clock = err;
- } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS)
{
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (IS_ERR_VALUE(ret)) {
debug("SiFive UART failed to get clock\n");
- return err;
- }
-
- if (!platdata->clock)
- platdata->clock = dev_read_u32_default(dev, "clock-
frequency", 0);
- if (!platdata->clock) {
- debug("SiFive UART clock not defined\n");
- return -EINVAL;
+ ret = dev_read_u32(dev, "clock-frequency", &clock);
+ if (IS_ERR_VALUE(ret)) {
+ debug("SiFive UART clock not defined\n");
+ return 0;
+ }
+ } else {
+ clock = clk_get_rate(&clk);
+ if (IS_ERR_VALUE(clock)) {
+ debug("SiFive UART clock get rate failed\n");
+ return 0;
+ }
}
-
+ platdata->clock = clock;
_sifive_serial_setbrg(platdata->regs, platdata->clock,
baudrate);
return 0;
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