[PATCH 1/2] riscv: Introduce AVAILABLE_HARTS

From: Rick Chen In SMP all harts will register themself in available_hart during start up. Then main hart will send IPI to other harts according to this variables. But this mechanism may not guarantee that all other harts can jump to next stage. When main hart is sending IPI to other hart accord

[PATCH 2/2] riscv: ae350: Disable AVAILABLE_HARTS

From: Rick Chen Disable AVAILABLE_HARTS mechanism to make sure that all harts can boot to Kernel shell successfully. Signed-off-by: Rick Chen --- configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/ae350_rv32_sp

[PATCH] riscv: ae350: Increase malloc size for binman spl flow

From: Rick Chen It will need larger heap size for u-boot-spl to load u-boot.itb which be generated from binman than USE_SPL_FIT_GENERATOR. Signed-off-by: Rick Chen --- configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv64_spl_defconfig |

[PATCH] MAINTAINERS: Add a co-maintainer for RISC-V

From: Rick Chen Add Leo as co-maintainer for RISC-V. Signed-off-by: Rick Chen --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index a7a62df..ee89d50 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -947,6 +947,7 @@ F: arch/powerpc/cpu/mpc86xx/ RIS

[PATCH] riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg

From: Rick Chen Use fdtdec_get_addr_size_auto_noparent to read the "reg" property instead of fdtdec_get_addr. This will increase the compatibility of dtb parsing. Signed-off-by: Rick Chen --- board/AndesTech/ax25-ae350/ax25-ae350.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[U-Boot] [PATCH v2 01/10] riscv: ax25: add SPL support

SPL_CPU_SUPPORT + imply SPL_OPENSBI + imply SPL_LOAD_FIT help Run U-Boot on AndeStar V5 platforms and use some specific features which are provided by Andes Technology AndeStar V5 families. -- 2.7.4 ___ U-Boot mailing

[U-Boot] [PATCH v2 00/10] RISC-V AX25-AE350 support SPL

From: Rick Chen This series add support for SPL to AX25-AE350. U-Boot SPL can boot from RAM or ROM and jump to OPenSbi(FW_DYNAMIC firmware) and U-Boot proper from RAM or MMC devices. Also fix some bugs of andes plic driver and improve cache configurations for SPL. Changes in v2: - Remove

[U-Boot] [PATCH v2 04/10] riscv: andes_plic: Fix some wrong configurations

From: Rick Chen Fix two wrong settings of andes plic driver as below: 1. Fix wrong pending register base definition. 2. Declaring the en variable in enable_ipi() as unsigned int instead of int can help to fix wrong plic enabling setting in RV64. Signed-off-by: Rick Chen Cc: KC Lin Cc

[U-Boot] [PATCH v2 02/10] riscv: ax25-ae350: add SPL configuration

From: Rick Chen This patch provides four configurations which can support U-Boot SPL to boot from RAM or FLASH and then boot FIT image including OpenSBI FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices. With ae350_rv[32|64]_spl_defconfigs: U-Boot SPL will be loaded by g

[U-Boot] [PATCH v2 05/10] riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL

From: Rick Chen The mcache_ctl csr only can be manipulated in M mode. Add SPL_RISCV_MMODE for U-Boot SPL to control cache operation. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- arch/riscv/cpu/ax25/cache.c | 60 ++--- 1 file changed, 46 inserti

[U-Boot] [PATCH v2 03/10] riscv: ax25-ae350: Use generic memory size setup

From: Rick Chen To get memory size from device tree instead of get_ram_size(). This can avoid memory access fault in U-Boot proper after PMP configurations in OpenSBI. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- board/AndesTech/ax25-ae350/ax25-ae350.c | 21 ++--- 1 f

[U-Boot] [PATCH v2 06/10] spl: cache: Allow cache drivers in SPL

From: Rick Chen When ax25-ae350 try to enable v5l2 cache driver in SPL configuration, it need this option for cache support in SPL. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- common/spl/Kconfig | 7 +++ drivers/Makefile | 1 + 2 files changed, 8 insertions(+) diff --git a/co

[U-Boot] [PATCH v2 08/10] riscv: dts: Support four cores SMP

From: Rick Chen Add CPU2 and CPU3 information in cpus node to support four cores SMP booting. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- arch/riscv/dts/ae350_32.dts | 57 ++--- arch/riscv/dts/ae350_64.dts | 57

[U-Boot] [PATCH v2 09/10] riscv: dts: Add #address-cells and #size-cells in nor node

From: Rick Chen Those are required for cfi-flash driver to get correct address information. Also modify size description correctly. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- arch/riscv/dts/ae350_32.dts | 4 +++- arch/riscv/dts/ae350_64.dts | 4 +++- 2 files changed, 6 insertions(+

[U-Boot] [PATCH v2 10/10] doc: update AX25-AE350 RISC-V documentation

+--- +Before building U-Boot SPL, OpenSBI must be build first. OpenSBI can be +cloned and build for AE350 as below: + +git clone https://github.com/riscv/opensbi.git +cd opensbi +make PLATFORM=andes/ae350 + +Copy OpenSBI FW_DYNAMIC image (build\platform\andes\ae350\firmware

[U-Boot] [PATCH v2 07/10] riscv: Fix clear bss loop in the start-up code

From: Rick Chen For RV64, it will use sd instruction to clear t0 register, and the increament will be 8 bytes. So if the difference between__bss_strat and __bss_end was not 8 bytes aligned, the clear bss loop will overflow and acks like system hang. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan

[U-Boot] [PATCH 0/8] RISC-V AX25-AE350 support SPL

From: Rick Chen This series add support for SPL to AX25-AE350. U-Boot SPL can boots from RAM or ROM and jump to OPenSbi(FW_DYNAMIC firmware) and U-Boot proper from RAM or MMC devices. Also fix some bugs for andes plic driver and improve cache configurations for SPL. Following are the booting

[U-Boot] [PATCH 1/8] riscv: ax25: add SPL support

some specific features which are provided by Andes Technology AndeStar V5 families. -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH 2/8] riscv: ax25-ae350: add SPL configuration

From: Rick Chen This patch provides four configurations which can support U-Boot SPL to boot from RAM or FLASH and then boot FIT image including OpenSBI FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices. With ae350_rv[32|64]_spl_defconfigs: U-Boot SPL will be loaded by g

[U-Boot] [PATCH 4/8] riscv: andes_plic: Fix some wrong configurations

From: Rick Chen It will work fine due to hart 0 always will be main hart coincidentally. When develop SPL flow, I try to force other harts to be main hart. And it will go wrong in sending IPI flow. So fix it. Having this fix, any hart can be main hart in U-Boot SPL theoretically, but it still fa

[U-Boot] [PATCH 3/8] riscv: ax25-ae350: Use generic memory size setup

From: Rick Chen To get memory size from device tree instead of get_ram_size(). This can avoid memory access fault in U-Boot proper after PMP configurations in OpenSbi. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- board/AndesTech/ax25-ae350/ax25-ae350.c | 21 ++--- 1 f

[U-Boot] [PATCH 6/8] spl: cache: Allow cache drivers in SPL

From: Rick Chen When ax25-ae350 try to enable v5l2 cache driver in SPL configuration, it need this option for cache support in SPL. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- common/spl/Kconfig | 7 +++ drivers/Makefile | 1 + 2 files changed, 8 insertions(+) diff --git a/co

[U-Boot] [PATCH 5/8] riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL

From: Rick Chen The mcache_ctl csr only can be manipulated in M mode. Add SPL_RISCV_MMODE for U-Boot SPL to control cache operation. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- arch/riscv/cpu/ax25/cache.c | 60 ++--- 1 file changed, 46 inserti

[U-Boot] [PATCH 8/8] riscv: dts: Support four cores SMP

From: Rick Chen Add CPU2 and CPU3 informations in cpus node to support four cores SMP booting. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- arch/riscv/dts/ae350_32.dts | 51 ++--- arch/riscv/dts/ae350_64.dts | 51 +++

[U-Boot] [PATCH 7/8] riscv: Fix clear bss loop in the start-up code

From: Rick Chen For RV64, it will use sd instruction to clear t0 register, and the increament will be 8 bytes. So if the difference between__bss_strat and __bss_end was not 8 bytes aligned, the clear bss loop will overflow and acks like system hang. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan

[PATCH 1/2] riscv: ae350: Fix OF_BOARD boot failure

From: Rick Chen Enable OF_HAS_PRIOR_STAGE for ae350 boards with OF_BOARD Fixes: 239d22c79520 ("fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARD") Signed-off-by: Rick Chen --- board/AndesTech/ax25-ae350/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/AndesTech/ax2

[PATCH 2/2] riscv: ae350: Fix OF_BOARD boot failure

From: Rick Chen Disable BINMAN_FDT for ae350 boards which don't actually use it. Fixes: 836eac7c6fe3 ("fdt: Make OF_BOARD a bool option") Signed-off-by: Rick Chen --- configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv64_spl_defconfig |

[PATCH] riscv: ae350: Fix xip config boot failure

From: Rick Chen It will fail to boot with ae350_rv[32|64]_spl_xip_defconfig. It need to add OONFIG_XIP to get the specific HW address for DTB. Also drop OF_SEPARATE in board_fdt_blob_setup() because it will never reach here anyway.It only allow OF_BOARD to call board_fdt_blob_setup() in fdtdec_se

[U-Boot] [PATCH] nds32: add support for leopard and orca board boot flow auto detect

From: rick hardware difference between leopard and orca as below: flash setting leoaprd orca bank size 32MB64MB bus width 32-bits 16-bits Signed-off-by: rick --- arch/nds32/cpu/n1213/ag101/asm-offsets.c |1 + arch/nds32/cpu/n1213/ag101/lowlevel_init.S

[U-Boot] [PATCH] nds32: fix code/data will be corrupted on ram in rum time

From: rick can not execute get_ram_size(), because the text/data will be corrupted by itself in specific case. Signed-off-by: rick Cc: Andes --- board/AndesTech/adp-ag101p/adp-ag101p.c | 18 +++--- 1 files changed, 7 insertions(+), 11 deletions(-) diff --git a/board/AndesTech

[U-Boot] [PATCH] nds32: Change of NDS32 Custodian

Signed-off-by: Andes Cc: Macpaul Lin Cc: Kuan-Yu Kuo --- MAINTAINERS |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 081cf96..c6fd555 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1358,7 +1358,7 @@ Dimitar Penev # Board

[U-Boot] [PATCH] riscv: configs: Rename ax25-ae350 defconfig

From: Rick Chen Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Signed-off-by: Rick Chen Cc: Greentime Hu --- configs/a25-ae350_32_defconfig | 36 con

[U-Boot] [PATCH v2] riscv: configs: Rename ax25-ae350 defconfig

From: Rick Chen Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Signed-off-by: Rick Chen Cc: Greentime Hu --- Changes since v1: Use git format-patch �VM to show delta when rename. --- con

[U-Boot] [PATCH v3 0/3] Rename ax25-ae350 defconfig

From: Rick Chen Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Changes since v2: - Fix travis failure case 6.51 Checkfor configs without MAINTAINERS entry. https://travis-ci.org/rickchen

[U-Boot] [PATCH v3 1/3] riscv: configs: Rename ax25-ae350 defconfig

From: Rick Chen Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng --- configs/a25-ae350_32_defconfig | 36 --

[U-Boot] [PATCH v3 2/3] MAINTAINERS: Sync for ax25-ae350 rename

From: Rick Chen Rename a25-ae350_32_defconfig as ae350_rv32_defconfig ax25-ae350_64_defconfig as ae350_rv64_defconfig Signed-off-by: Rick Chen Cc: Greentime Hu --- board/AndesTech/ax25-ae350/MAINTAINERS | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/board/AndesTech/a

[U-Boot] [PATCH v3 3/3] doc: README.ae350: Sync for ax25-ae350 rename

From: Rick Chen Rename ax25-ae350 as ae350_rv[32|64] for 32 or 64 bit. Signed-off-by: Rick Chen Cc: Greentime Hu --- doc/README.ae350 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.ae350 b/doc/README.ae350 index fe75b80..189a6b7 100644 --- a/doc/README.ae350 ++

[U-Boot] [PATCH v4 0/2] Rename ax25-ae350 defconfig

From: Rick Chen Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Changes since v3: - squashed [PATCH v3 2/3] MAINTAINERS: Sync for ax25-ae350 rename into [PATCH v3 1/3] riscv:

[U-Boot] [PATCH v4 1/2] riscv: configs: Rename ax25-ae350 defconfig

From: Rick Chen Remove cpu name from the defconfig naming. Because other cpus maybe run on AE350 platform. So only use platfrom name in defconfig naming will be better. Also sync MAINTAINERS: Rename a25-ae350_32_defconfig as ae350_rv32_defconfig ax25-ae350_64_defconfig as ae350_rv64_defconfig S

[U-Boot] [PATCH v4 2/2] doc: README.ae350: Sync for ax25-ae350 rename

From: Rick Chen Rename ax25-ae350 as ae350_rv[32|64] for 32 or 64 bit. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng --- doc/README.ae350 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.ae350 b/doc/README.ae350 index fe75b80..189a6b7 100644 --

[U-Boot] [PATCH] travis.yml: Support RISC-V 64-bit

From: Rick Chen Fix riscv: ax25-ae350 build fail problem https://travis-ci.org/trini/u-boot/jobs/385147373 ... Building current source for 1 boards (1 thread, 2 jobs per thread) riscv: + ax25-ae350 +arch/riscv/cpu/ax25/start.S: Assembler messages: +arch/riscv/cpu/ax25/start.S:48: Error:

[U-Boot] [PATCH 0/4] Support nds32 pre-build toolchain

From: Rick Chen 1. Support nds32 pre-build toolcahin for buildman. 2. Fix some bugs about fpu and toolchain issues. Rick Chen (4): .travis.yml: Support nds32 prebuilt toolchain nds32: Remove gcc unused option nds32: Generate SW fpu instruction. nds32: Fix boot fail issue when build with

[U-Boot] [PATCH 1/4] .travis.yml: Support nds32 prebuilt toolchain

From: Rick Chen Download nds32 prebuild toolchain from github which is base on gcc 8.0.1 version for regression. Signed-off-by: Rick Chen Cc: Greentime Hu --- .travis.yml | 9 + 1 file changed, 9 insertions(+) diff --git a/.travis.yml b/.travis.yml index 321fd79..4b7c696 100644 --- a

[U-Boot] [PATCH 2/4] nds32: Remove gcc unused option

From: Rick Chen -G0 is an old option, not support now, So remove it. It can help to fix compile error when build with nds32 pre-build toolchain. Signed-off-by: Rick Chen Cc: Greentime Hu --- arch/nds32/config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/nds32/co

[U-Boot] [PATCH 3/4] nds32: Generate SW fpu instruction.

From: Rick Chen Force it to generate SW fup instruction. It help to avoid bugs when running on no-HW-fpu board, but compile with v3f which support HW fpu instruction. Signed-off-by: Rick Chen Cc: Greentime Hu --- arch/nds32/config.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

[U-Boot] [PATCH 4/4] nds32: Fix boot fail issue when build with elf-mculib.

From: Rick Chen Add -mcmodel=large can let elf-mculib have the same default behavior just like linux-glibc. And it help to pass U-Boot booting sequence. Signed-off-by: Rick Chen Cc: Greentime Hu --- arch/nds32/config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/

[U-Boot] [PATCH] nds32: dts: Fix mmc node compatible string

From: Rick Chen In the two commits: cf3922dddc44a968685b535f2af195f1e51f4a7b mmc: ftsdc010_mci: Sync compatible with DT mmc node c14e90e8445e7b1c3531b4bdeb778c47bd6570eb riscv: dts: Sync DT with Linux Kernel ftsdc010_mci's compatible has been modified as "andestech,atfsdc010" for RISC-V synchro

[U-Boot] [PATCH] riscv: cache: Implement i/dcache [status, enable, disable]

pport" + def_bool n + help + Say Y here if you plan to run U-Boot on AndeStar v5 + platforms and use some specific features which are + provided by Andes Technology AndeStar V5 Families. + endmenu diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/

[U-Boot] [PATCH] riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

From: Rick Chen ax25-ae350 use CONFIG_OF_BOARD which allow the board to override the fdt address. And prior_stage_fdt_address offer a temporary memory address to keep the dtb address which was passed from loader(gdb) to u-boot with a1. Signed-off-by: Rick Chen Cc: Greentime Hu --- board/Andes

[U-Boot] [PATCH v2] riscv: cache: Implement i/dcache [status, enable, disable]

default n + help + Say Y here if you plan to run U-Boot on AndeStar v5 + platforms and use some specific features which are + provided by Andes Technology AndeStar V5 Families. + endmenu diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/ax25/Make

[U-Boot] [PATCH v3] riscv: cache: Implement i/dcache [status, enable, disable]

7 @@ +config RISCV_NDS + bool "AndeStar V5 ISA support" + default n + help + Say Y here if you plan to run U-Boot on AndeStar v5 + platforms and use some specific features which are + provided by Andes Technology AndeStar V5 Fam

[U-Boot] [PATCH] riscv: dts: Sync to Linux Kernel ae350 dts.

From: Rick Chen Use same dts to boot U-Boot and Kernel. Following are the change notes : 1 Remove early printk bootargs. 2 Timer frequency are changed to 60MHz. 3 Add dma, snd, lcd, virtio nodes which are used in kernel drivers. They does not been used by U-Boot. 4 Change spi irq from 3 to 4.

[U-Boot] [PATCH 1/2] riscv: configs: Separate ax25-ae350 for 32/64 bit.

From: Rick Chen Separate ax25-ae350 from one to two for 32 and 64 bit individually. And also select different dts for 32 and 64 bit. Signed-off-by: Rick Chen Cc: Greentime Hu --- configs/ax25-ae350-32_defconfig | 33 + configs/ax25-ae350-64_defconfig | 34 +

[U-Boot] [PATCH 2/2] riscv: dts: Add ae350_32.dts for 32 bit

From: Rick Chen Add ae350_32.dts for 32 bit. And also rename ae350.dts to ae350_64.dts for 64 bit. Signed-off-by: Rick Chen Cc: Greentime Hu --- arch/riscv/dts/ae350.dts| 229 arch/riscv/dts/ae350_32.dts | 229 ++

[U-Boot] [PATCH] board: ax25-ae350: Print board information.

From: Rick Chen Add to print board and bit information message. Signed-off-by: Rick Chen Cc: Greentime Hu --- board/AndesTech/ax25-ae350/ax25-ae350.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 5f

[U-Boot] [PATCH] nds32: Support relocation.

From: rick Enable pie option for relocation. Signed-off-by: rick Cc: Andes --- arch/nds32/config.mk |2 +- arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 13 +-- arch/nds32/cpu/n1213/start.S | 120 +++- arch/nds32/cpu/n1213/u

[U-Boot] [PATCH] nds32: eth: Support ftmac100 DM.

From: rick Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x200;setenv fdt_high 0x1f0; NDS32 # dhcp 0x60 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP bro

[U-Boot] [PATCH] nds32: mmc: Support ftsdc010 DM.

chip->cfg.host_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; - break; - default: - break; - } - + set_bus_width(regs , &chip->cfg); chip->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; chip->cfg.f_max = chip->sclk / 2; ch

[U-Boot] [PATCH 1/3] nds32: mmc: Support ftsdc010 DM.

VDD_33_34; chip->cfg.f_max = chip->sclk / 2; chip->cfg.f_min = chip->sclk / 0x100; @@ -373,3 +452,4 @@ int ftsdc010_mmc_init(int devid) return 0; } +#endif diff --git a/drivers/mmc/ftsdc010_mci.h b/drivers/mmc/ftsdc010_mci.h new file mode 100644 in

[U-Boot] [PATCH 3/3] nds32: board: Support ftsdc010 DM.

From: rick Support Andestech ftsdc010 SD/MMC device tree flow on AG101P/AE3XX platforms. Signed-off-by: rick --- board/AndesTech/adp-ae3xx/adp-ae3xx.c |4 +--- board/AndesTech/adp-ag101p/adp-ag101p.c |7 +-- configs/adp-ae3xx_defconfig |5 + configs/adp-ag101p

[U-Boot] [PATCH 2/3] nds32: dts: Support ftsdc010 DM.

From: rick Support Andestech ftsdc010 SD/MMC device tree flow on AG101P/AE3XX platforms. Signed-off-by: rick --- arch/nds32/dts/ae3xx.dts |8 arch/nds32/dts/ag101p.dts |8 2 files changed, 16 insertions(+) diff --git a/arch/nds32/dts/ae3xx.dts b/arch/nds32/dts/ae3xx

[U-Boot] [PATCH 1/4] nds32: mmc: Support ftsdc010 DM.

From: rick Add nds32_mmc to support ftsdc010 dm flow. Signed-off-by: rick --- drivers/mmc/Kconfig | 12 + drivers/mmc/Makefile|1 + drivers/mmc/nds32_mmc.c | 136 +++ 3 files changed, 149 insertions(+) create mode 100644 drivers/m

[U-Boot] [PATCH 2/4] nds32: ftsdc010: Support ftsdc010 DM.

/drivers/mmc/ftsdc010_mci.h b/drivers/mmc/ftsdc010_mci.h new file mode 100644 index 000..63e85ee --- /dev/null +++ b/drivers/mmc/ftsdc010_mci.h @@ -0,0 +1,53 @@ +/* + * Faraday FTSDC010 Secure Digital Memory Card Host Controller + * + * Copyright (C) 2011 Andes Technology Corporation + * Macpaul Lin,

[U-Boot] [PATCH 3/4] nds32: dts: Support ftsdc010 DM.

From: rick Add dts to support ftsdc010 dm flow on AG101P/AE3XX platform. Signed-off-by: rick --- arch/nds32/dts/ae3xx.dts |8 arch/nds32/dts/ag101p.dts |8 2 files changed, 16 insertions(+) diff --git a/arch/nds32/dts/ae3xx.dts b/arch/nds32/dts/ae3xx.dts index 4221e

[U-Boot] [PATCH 4/4] nds32: board: Support ftsdc010 DM.

From: rick AG101P/AE3XX enable ftsdc010 dm flow. Signed-off-by: rick --- board/AndesTech/adp-ag101p/adp-ag101p.c |2 ++ configs/adp-ae3xx_defconfig |3 +++ configs/adp-ag101p_defconfig|3 +++ include/configs/adp-ae3xx.h |1 - include/configs/

[U-Boot] [PATCH 1/3] nds32: Support AG101P serial DM.

From: rick Support AG101P serial device tree flow. Signed-off-by: rick --- arch/Kconfig|1 + arch/nds32/cpu/n1213/start.S| 10 +--- arch/nds32/dts/Makefile | 14 +++ arch/nds32/dts/ag101p.dts | 49 +

[U-Boot] [PATCH 2/3] nds32: Support AG101P timer DM.

From: rick Support AG101P timer device tree flow. Signed-off-by: rick --- arch/nds32/cpu/n1213/ag101/timer.c |3 +- arch/nds32/dts/ag101p.dts |8 +++ configs/adp-ag101p_defconfig |2 + drivers/timer/Kconfig |6 ++ drivers/timer/Makefile |

[U-Boot] [PATCH 3/3] nds32: Support AE3XX platform.

ductor +# Written-by: Prafulla Wadaskar +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation +# Macpaul Lin, Andes Technology Corporation +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := cpu.o timer.o +obj-y += lowlevel_init.o + +if

[U-Boot] [PATCH] nds32: Fix compile error.

From: rick Fix compile error with gcc 4.9.3 Signed-off-by: rick Cc: Andes --- arch/nds32/cpu/n1213/start.S |2 +- arch/nds32/include/asm/macro.h | 22 +++--- arch/nds32/include/asm/posix_types.h |4 3 files changed, 16 insertions(+), 12 deletions

[U-Boot] [PATCH] nds32: fix mmc rescan hang problem.

From: rick When execute mmc rescan command, system will hang. Signed-off-by: rick --- common/cmd_mmc.c |9 + common/env_common.c |3 +++ include/environment.h |3 +++ 3 files changed, 15 insertions(+) diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index dfc1ec8..3

[U-Boot] [PATCH] nds32: Support serial DM.

From: rick Add device tree source file and enable DM and DM_SERIAL ag101p board can run ns16550 serial DM flow. Signed-off-by: rick Cc: Andes --- arch/Kconfig|1 + arch/nds32/cpu/n1213/start.S| 13 + arch/nds32/dts/Makefile | 14 + arch

[U-Boot] [PATCH] nds32: Support timer DM.

From: rick Add ag101p baord timer DM driver. Signed-off-by: rick Cc: Andes --- arch/nds32/cpu/n1213/ag101/timer.c |3 +- arch/nds32/dts/ag101p.dts |1 + configs/adp-ag101p_defconfig |2 + drivers/timer/Kconfig |6 ++ drivers/timer/Makefile

[U-Boot] [PATCH] nds32: Support mmc DM.

From: rick Add Andestech mmc DM driver for ag101p board. Do not use get_timer() to check mmc state can improve throughput performance. Signed-off-by: rick Cc: Andes --- arch/nds32/dts/ag101p.dts |8 ++ board/AndesTech/adp-ag101p/adp-ag101p.c |2 + configs/adp

[U-Boot] [PATCH] nds32: Support eth DM.

From: rick Add eth DM driver for ag101p board. Enable random ethaddr. Signed-off-by: rick Cc: Andes --- arch/nds32/dts/ag101p.dts |1 + board/AndesTech/adp-ag101p/adp-ag101p.c |5 +- configs/adp-ag101p_defconfig|3 + drivers/net/Kconfig

[U-Boot] [PATCH 1/3] nds32: mmc: Support mmc DM.

From: rick Add Andestech mmc DM driver for ag101p board. Do not use get_timer() to check mmc state can improve throughput performance. Signed-off-by: rick Cc: Andes --- drivers/mmc/Kconfig|7 +++ drivers/mmc/Makefile |1 + drivers/mmc/ftsdc010_mci.c | 106

[U-Boot] [PATCH 2/3] nds32: mmc: Support mmc DM.

From: rick Enable mmc DM flow as default for ag101p board. Signed-off-by: rick c: Andes --- board/AndesTech/adp-ag101p/adp-ag101p.c |2 ++ configs/adp-ag101p_defconfig|4 2 files changed, 6 insertions(+) diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board

[U-Boot] [PATCH 3/3] nds32: mmc: Support mmc DM.

From: rick Add dts mmc node for ag101p board. Signed-off-by: rick Cc: Andes --- arch/nds32/dts/ag101p.dts |8 1 file changed, 8 insertions(+) diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts index 8099665..c87d0bd 100644 --- a/arch/nds32/dts/ag101p.dts +++ b

[U-Boot] [PATCH] spi: atcspi200: Full dm conversion

From: Rick Chen atcspi200_spi now support dt along with platform data. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Signed-off-by: Greentime Hu --- drivers/spi/atcspi200_spi.c | 134 ++ include/dm/platform_data/spi_atcspi200.h | 15 2 fil

[U-Boot] [PATCH 1/5] riscv: checkpatch: Fix Macro argument reuse

From: Rick Chen It is CHECK reported by checkpatch.pl CHECK: Macro argument reuse 'PTE' - possible side-effects? Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/include/asm/encoding.h| 16 +++- arch/riscv/include/asm/posix_types.h | 12 arch/riscv

[U-Boot] [PATCH 2/5] riscv: checkpatch: Fix use of volatile

From: Rick Chen It is reported by checkpatch.pl WARNING: Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/include/asm/global_data.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[U-Boot] [PATCH 3/5] riscv: checkpatch: Fix alignment should match open parenthesis

From: Rick Chen It is reported by checkpatch.pl. CHECK: Alignment should match open parenthesis Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/include/asm/io.h | 23 ++- arch/riscv/include/asm/ptrace.h | 9 +++-- 2 files changed, 13 insertions(+)

[U-Boot] [PATCH 4/5] riscv: checkpatch: Fix missing a blank line after declarations

From: Rick Chen It is reported by checkpatch.pl WARNING: Missing a blank line after declarations. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/lib/bootm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.

[U-Boot] [PATCH 5/5] riscv: checkpatch: Fix static const char * array declarations

From: Rick Chen It is reported by checkpatch.pl WARNING: static const char * array should probably be static const char * const Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/lib/interrupts.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/lib/

[U-Boot] [PATCH 1/4] riscv: bootm: Support to boot riscv-linux

From: Rick Chen riscv-linux should use BBL (Berkeley bootloader) for loading the Linux kernel. U-Boot can play as FSBL(first stage bootloader) to boot BBL and riscv-linux. In BBL's init_first_hart(), it will pass dtb with a1. So implement bootm to pass arguments to BBL correctly. Signed-off-by

[U-Boot] [PATCH 2/4] riscv: bootm: Remove ATAGS

From: Rick Chen ATAGS is not supported and will be replaced by DT in riscv-linux. So can be removed now. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/include/asm/bootm.h | 49 --- arch/riscv/lib/bootm.c | 179 + 2 fi

[U-Boot] [PATCH 3/4] tools: mkimage: Support RISC-V arch

From: Rick Chen Add riscv uimage arch to support riscv-linux booting. It can Convert riscv-linux to image which can be booted by bootm command. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- common/image.c | 1 + 1 file changed, 1 insertion(+) diff --git a/common/image.c b/common/imag

[U-Boot] [PATCH 4/4] doc: ae250: Describe riscv-linux booting via u-boot

From: Rick Chen Simply record riscv-linux booting steps and messages from bbl via u-boot on QEMU in README.ae250. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- doc/README.ae250 | 148 +-- 1 file changed, 143 insertions(+), 5 deletion

[U-Boot] [PATCH 2/3] riscv: dts: AE250 support sd High-Speed mode

From: Rick Chen Enable High-Speed mode with cap-sd-highspeed in dts. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/riscv/dts/ae250.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/dts/ae250.dts b/arch/riscv/dts/ae250.dts index 5dc4fb0..9a38345 100644 --- a/arch/

[U-Boot] [PATCH 3/3] nds32: dts: AG101P support sd High-Speed mode

From: Rick Chen Enable High-Speed mode with cap-sd-highspeed in dts Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- arch/nds32/dts/ag101p.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts index 19dc36f..7832efb 100644 --- a/arc

[U-Boot] [PATCH 1/3] mmc: ftsdc010: Support High-Speed mode

From: Rick Chen ftsdc010 dm driver has been disable High-Speed mode as default to work around Andes AE3XX platform's problem, because of it does not support High-Speed mode in commit id 73cd56b2df213c629191139e5c6705e069b6214f. But other platforms or SoCs maybe support this function. So

[U-Boot] [PATCH 1/7] mmc: ftsdc010: Drop non-dm code

From: Rick Chen Only three defconfig(adp-ag101p_defconfig, adp-ae3xx_defconfig, nx25-ae250_defconfig) set CONFIG_FTSDC010=y. And they all also enable CONFIG_DM_MMC. So the non-dm code of ftsdc010 can be dropped now. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu --- drive

[U-Boot] [PATCH 2/7] board: Drop ftsdc010 non-dm code

From: Rick Chen Remove board_mmc_init() in adp-ag101p, adp-ae3xx and nx25-ae250 boards. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu --- board/AndesTech/adp-ae3xx/adp-ae3xx.c | 11 --- board/AndesTech/adp-ag101p/adp-ag101p.c | 11 --- board/AndesTech/n

[U-Boot] [PATCH 3/7] Drop CONFIG_FTSDC010_BASE

From: Rick Chen After drop non-dm code of ftsdc010, the sd register base definition can be droppped now. So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both can be removed from config_whitelist.txt Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu --- arch/nds32/incl

[U-Boot] [PATCH 4/7] Drop CONFIG_FTSDC010_NUMBER

From: Rick Chen CONFIG_FTSDC010_NUMBER was not used anymore, can be removed now. So CONFIG_FTSDC010_NUMBER can also be removed from config_whitelist.txt. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu --- include/configs/adp-ae3xx.h | 1 - include/configs/adp-ag101p.h |

[U-Boot] [PATCH 6/7] mmc: ftsdc010: Merge nds32_mmc to ftsdc010

dc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -4,23 +4,63 @@ * (C) Copyright 2010 Faraday Technology * Dante Su * + * Copyright 2018 Andes Technology, Inc. + * Author: Rick Chen (r...@andestech.com) + * * SPDX-License-Identifier:GPL-2.0+ */ #include +#include #include #include

[U-Boot] [PATCH 7/7] configs: Drop CONFIG_MMC_NDS32

From: Rick Chen Remove CONFIG_MMC_NDS32 from the three config (adp-ae3xx_defconfig, adp-ag101p_defconfig, nx25-ae250_defconfig). Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu --- configs/adp-ae3xx_defconfig | 1 - configs/adp-ag101p_defconfig | 1 - configs/nx25-ae250_d

[U-Boot] [PATCH 5/7] mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig

From: Rick Chen Convert CONFIG_FTSDC010_SDIO to Kconfig. So CONFIG_FTSDC010_SDIO can also be removed from config_whitelist.txt. Signed-off-by: Rick Chen Signed-off-by: Rick Chen Cc: Greentime Hu --- configs/adp-ae3xx_defconfig | 1 + configs/adp-ag101p_defconfig | 1 + configs/nx25-ae250_de

[U-Boot] [PATCH] ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit.

From: Rick Chen It will be work fine with unsigned long declaretion in timer register struct when system is 32 bit. But it will not work well when system is 64 bit. Replace it by u32 and verify both ok in 32/64 bit. Signed-off-by: Rick Chen --- drivers/timer/ae3xx_timer.c |4 ++-- 1 file c

[U-Boot] [PATCH 0/3] ae3xx: timer: Rename AE3XX timer to ATCPIT100

From: Rick Chen AE3XX is board name. ATCPIT100 is timer IP name. So rename AE3XX timer to ATCPIT100 timer. Rick Chen (3): ae3xx: timer: Rename AE3XX to ATCPIT100 nds32: defconfig: Rename AE3XX_TIMER to ATCPIT100_TIMER dt-bindings: timer: Add andestech atcpit100 timer binding doc configs/

[U-Boot] [PATCH 1/3] ae3xx: timer: Rename AE3XX to ATCPIT100

From: Rick Chen ATCPIT100 is Andestech timer IP which is embeded in AE3XX and AE250 boards. So rename AE3XX to ATCPIT100 will be more make sence. Signed-off-by: Rick Chen --- drivers/timer/Kconfig |7 ++- drivers/timer/Makefile |2 +- drivers/timer/ae3xx_timer.c

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