If only a single label is provided in the list, bootdev_next_label()
does not operate correctly and reads beyond the end of the pointer list.
Fix this by adding a new check. Also add a note to convert this array
to an alist
Signed-off-by: Simon Glass
---
(no changes since v3)
Changes in v3:
-
Remove CFG_SYS_SDRAM_BASE so that we can get DRAM base from dt instead of
compile time config.
Removing this config helps the u-boot more portable.
Signed-off-by: Jimmy Ho
---
include/configs/sifive-unleashed.h | 1 -
include/configs/sifive-unmatched.h | 1 -
2 files changed, 2 deletions(-)
di
Hi everyone,
could I get some feedback on this patch, in particular if creating a
temporary overlay is the right way to create the /system node if
necessary? If yes, I intend to add error checks and minimize the buffer
size, otherwise rework it for whatever is the better approach.
Best regards,
The values in the FADT are pointers so should not go through sandbox's
normal addr<->pointer mapping. Fix this.
Signed-off-by: Simon Glass
---
Changes in v4:
- Split out the command change into a separate patch
Changes in v3:
- Add new patch to correct mapping in FADT
lib/acpi/acpi_table.c |
This option is not actually defined in Kconfig anymore. Use a normal
debug print instead, which has a similar effect.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/lib/bios.c| 18 --
arch/x86/lib/bios_interrupts.c | 6 ++
2 files changed, 10 ins
Hi Alex,
++ CC Niek who originally authored this
On Thu, 20 Feb 2025 at 10:27, Ilias Apalodimas
wrote:
>
> Hi Michel,
>
> On Thu, 20 Feb 2025 at 09:14, Michel Alex
> wrote:
> >
> > Hi Ilias,
> >
> > I don't know where to find the spec for the tpm v2 nv_define command. I was
> > just wondering
On 11.03.25 14:35, Mayuresh Chitale wrote:
Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently
not supported for Risc-V. Hence, for bootm, disallow booting a FIT
or a legacy image that was built for an arch type which is different
than the current arch and for booti, set the arc
Hi Tom,
The following changes since commit 1b42f57ec82ceba4d5f08cfb359717232301cfa5:
Merge tag 'v2025.04-rc4' into next (2025-03-10 20:18:51 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-net.git/
tags/net-next-20250310
for you to fetch chan
Similar to ARM and X86, introduce a new image type which allows u-boot
to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
Signed-off-by: Mayuresh Chitale
---
boot/image.c| 3 ++-
include/image.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/boot/imag
> -Original Message-
> From: Ravulapalli, Naresh Kumar
> Sent: Tuesday, March 4, 2025 1:07 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Simon Goldschmidt
> ; Chee, Tien Fong
> ; Meng, Tingting ;
> Tom Rini ; Ng, Boon Khai ;
> Jit Loon Lim ; Alif Zakuan Yuslaimi
> ; Ravulapalli, Nar
On Tue, Mar 11, 2025 at 03:07:09PM +0530, Anshul Dalal wrote:
> Using CMD_* configs from spl doesn't make logical sense. Therefore this
> patch removes the check for CONFIG_CMD_BOOT(I|Z) from the image parsing
> code during falcon boot and adds compilation targets for image.c and
> zimage.c on SPL
Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.
Signed-off-by: Cheick Traore
Reviewed-by: Fabrice Ga
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.
Signed-off-by: Cheick Traore
---
Changes in v2:
- add the check of duty_ns and period_ns pa
The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
will be used to manage the brightness of the panel backlight on
STM32MP135F-DK.
Signed-off-by: Cheick Traore
Reviewed-by: Patrice Chotard
---
(no changes since v1)
arch/arm/dts/stm32mp13-pinctrl.dtsi | 15 +++
ar
Replace "froced" by "forced"
Signed-off-by: Richard Genoud
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index c70b42f6bcc2..3c62fc0b4282 100644
--- a/drivers/net/ti/am65-c
On Sat, 1 Mar 2025 18:49:02 +0200
Ilias Apalodimas wrote:
Hi Ilias,
> The ARM ARM on section 8.17.1 describes the cases where
Thanks for referencing the ARM ARM! The section name would be D8.17.1, and
please mention the version of the document, since the numbering is not
stable across the diff
This serie adds:
* drivers for MFD STM32 TIMERS and STM32 PWM, the driver split is
inspired by kernel model
* enable these drivers on stm32mp13 for PWM backlight available on
stm32mp135f-dk
* timer node, pwm subnode and pinctrl for PWM Backlight on
stm32mp135f-dk
Changes in v2:
- remove pw
Hi Sumit,
On Tue, Mar 11, 2025 at 04:19:58PM +0530, Sumit Garg wrote:
> Hi Markus,
>
> On Tue, 11 Mar 2025 at 16:02, Markus Schneider-Pargmann
> wrote:
> >
> > Hi,
> >
> > this series introduces support to resume from IO+DDR. IO+DDR is a low
> > power mode of am62a and am62p in which nearly ever
Enable the following configs:
* CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
timer
* CONFIG_DM_PWM: enables support for pulse-width modulation devices
* CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
* CONFIG_PWM_STM32: enables supp
On Mon, Mar 10, 2025 at 10:37 AM Anshul Dalal wrote:
> diff --git a/include/configs/xea.h b/include/configs/xea.h
> index 00d62748733..2b358a41e2b 100644
> --- a/include/configs/xea.h
> +++ b/include/configs/xea.h
> @@ -14,12 +14,6 @@
>
> #include
This header file can also be removed.
> -/* S
On Sat, Mar 08, 2025 at 09:12:05PM +0100, Marek Vasut wrote:
> Add generic implementation of the 'mkdir' command to create directories
> in filesystems using the generic filesystem API.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Tom Rini
--
Tom
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Hi Caleb,
On Wed, 22 Jan 2025 at 16:03, Caleb Connolly wrote:
>
> Signed-off-by: Caleb Connolly
Acked-by: Christopher Obbard
> ---
> configs/qcom_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
> index cd94315f1765..7a6046412
Add RESET_SPACEMIT_K1 option in config
Signed-off-by: Huan Zhou
---
arch/riscv/cpu/k1/Kconfig | 1 +
configs/bananapi-f3_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/riscv/cpu/k1/Kconfig b/arch/riscv/cpu/k1/Kconfig
index
d9cd8dce96426bb4cbe9ff38385a4c66116fe341..1420
Hi Caleb,
On Wed, 22 Jan 2025 at 16:03, Caleb Connolly wrote:
>
> Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
> Gen 2, FairPhone 5 and other devices.
>
> Signed-off-by: Caleb Connolly
I tested this series on an rb3gen2, seems to work fine.
Tested-by: Christopher Obba
On Sat, Mar 08, 2025 at 09:12:13PM +0100, Marek Vasut wrote:
> Demote "exFAT file system is not found" message to debug(). This is
> printed when U-Boot attempts to auto-detect the filesystem via generic
> filesystem API by attempting to mount the device, and fails to do so
> because there is anot
On 3/11/25 15:30, Cheick Traore wrote:
> The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
> will be used to manage the brightness of the panel backlight on
> STM32MP135F-DK.
>
> Signed-off-by: Cheick Traore
> Reviewed-by: Patrice Chotard
> ---
>
> (no changes since v1)
>
On Mon, 10 Mar 2025 at 14:48, Jerome Forissier
wrote:
>
>
>
> On 3/10/25 13:38, Ilias Apalodimas wrote:
> > On Mon, 10 Mar 2025 at 14:13, Jerome Forissier
> > wrote:
> >>
> >>
> >>
> >> On 3/10/25 12:52, Ilias Apalodimas wrote:
> >>> Hi Jerome,
> >>>
> >>> [...]
> >>>
> >>>
> >>
> >> +#if
From: Devarsh Thakkar
AM62A SoCs have a single R5F core in wakeup domain. This core is
also used as a device manager for the SoC.
Signed-off-by: Devarsh Thakkar
Signed-off-by: Hari Nagalla
Signed-off-by: Judith Mendez
Acked-by: Andrew Davis
Link: https://lore.kernel.org/r/20250210221530.1234
Dear Tom,
The following changes since commit 743c15b9fdd2f639012a2c26734dc146dc568218:
Merge patch series "This series adds support for file renaming to
EFI_FILE_PROTOCOL.SetInfo()." (2025-03-07 12:06:21 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodian
On 2/25/25 10:52, Patrice CHOTARD wrote:
>
>
> On 2/24/25 19:39, Dario Binacchi wrote:
>> It is pointless to use the custom compatible "st,button1" when
>> stm32746g-eval.dts and stm32f769-disco.dts already contain the
>> "gpio-keys" compatible, which is specifically used for button
>> managem
Add information about the type of blkmap slice as an attribute in the
corresponding slice structure. Put information in the blkmap slice
structure to identify if it is associated with a memory or linear
mapped device. Which can then be used to take specific action based on
the type of the blkmap sl
This patch adds pwm support for MediaTek MT7987 SoC.
Signed-off-by: Sam Shih
Signed-off-by: Weijie Gao
---
arch/arm/dts/mt7987-pinctrl.dtsi | 14 ++
arch/arm/dts/mt7987.dtsi | 16 +---
arch/arm/dts/mt7987a.dtsi| 2 ++
drivers/pwm/pwm-mtk.c| 1
The efi_install_fdt() function is called before booting an EFI binary,
either directly, or through a bootmanager. This function installs a
copy of the device-tree(DT) on the EFI configuration table, which is
passed on to the OS.
The current logic in this function does not install a DT if the table
On Mon, 10 Mar 2025 13:52:33 +0100, Heinrich Schuchardt wrote:
> The following changes since commit 743c15b9fdd2f639012a2c26734dc146dc568218:
>
>Merge patch series "This series adds support for file renaming to
> EFI_FILE_PROTOCOL.SetInfo()." (2025-03-07 12:06:21 -0600)
>
> are available in
On Thu, Mar 06, 2025 at 06:59:08AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 5 Mar 2025 at 09:06, Tom Rini wrote:
> >
> > On Wed, Mar 05, 2025 at 07:18:40AM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Tue, 4 Mar 2025 at 09:12, Tom Rini wrote:
> > > >
> > > > On Tue, Mar 04, 2025
Use some named flags when setting up the cache, so it is easier to see
what is going on.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/i386/cpu.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386
On 3/11/25 15:30, Cheick Traore wrote:
> Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
> using a multifuntion timer which provide a pwm feature. Clock rate and
> addresses are retrieved from the multifunction timer driver.
>
> Signed-off-by: Cheick Traore
> ---
>
> Cha
On Mon, 24 Feb 2025 at 07:56, Sam Edwards wrote:
>
> RELRO is an instruction to a dynamic loader to make a memory range
> read-only after relocations are applied, for added security. Some
> linkers (e.g. LLD) require that all sections covered by the RELRO are
> contiguous, so that only a single RE
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel
---
configs/endeavoru_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/endeavoru_defconfig b/configs/endeavoru_defconfig
index 1d1f
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel
---
configs/grouper_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/grouper_defconfig b/configs/grouper_defconfig
index 9221ffb46a
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel
---
configs/picasso_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/picasso_defconfig b/configs/picasso_defconfig
index 994951bb81
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel
---
configs/transformer_t20_defconfig | 2 +-
configs/transformer_t30_defconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/transform
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel
---
configs/x3_t30_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/x3_t30_defconfig b/configs/x3_t30_defconfig
index c8da5b4ce35..
Introduce a 3-second delay and an informational message during boot to
enhance user experience.
Signed-off-by: Svyatoslav Ryhel
---
configs/qc750_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/qc750_defconfig b/configs/qc750_defconfig
index 2485e64a2f0..e95
Add support for multiple efi_net_obj structs in efi_net.c. This comes
in preparation for an EFI network driver supporting multiple network
interfaces. For now the EFI network stack still registers a single ethernet
udevice as an EFI network device even if multiple are present, namely
the one that w
Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
drivers/phy/starfive/phy-jh7110-pcie.c | 2 +-
drivers/usb/cdns3/core.c
On 3/10/25 13:35, Patrice CHOTARD wrote:
On 3/10/25 11:00, Patrice CHOTARD wrote:
On 3/6/25 15:13, Patrice CHOTARD wrote:
On 3/6/25 11:56, Cheick Traore wrote:
It was possible to provide a duty_ns greater than period_ns to
"pwm config" command. The framework must check the values before
p
On Sat, Mar 08, 2025 at 09:12:10PM +0100, Marek Vasut wrote:
> Import most of libexfat from [1] except for log.c verbatim. The code
> does not even compile and further adjustments and integration into
> U-Boot filesystem code is in the next patch.
>
> [1] https://github.com/relan/exfat
> 0b41
Hey,
Attempting to merge v2025.04-rc4 in to -next fails on two files. One of
which is common/miiphyutil.c and is easily solved (miiphy_init() goes
away) and then lib/efi_loader/efi_net.c. The latter I need help with,
ideally one of you, as you understand the code in question, sends me the
merged f
Remove __omap24_i2c_read/write() usage from omap_i2c_xfer() in favour of
the more flexible __omap24_i2c_xfer_msg().
Consequently, these are also no longer needed when DM_I2C is enabled.
New function __omap24_i2c_xfer_msg() will take care of individual read
OR write transfers with a target device.
There is logic in the copy_fdt() function which is iterating over the
platform's DRAM banks and setting the fdt_ram_start variable. However,
this variable is not used subsequently in the function. Remove this
superfluous code.
Signed-off-by: Sughosh Ganu
---
Changes since V6: New patch
lib/efi_
Hi Tom,
On Mon, Mar 10, 2025 at 3:30 PM Tom Rini wrote:
>
> On Mon, Mar 10, 2025 at 10:01:32AM +0100, Patrick Rudolph wrote:
>
> > Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
> > prefetchable 32-bit BARs, while PCIe devices are not allowed to have
> > 32-bit prefetchable
Hi Jerome,
[...]
> >>
> >> +#if CONFIG_IS_ENABLED(WGET_BUILTIN_CACERT)
> >> + cacert_initialized = true;
> >> +#endif
> >> return CMD_RET_SUCCESS;
> >> }
> >> +
> >> +#if CONFIG_IS_ENABLED(WGET_BUILTIN_CACERT)
> >> +static int set_cacert_builtin(void)
> >> +{
> >> + return _
Add 3 second delay before power off for some of recent devices to improve
user experience.
Svyatoslav Ryhel (6):
configs: transformer: add 3 second delay before power off
configs: endeavoru: add 3 second delay before power off
configs: grouper: add 3 second delay before power off
configs:
Enable support for USB mass storage class (UMS) via USB0 instance of
USB on AM64x SoC. UMS allows USB host to access U-Boot block device
and enable file transfer.
Example usage of UMS command :
=> mmc list
mmc@fa1: 0 (eMMC)
mmc@fa0: 1
=> ums 0 mmc 1
On 3/7/25 16:15, Paul Barker wrote:
> The Kconfig parser seems to get confused by the current if conditions
> following CMD_NET and displays all network command options directly in
> the "Command line interface" menu instead of in a "Network commands"
> submenu.
>
> To help out Kconfig we can s
On Mon, Mar 10, 2025 at 04:44:27PM +0100, Patrick Rudolph wrote:
> Hi Tom,
> On Mon, Mar 10, 2025 at 3:30 PM Tom Rini wrote:
> >
> > On Mon, Mar 10, 2025 at 10:01:32AM +0100, Patrick Rudolph wrote:
> >
> > > Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
> > > prefetchable 3
On 3/6/25 12:52, Bernhard Messerklinger wrote:
From: Michal Simek
Sent: Thursday, March 6, 2025 11:35 AM
On 3/6/25 11:20, Bernhard Messerklinger wrote:
From: Michal Simek
Sent: Wednesday, February 26, 2025 11:23 AM
On 2/11/25 13:49, Bernhard Messerklinger wrote:
This commit adds support
Enable support for USB 2.0, USB 1.1 and USB storage devices on the
Renesas RZ/G2L EVK.
Also enable the 'usb' command to support USB scanning and debugging.
Signed-off-by: Paul Barker
---
configs/renesas_rzg2l_smarc_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs/re
On 3/4/25 8:10 AM, Alice Guo (OSS) wrote:
Hi,
Do you mean that replace
IS_ENABLED(CONFIG_SCMI_TRANSPORT_SMT_INTR) by checking "arm,scmi"
and "mboxes" in device tree?
If that is possible, yes.
I do not think that Bit[0] of channel flags should be set to 1 only when the SCMI node has the
comp
Vikas has left STMicroelectronics several years ago.
Put myself as maintainer of stm32f746-disco board.
Signed-off-by: Patrice Chotard
---
board/st/stm32f746-disco/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/st/stm32f746-disco/MAINTAINERS
b/board/st/st
On 08.03.25 21:36, Marek Vasut wrote:
Update the miiphybb documentation to match current implementation.
The static struct bb_miiphy_bus bb_miiphy_buses[] array is removed.
The example is updated to match current Renesas RAVB driver, which
is one of the miiphybb users.
Reviewed-by: Paul Barker
On Sat, Mar 08, 2025 at 09:12:06PM +0100, Marek Vasut wrote:
> Add generic implementation of the 'rm' command to delete files
> from filesystems using the generic filesystem API.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Tom Rini
--
Tom
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In preparation to remove manual references for enabling some clocks,
enable SPL_CLK_IMX8MP which automatically enables SPL_CCF and
SPL_CLK_COMPOSITE_CCF which permit various drivers to activate
their respective clocks automatically.
Signed-off-by: Adam Ford
---
configs/imx8mp_beacon_defconfig |
In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford
---
drivers/clk/imx/clk-imx8mm.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8
Hi Marek,
On Fri, Mar 7, 2025 at 2:42 AM Marek Vasut wrote:
> So what should we do about this particular patch ?
>
> Should this be applied ? Rebased ? Updated somehow ?
This patch causes a CI error:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/1057151
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.
Signed-off-by: Tom Rini
In order to make a start on explaining how and when to use certain
macros, we need to document their usage somewhere. As a first step, take
section 21 of the v6.13 Linux Kernel coding-style document on
conditional compilation and add it here.
Signed-off-by: Tom Rini
---
Changes in v2:
- New patch
Expand the conditional compilation section to explain when to use
CONFIG_IS_ENABLED rather than IS_ENABLED and provide an example. Next,
note what the PHASE_ macro is supposed to be used for as well.
Signed-off-by: Tom Rini
---
Changes in v2:
- New patch.
---
doc/develop/codingstyle.rst | 17 +++
Use a symbol to select the size of the GDT, rather than hard-coding a
value. This matches how it is done in start64
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/start.S | 4 +++-
arch/x86/cpu/start16.S | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git
On 2/10/25 02:32, Marek Vasut wrote:
> Enable support for environment in eMMC on STM32MP13xx DHCOR SoM,
> in addition to existing support for environment in SPI NOR. The
> environment size is the same, except in case the environment is
> placed in eMMC, it is stored at the end of eMMC BOOT parti
At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.
Update the macros to support this properly, since it is important when
programming MTRRs.
Signed-off-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Always return true fr
On Wed, 26 Feb 2025 09:33:45 -0600, Tom Rini wrote:
> A problem we have today is that some instances of IS_ENABLED(FOO) have
> crept in to the code. This is in turn because with checkpatch.pl this is
> only a warning and not an error, so they were overlooked. And looking
> deeper, in the Linux ker
On Tue, 11 Mar 2025 15:29:52 +0100, Jerome Forissier wrote:
> The following changes since commit 1b42f57ec82ceba4d5f08cfb359717232301cfa5:
>
> Merge tag 'v2025.04-rc4' into next (2025-03-10 20:18:51 -0600)
>
> are available in the Git repository at:
>
> https://source.denx.de/u-boot/custodi
The following changes since commit 1b42f57ec82ceba4d5f08cfb359717232301cfa5:
Merge tag 'v2025.04-rc4' into next (2025-03-10 20:18:51 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-sh.git next
for you to fetch changes up to 4226433858318be59146
From: Jiehui He
The LCKFB TaishanPi is a single-board computer based on the RK3566 SoC.
Specification:
- 1/2 Gib RAM
- Optinal EMMC
- SD-Card
- HDMI / MIPI CSI / MIPI DSI
- USB 2.0 Host (Type-A)
- USB 2.0 Host / OTG (Type-C)
- No Ethernet
This patch adds U-Boot support for the LCKFB TaishanPi R
These patches enable support for USB 2.0 on the Renesas RZ/G2L EVK,
supporting both the USB Type-A port and the USB OTG port. It is possible
to load and boot Linux from a USB Mass Storage device connected to
either port.
There should be no change to the operation of R-Car gen3 boards, but I
don't
Add a new regulator driver to control the USB VBUS supply on the Renesas
RZ/G2L and related SoCs.
Reviewed-by: Marek Vasut
Signed-off-by: Paul Barker
---
drivers/power/regulator/Kconfig | 8
drivers/power/regulator/Makefile | 1 +
.../power/regulator/rzg2l-usbp
Add a new driver to control the USB 2.0 PHY reset controller on the
Renesas RZ/G2L and related SoCs.
Signed-off-by: Paul Barker
---
drivers/reset/Kconfig | 9 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-rzg2l-usbphy-ctrl.c | 113 +++
Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.
Reviewed-by: Marek Vasut
Signed-off-by: Paul Barker
---
drivers/reset/Kconfig
Extend the existing Renesas R-Car Gen3 USB 2.0 PHY driver to support the
RZ/G2L and related SoCs.
Also enable this driver by default for the RZ/G2L SoC family.
Reviewed-by: Marek Vasut
Signed-off-by: Paul Barker
---
drivers/phy/Kconfig | 4 +-
drivers/phy/phy-rcar-gen3.c | 79
There's no fan in MedisTek's reference design. Disable it for now.
Signed-off-by: Weijie Gao
---
arch/arm/dts/mt7987a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/mt7987a.dtsi b/arch/arm/dts/mt7987a.dtsi
index bf53e89eca8..365fefdbe17 100644
--- a/arch/ar
Currenty, most peripherals enable/disable their respecive clocks using
the clock framework, but serial ports various imx platsforms do not. Some
of the newer NXP SoC's register the UART clocks, but they are not necessarily
associated the to serial_mxc driver, so these clocks need to be manually
en
In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford
---
drivers/clk/imx/clk-imx8mn.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn
In order to use the driver model and clock system to enable UART
clocks from the serial driver, it's necessary to register the UART
clocks. With the helper function to check for imx6qp vs other
variants, the UART can register for both scenarios.
Signed-off-by: Adam Ford
---
V2: Directly call of
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable. This requires a small re-order
of a couple functions.
Signed-off-by: Adam Ford
---
board/beacon/imx8mm/spl.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/board/beacon/imx8mm/
The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford
Reviewed-by: Michael Trimarchi
---
drivers/clk/
Depending on the platform, there may be multiple clock sources
required to enable a UART. Use the bulk functions to get and
enable the clocks when the UART probes. This can facilitate
the removal of functions to manually enable the clock.
This is made dependent on CLK_CCF which is used on imx6q,
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable.
Signed-off-by: Adam Ford
---
board/beacon/imx8mn/spl.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c
index f03841e5a01..e91d3fdcf5e 100644
---
If SPL_CLK_IMX8MP is selected alone, it causes a build error.
The clock composite is required when using the clock framework, so
select it when SPL_CLK_IMX8MP is enabled. This is already being
done outside of SPL.
Signed-off-by: Adam Ford
---
drivers/clk/imx/Kconfig | 1 +
1 file changed, 1 ins
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable.
Signed-off-by: Adam Ford
---
board/beacon/imx8mp/spl.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/board/beacon/imx8mp/spl.c b/board/beacon/imx8mp/spl.c
index 30d577f7e0e..6b357d90a3f 100644
---
> Subject: [PATCH V2 02/10] clk: imx6q: Register UART clocks
>
> In order to use the driver model and clock system to enable UART
> clocks from the serial driver, it's necessary to register the UART clocks.
> With the helper function to check for imx6qp vs other variants, the
> UART can register f
On Mon, Mar 10, 2025 at 10:01:32AM +0100, Patrick Rudolph wrote:
> Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
> prefetchable 32-bit BARs, while PCIe devices are not allowed to have
> 32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and
> typically the pre
On Tue, Mar 11, 2025 at 9:31 PM Adam Ford wrote:
> ---
> V2: Fix name of "ECSPI" and elimiate helper function, and fix build error.
Still get errors in CI:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/1057306
Please make sure v3 passes CI.
+In file included from board/liebherr/d
On Tue, 11 Mar 2025 at 19:13, Ilias Apalodimas
wrote:
>
> Hi Sughosh,
>
> [...]
>
> > {
> > - unsigned long fdt_pages;
> > efi_status_t ret = 0;
> > void *fdt, *new_fdt;
> > - u64 new_fdt_addr;
> > - uint fdt_size;
> > + static u64 new_fdt_addr;
> > +
On Tue, Mar 11, 2025 at 07:30:25PM -0500, Adam Ford wrote:
>Depending on the platform, there may be multiple clock sources
>required to enable a UART. Use the bulk functions to get and
>enable the clocks when the UART probes. This can facilitate
>the removal of functions to manually enable the cl
On Tue, Mar 11, 2025 at 07:30:26PM -0500, Adam Ford wrote:
>Now that the UART driver can enable the required clocks, remove
>the hard-coded clock enable. This requires a small re-order
>of a couple functions.
>
>Signed-off-by: Adam Ford
Reviewed-by: Peng Fan
On Tue, Mar 11, 2025 at 07:30:27PM -0500, Adam Ford wrote:
>Now that the UART driver can enable the required clocks, remove
>the hard-coded clock enable.
>
>Signed-off-by: Adam Ford
Reviewed-by: Peng Fan
On Tue, Mar 11, 2025 at 07:30:28PM -0500, Adam Ford wrote:
>If SPL_CLK_IMX8MP is selected alone, it causes a build error.
>The clock composite is required when using the clock framework, so
>select it when SPL_CLK_IMX8MP is enabled. This is already being
>done outside of SPL.
>
>Signed-off-by: Ada
Hi Andre,
On Tue, 11 Mar 2025 at 20:31, Andre Przywara wrote:
>
> On Sat, 1 Mar 2025 18:49:02 +0200
> Ilias Apalodimas wrote:
>
> Hi Ilias,
>
> > The ARM ARM on section 8.17.1 describes the cases where
>
> Thanks for referencing the ARM ARM! The section name would be D8.17.1, and
> please menti
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