Hi Sam,
On 5/30/24 2:06 AM, Sam Protsenko wrote:
On Thu, May 23, 2024 at 9:36 AM Quentin Schulz wrote:
Hi Sam,
Hi Quentin,
Thanks for reviewing this series! My answers are below (inline).
On 5/23/24 1:30 AM, Sam Protsenko wrote:
Extract clock control code into a separate routine to avo
char *value_out, size_t value_size)
{
return -EOPNOTSUPP;
}
---
base-commit: ea722aa5eb33740ae77e8816aeb72b385e621cd0
change-id: 20240603-bcb-compil-d8eaf7074475
Best regards,
--
Mattijs Korpershoek
_order. If there is no
* ordering there, then all bootmethods are added
*
* @iter: Iterator to update with the order
---
base-commit: ea722aa5eb33740ae77e8816aeb72b385e621cd0
change-id: 20240603-bootmeth-typos-47c865e70ccf
Best regards,
--
Mattijs Korpershoek
Hi Sebastian,
On 2024-05-31 17:08, Sebastian Reichel wrote:
> Hi,
>
> On ROCK 5B power is usually supplied via it's USB-C port. This port has the
> data lines connected to RK3588, VBUS connected to the input regulator and
> CC pins connected to FUSB302. FUSB302 is a USB-C controller, which can be
ESS clock is the Ethernet Subsystem clock, so lets add it as its
already configured by SBL1.
Signed-off-by: Robert Marko
Reviewed-by: Caleb Connolly
---
drivers/clk/qcom/clock-ipq4019.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/cl
IPQ4019 clock dt-bindings are available in Linux upstream, and we can just
use those instead of carrying a downstream file that matches the upstream one
anyway.
Signed-off-by: Robert Marko
Reviewed-by: Sumit Garg
---
Changes in v2:
* Drop the downstream dt-bindings header as it matches the upstr
IPQ4019 ESS EDMA support is not yet in upstream Linux, so for now lets use
the latest pending Linux DTS node for wired networking.
Signed-off-by: Robert Marko
---
Chanes in v2:
* Use the latest pending Linux DT node for EDMA instead
arch/arm/dts/qcom-ipq4019-u-boot.dtsi | 104 ++
IPQ4019 has more networking related resets that will be required for future
wired networking support, so lets add them.
This syncs the driver with Linux.
Signed-off-by: Robert Marko
Reviewed-by: Caleb Connolly
---
drivers/clk/qcom/clock-ipq4019.c | 6 ++
1 file changed, 6 insertions(+)
di
This adds the driver for the ESS EDMA ethernet adapter
found inside of Qualcomm IPQ40xx SoC series.
This driver also integrates the built in modified QCA8337N
switch support as they are tightly integrated.
Co-Developed-by: Gabor Juhos
Signed-off-by: Gabor Juhos
Signed-off-by: Robert Marko
---
On 5/31/24 21:47, Tim Harvey wrote:
> Greetings,
>
> I'm seeing an issue on an imx8mm board (imx8mm-venice-gw73xx) where
> for a specific set of microsd cards if I have accessed the microsd in
> U-Boot with UHS/1.8V the kernel will not recognize that microsd when
> scanning.
>
> The issue does no
Hook up support for capsule updates loaded from disk on Qualcomm
platforms.
Most Qualcomm devices have an A/B partition layout, with most partitions
duplicated. The metadata on which slot is active is stored in the GPT
headers in the vendor-specific attribute bits of each partition.
Add support f
GPT partition tables include two bytes worth of vendor defined
attributes, per partition. ChromeOS and Qualcomm both use these (with
different encoding!) to handle A/B slot switching with a retry counter.
Expose these via the disk_partition struct so that they can be parsed by
the relevant board c
This is extremely similar to the MMC backend, but there are some notable
differences.
Works with a DFU string like
scsi 4=u-boot-bin part 11
Where "4" is the SCSI dev number (sequential LUN across all SCSI devices)
and "11" is the partition number.
Signed-off-by: Caleb Connolly
---
doc/us
For some unknown reason, writes of larger than 1 block always fail with
a checksum error on Qualcomm v5 controllers.
Until this is resolved, work around the issue by setting b_max to 1 for
these controllers.
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/mmc/msm_sdhci.c
Qualcomm boards flash U-Boot to the boot partition, implement support
for determining which slot U-Boot is running from and finding the
correct boot partition for that slot and configuring the appropriate DFU
string.
For now this only supports boards with SCSI/UFS storage where U-Boot is
flashed t
run savedefconfig
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
configs/qcom_defconfig | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 65f13ae7a089..f2dfced4bc1e 100644
--- a/configs/qcom_defconfig
++
Capsule updates depend on SYSRESET, which we currently don't select but
instead use a custom reset_cpu() implementation which just calls
psci_reset().
Clean this up, drop our custom function and require PSCI reset.
There are some Qualcomm platforms that either can or do run without PSCI
support,
For capsule updates we need more heap space for the DFU buffer. Give
ourselves a whole 8MiB!
Reviewed-by: Neil Armstrong
Reviewed-by: Ilias Apalodimas
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-snapdra
Enable all the necessary options for capsule updates to work, as well as
a few additional EFI features.
Signed-off-by: Caleb Connolly
---
configs/qcom_defconfig | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
ind
On Kria when board starts from Image A or Image B partition multiboot
register is already setup to that location. When reset command is called
board is issuing soft reset which start SW at already used location (offset
of multiboot * 32k).
But board should continue to run from multiboot offset 0 (s
From: Lukas Funke
This series enables the CPU reset in the SPL for ZynqMP based platforms.
This only works if CONFIG_SYSRESET is disabled. This is usually the
case since the the regular sysreset requires bl31 firmware to be loaded
in order to hand the sysreset over to PMU firmware. In SPL we can
From: Lukas Funke
This commit enables SPL to reset the CPU via PMU-firmware. The usual
reset mechanism requires bl31 to be loaded which may not be the case in
SPL.
Signed-off-by: Lukas Funke
---
board/xilinx/zynqmp/zynqmp.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/xi
From: Lukas Funke
In order to make CONFIG_IS_ENABLED() work with 'ZYNQMP_FIRMWARE'
introduce an additional Kconfig 'SPL_ZYNQMP_FIRMWARE' which is selected
if and only if ZYNQMP_FIRMWARE is enabled. Driver are adapted such
that they build with and without the config being set.
Signed-off-by: Luka
Hi Caleb,
On Mon, 3 Jun 2024 at 15:49, Caleb Connolly wrote:
>
> Qualcomm boards flash U-Boot to the boot partition, implement support
> for determining which slot U-Boot is running from and finding the
> correct boot partition for that slot and configuring the appropriate DFU
> string.
>
> For n
On Mon, 3 Jun 2024 at 15:49, Caleb Connolly wrote:
>
> Enable all the necessary options for capsule updates to work, as well as
> a few additional EFI features.
>
> Signed-off-by: Caleb Connolly
> ---
> configs/qcom_defconfig | 14 --
> 1 file changed, 12 insertions(+), 2 deletions(-
There are differences in clock / reset dt-bindings between U-Boot and
Linux. Sync them, so it is feasible to use OF_UPSTREAM for StarFive
JH7110 SoC.
Hal Feng (4):
dt-bindings: clock: jh7110: Sync with Linux
dt-bindings: reset: jh7110: Sync with Linux
clk: starfive: jh7110: Sync clock defini
Sync JH7110 clock dt-bindings with Linux, which is the same with
dts/upstream/include/dt-bindings/clock/starfive,jh7110-crg.h
except copyright.
Signed-off-by: Hal Feng
---
.../dt-bindings/clock/starfive,jh7110-crg.h | 180 +++---
1 file changed, 112 insertions(+), 68 deletions(-)
Sync JH7110 reset dt-bindings with Linux, which is the same with
dts/upstream/include/dt-bindings/reset/starfive,jh7110-crg.h
except copyright.
Signed-off-by: Hal Feng
---
.../dt-bindings/reset/starfive,jh7110-crg.h | 144 +++---
1 file changed, 88 insertions(+), 56 deletions(-)
d
The JH7110 clock dt-bindings is synchronized with Linux,
so update the clock definitions in drivers accordingly.
Signed-off-by: Hal Feng
---
drivers/clk/starfive/clk-jh7110-pll.c | 6 ++--
drivers/clk/starfive/clk-jh7110.c | 44 +--
2 files changed, 25 insertions(+),
The JH7110 clock and reset dt-bindings are synchronized with Linux,
so update the clock and reset definitions in device tree accordingly.
Signed-off-by: Hal Feng
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 6 ++--
arch/riscv/dts/jh7110-u-boot.dtsi | 2 +-
arch/riscv/dts/jh7
On 6/3/24 15:34, lukas.funke-...@weidmueller.com wrote:
From: Lukas Funke
In order to make CONFIG_IS_ENABLED() work with 'ZYNQMP_FIRMWARE'
introduce an additional Kconfig 'SPL_ZYNQMP_FIRMWARE' which is selected
if and only if ZYNQMP_FIRMWARE is enabled. Driver are adapted such
that they buil
On 6/3/24 15:34, lukas.funke-...@weidmueller.com wrote:
From: Lukas Funke
This commit enables SPL to reset the CPU via PMU-firmware. The usual
reset mechanism requires bl31 to be loaded which may not be the case in
SPL.
Signed-off-by: Lukas Funke
---
board/xilinx/zynqmp/zynqmp.c | 9 +++
Add tests for booting image using tftpboot/pxe boot commands, tftpboot
boot case loads the FIT image into DDR and boots using bootm command
whereas pxe boot cases downloads the pxe configuration file from the
TFTP server and interprets it to boot the images mentioned in the pxe
configurations file.
On 03.06.2024 16:32, Michal Simek wrote:
On 6/3/24 15:34, lukas.funke-...@weidmueller.com wrote:
From: Lukas Funke
This commit enables SPL to reset the CPU via PMU-firmware. The usual
reset mechanism requires bl31 to be loaded which may not be the case in
SPL.
Signed-off-by: Lukas Funke
--
On 6/3/24 16:50, Lukas Funke wrote:
On 03.06.2024 16:32, Michal Simek wrote:
On 6/3/24 15:34, lukas.funke-...@weidmueller.com wrote:
From: Lukas Funke
This commit enables SPL to reset the CPU via PMU-firmware. The usual
reset mechanism requires bl31 to be loaded which may not be the case
Always prioritizing u-boot includes causes problems when trying to migrate
boards to OF_UPSTREAM that have different local devicetree files with
respect to the upstream ones, if local DT headers are not dropped.
At the same time if local and upstream files are the same, migrations
can be, and have
.denx.de/u-boot/custodians/u-boot-imx.git
tags/u-boot-imx-next-20240603
for you to fetch changes up to fb95661116fb4269883721afd80578e6d88ce043:
imx8mm-cl-iot-gate: Add support for the Realtek RTL8211E PHY (2024-06-03
12:14:29 -0300)
u-boot-imx-next-20240603
--
On Tue, May 28, 2024 at 7:00 AM Emanuele Ghidoli
wrote:
>
> From: Emanuele Ghidoli
>
> Hi,
> This series adds support for 0090 PID4 Verdin iMX8M Mini Quad 4GB WB ET SKU.
> It also adds two new SKUs config block support: 0088 Aquila AM69 Octa 32GB WB
> IT and 0089 Verdin iMX95 Hexa 16GB WB IT.
A
On Tue, May 28, 2024 at 8:25 AM Yannic Moog wrote:
>
> - update MAINTAINERS
> - delete synced dt files
> - imply OF_UPSTREAM
> - update default device tree
Applied all to u-boot-imx/next, thanks.
On Tue, May 28, 2024 at 10:35 AM Teresa Remmet wrote:
>
> Add support for several RAM sizes and speed grades for phyCORE-i.MX8MP.
>
> We have support with this series for:
> - 1GB 1.5GHz
> - 1GB 2GHz
> - 2GB 1.5GHz (was supported before)
> - 2GB 2GHz (was supported before)
> - 4GB 1.5GHz
> - 4GB 2
On Tue, May 28, 2024 at 4:15 PM Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> Newer versions of the imx8mm-cl-iot-gate boards may come populated with a
> Samsung 4GB DDR model.
>
> Add support for it.
>
> Signed-off-by: Fabio Estevam
Applied all to u-boot-imx/next, thanks.
On Sun, Jun 02, 2024 at 12:16:38AM +, Brunham, Kalen wrote:
> Thanks Tom.
>
> Can you suggest who is the existing owner of this code I could work with?
You should CC Heinrich for sure once you have things working.
>
> -Original Message-
> From: Tom Rini
> Sent: Friday, May 31, 202
On Sat, 18 May 2024 15:06:11 +0200, Javier Martinez Canillas wrote:
> I noticed that the IGEPv2 board did not boot anymore with mainline U-Boot.
> This was caused by a driver change to allocate its platform data before
> relocation and U-Boot not having enough pre-relocation heap size for this.
>
On Thu, May 30, 2024 at 04:56:49PM +0800, Leo Liang wrote:
> Hi Tom,
>
> The following changes since commit 46ff00bea5dd2dd247d5e2fdadbf5dcf8653cd9a:
>
> Merge tag 'tpm-master-27052024' of
> https://source.denx.de/u-boot/custodians/u-boot-tpm (2024-05-27 08:56:02
> -0600)
>
> are available
On Sun, Jun 02, 2024 at 02:50:14PM +0200, Marek Vasut wrote:
> The following changes since commit ea722aa5eb33740ae77e8816aeb72b385e621cd0:
>
> Merge branch '2024-05-29-assorted-small-fixes' (2024-05-29 11:21:14 -0600)
>
> are available in the Git repository at:
>
> https://source.denx.de/u
On Mon, Jun 03, 2024 at 03:08:53PM +0900, Minkyu Kang wrote:
> Dear Tom,
>
> The following changes since commit 46ff00bea5dd2dd247d5e2fdadbf5dcf8653cd9a:
>
> Merge tag 'tpm-master-27052024' of
> https://source.denx.de/u-boot/custodians/u-boot-tpm (2024-05-27 08:56:02
> -0600)
>
> are availabl
On Sat, Jun 01, 2024 at 11:21:54AM +0200, Francesco Dolcini wrote:
> Hello Marek,
>
> On Fri, May 31, 2024 at 06:47:17PM +0200, Marek Vasut wrote:
> > Switch PHY_ANEG_TIMEOUT to CONFIG_PHY_ANEG_TIMEOUT Kconfig symbol.
> > This removes one more configuration headers option finalizes its
> > Kconfig
Hello Tom,
Il 3 giugno 2024 19:56:07 CEST, Tom Rini ha scritto:
>On Sat, Jun 01, 2024 at 11:21:54AM +0200, Francesco Dolcini wrote:
>> Hello Marek,
>>
>> On Fri, May 31, 2024 at 06:47:17PM +0200, Marek Vasut wrote:
>> > Switch PHY_ANEG_TIMEOUT to CONFIG_PHY_ANEG_TIMEOUT Kconfig symbol.
>> > This
Hi Hal,
Instead of manual dt-bindings sync can we please adopt OF_UPSTREAM for JH7110 ?
-E
On Mon, Jun 3, 2024 at 6:57 AM Hal Feng wrote:
>
> There are differences in clock / reset dt-bindings between U-Boot and
> Linux. Sync them, so it is feasible to use OF_UPSTREAM for StarFive
> JH7110 SoC
On Mon, Jun 3, 2024 at 1:18 AM Christian Loehle
wrote:
>
> On 5/31/24 21:47, Tim Harvey wrote:
> > Greetings,
> >
> > I'm seeing an issue on an imx8mm board (imx8mm-venice-gw73xx) where
> > for a specific set of microsd cards if I have accessed the microsd in
> > U-Boot with UHS/1.8V the kernel wi
On Sun, Jun 02, 2024 at 02:51:15PM +0200, Marek Vasut wrote:
> The following changes since commit 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf:
>
> Merge patch series "FWU: Add support for FWU metadata version 2"
> (2024-05-24 13:42:07 -0600)
>
> are available in the Git repository at:
>
> htt
2"
> (2024-05-24 13:42:07 -0600)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-next-20240603
>
> for you to fetch changes up to fb95661116fb4269883721afd80578e6d88ce043:
>
> imx8m
Hey all,
It's release day and here is -rc4. To reiterate what I said last
release, this really is the time for bug fixes (which includes
documentation corrections) only at this point. Pretty much anything else
should be for -next.
In terms of a changelog,
git log --merges v2024.07-rc3..v2024.07-
On Mon, Jun 03, 2024 at 08:03:45PM +0530, Love Kumar wrote:
> Add tests for booting image using tftpboot/pxe boot commands, tftpboot
> boot case loads the FIT image into DDR and boots using bootm command
> whereas pxe boot cases downloads the pxe configuration file from the
> TFTP server and inter
Hello Jonas,
On Mon, Jun 03, 2024 at 11:58:07AM +0200, Jonas Karlman wrote:
> Some initial quick feedback is that the tcpm uclass and driver should
> probably take more advantage of the u-boot driver model.
>
> Few quick thoughts:
> - Split out uclass/driver api parts into tcpm-uclass.c
> - Take
Hi Tom/Heinrich,
I have https://github.com/u-boot/u-boot/pull/574 that has a proposed change. It
is currently failing clang sandbox, which looks a little strange and I'm
looking into it. Please let me know if you have any feedback on the general
strategy.
Thanks,
-Kalen
-Original Message-
Hello Piotr,
On 28.05.24 17:05, Piotr Wojtaszczyk wrote:
ZSTD can be a better tradeoff between NAND IO operations and decompression
speed giving a better boot time.
Signed-off-by: Piotr Wojtaszczyk
---
fs/ubifs/ubifs-media.h | 2 ++
fs/ubifs/ubifs.c | 53
CONFIG_DM_SPI depends on CONFIG_DM. There is no need to list CONFIG_DM
explicitly as dependency for CONFIG_DM_SPI_FLASH
Signed-off-by: Heinrich Schuchardt
---
drivers/mtd/spi/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kco
On 6/4/24 05:34, Brunham, Kalen wrote:
Hi Tom/Heinrich,
I have https://github.com/u-boot/u-boot/pull/574 that has a proposed change. It
is currently failing clang sandbox, which looks a little strange and I'm
looking into it. Please let me know if you have any feedback on the general
strategy
Building the SPI flash DFU driver fails if SPI flash support is missing.
drivers/dfu/dfu_sf.c:123:29: error:
‘CONFIG_SF_DEFAULT_MODE’ undeclared (first use in this function);
Add the missing dependency.
Signed-off-by: Heinrich Schuchardt
---
drivers/dfu/Kconfig | 1 +
1 file changed, 1
On 6/4/24 05:34, Brunham, Kalen wrote:
Hi Tom/Heinrich,
I have https://github.com/u-boot/u-boot/pull/574 that has a proposed change. It
is currently failing clang sandbox, which looks a little strange and I'm
looking into it. Please let me know if you have any feedback on the general
strategy
The series enables ospi boot for j721s2.
Test logs: https://gist.github.com/manorit2001/6bb91885c608e3a8cb0267ab2c614781
Signed-off-by: Manorit Chawdhry
---
Changes in v3:
- Rebase on top of -next
- Remove SF_DEFAULT_MODE as it's default 0
- Add new properties in correct location as per savedefc
From: Pratyush Yadav
On DTR capable flashes like Micron Xcella the writes cannot start or end
at an odd address in DTR mode. Extra 0xff bytes need to be prepended or
appended respectively to make sure both the start and end addresses are
even.
Signed-off-by: Pratyush Yadav
Signed-off-by: Apurva
R5 being a 32-bit processor can't understand the 64-bit mapping being
done in ospi node. Override the ospi node for 32-bit register ranges and
the fss node ( the parent node of ospi ) to map the ranges for the
updated child node correctly.
Reviewed-by: Apurva Nandan
Signed-off-by: Manorit Chawdhr
Enable ospi0 node for all boot stages
Reviewed-by: Apurva Nandan
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k
Enable OSPI related configs to boot using OSPI
Reviewed-by: Apurva Nandan
Signed-off-by: Manorit Chawdhry
---
configs/j721s2_evm_a72_defconfig | 1 +
configs/j721s2_evm_r5_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_
Hi,
On Tue, 28 May 2024 10:35:03 +0200, Neil Armstrong wrote:
> If the ep0 stalls or request are dequeued when gagdet is stopped,
> the request dma may not be mapped yet and dwc3_flush_cache() may be
> called with a NULL pointer.
>
> Check req->request.dma before calling dwc3_flush_cache() and la
Hi Heinrich,
Thank you for the patch.
On mar., juin 04, 2024 at 07:44, Heinrich Schuchardt
wrote:
> Building the SPI flash DFU driver fails if SPI flash support is missing.
>
> drivers/dfu/dfu_sf.c:123:29: error:
> ‘CONFIG_SF_DEFAULT_MODE’ undeclared (first use in this function);
>
> A
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