This driver is currently only used on MIPS Malta boards.
Signed-off-by: Daniel Schwierzeck
Reviewed-by: Simon Glass
---
Changes in v2:
- add empty line before return statements
drivers/pci/pci_msc01.c | 72 -
1 file changed, 71 insertions(+), 1 deleti
Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.
Signed-off-by: Daniel Schwierzeck
---
(no changes since v1)
arch/mips/dts/mti,malta.dts |
As almost all peripherals are connected via PCI dependent on the
used core card, PCI setup is always required. Thus run pci_init()
including PCI scanning and probing and core card specific setups
in board_early_init_r().
Also prepare support for dynamically managing the status of the
different PCI
Enable DM_PCI and DM_ETH on MIPS Malta.
Signed-off-by: Daniel Schwierzeck
---
(no changes since v1)
arch/mips/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e54801673b..6b1f10d9a0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconf
On Mon, Jul 05, 2021 at 09:48:49AM -0600, Simon Glass wrote:
> It is fairly easy to handle this case and it makes the emulator more
> useful, since PCRs are commonly extended several times.
>
> Add support for this, using U-Boot's sha256 support.
>
> Signed-off-by: Simon Glass
> ---
>
> driver
On 7/15/21 1:27 PM, Patrick DELAUNAY wrote:
Hi,
[snip]
When I merge this patch on master branch, I get the error:
arm: + imx6dl_mamoj
+spl/u-boot-spl.bin exceeds file size limit:
+ limit: 0xefa0 bytes
+ actual: 0xf41d bytes
+ excess: 0x47d bytes
+make[1]: *** [Makefile:1997: spl/u-
v4 branch was reported to have some issues with SPL becoming too big
on some platforms (e.g. imx6dl_mamoj) This is fixed by dropping the
call to genimg_get_os_name().
Alexandru Gagniuc (5):
spl: mmc: Support OP-TEE payloads in Falcon mode
spl: Introduce spl_board_prepare_for_optee() hook
arm
In general, Falcon mode means we're booting a linux kernel directly.
With FIT images, however, an OP-TEE secure kernel can be booted before
linux. Thus, if the next stage is an IH_OS_TEE, this isn't necessarily
a problem.
Of course, a general solution would involve mmc_load_image_raw_os()
only loa
OP-TEE requires some particular setup, which is not needed for linux
or other payloads. Add a hook for platform-specific code to perform
any OP-TEE related configuration and initialization.
A weak function is used because it is symmetrical to other
spl_board_prepare_for_*() implementations. A solu
OP-TEE is very particular about how the TZC should be configured.
When booting an OP-TEE payload, an incorrect TZC configuration will
result in a panic.
Most information can be derived from the SPL devicetree. The only
information we don't have is the split between TZDRAM and shared
memory. This h
The purpose of this change is to allow configuring TrustZone (TZC)
memory permissions. For example, OP-TEE expects TZC regions to be
configured in a very particular way. The API presented here is
intended to allow exactly that.
UCLASS support is not implemented, because it would not be too useful.
Add the "/reserved-memory/optee" node to the SPL devicetree. The
purpose is to allow configuring TZC regions when booting OP-TEE.
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/ar
On Thu, 15 Jul 2021 at 22:04, Ilias Apalodimas
wrote:
>
> On Mon, Jul 05, 2021 at 09:48:49AM -0600, Simon Glass wrote:
> > It is fairly easy to handle this case and it makes the emulator more
> > useful, since PCRs are commonly extended several times.
> >
> > Add support for this, using U-Boot's s
On Thu, Jul 15, 2021 at 08:13:55PM +0200, Marek Behún wrote:
> Hello Tom and others,
>
> many boards still use the obsolete mtdparts command.
> What is the plan with this command? Do we still want to support it?
>
> Recently as discovered by Masami, my patch
> mtd: spi-nor: allow registering
On Thu, Jul 15, 2021 at 10:24:09AM +0200, gianluca wrote:
> Hello list!
> I know this mail will be OT, but I am worried about what will happen to a
> new project using the PowerPC T2080,e6500 64-bit PPC on this web site:
>
> https://www.powerpc-notebook.org
>
> I suspect the same architecture wi
On Thu, 15 Jul 2021 13:18:59 +0300
Ivan Uvarov wrote:
Hi Ivan,
> The Forlinx OKA40i-C devboard makes use of UARTs 0,2,3,4,5 and 7 of the R40
> SoC, of which UART 0 is connected to an RS232 converter, UART 5 routed to
> an RS485 converter, and the rest broken out directly via labeled headers.
> T
Greetings,
I'm taking a look at moving imx8mm-venice to use binman for packaging.
After doing so U-Boot proper fails to boot:
U-Boot SPL 2021.07-00475-g1126252f40 (Jul 15 2021 - 11:09:02 -0700)
GSC : v58 0xf098 RST:VIN Thermal Protection Disabled
Model : GW7300-00-B1B
Serial : 852420
MFGDa
On Thu, 15 Jul 2021 13:19:00 +0300
Ivan Uvarov wrote:
Hi Ivan,
thanks for sending this upstream!
> The FETA40i-C is a SoM by Forlinx based on the Allwinner R40/A40i.
>
> SoM specifications:
>
> - SoC: R40 or A40i
> - PMIC: AXP221S
> - RAM: 1GiB/2GiB DDR3 (dual-rank)
> - eMMC: 8GB,
> - Mates w
> - fuller implementation with more features
Is that a good thing? Didn't we just have a long discussion eschewing
a heavy-handed, bulky hand-off block design in favor of more simple
and flexible structures? I think simplicity is key for this and the
bl_aux_params are trying to be about as simple
Previously, the GPT device GUID was being used instead of the partition,
which was incorrect.
Signed-off-by: Alfonso Sánchez-Beato
Reviewed-by: Heinrich Schuchardt
---
lib/efi_loader/efi_device_path.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/lib/efi_loader/efi_
In DM Ethernet, the old "egiga0" name is no longer valid, so replace it
with Ethernet PHY name from device tree. Also, Ethernet PHY address
is available so read it from device tree.
Reviewed-by: Stefan Roese
Signed-off-by: Tony Dinh
---
Changes in v3:
- Get eth0 PHY address from device tree
Ch
Hi Tim,
On Thu, 15 Jul 2021 at 16:58, Tim Harvey wrote:
>
> Greetings,
>
> I'm taking a look at moving imx8mm-venice to use binman for packaging.
> After doing so U-Boot proper fails to boot:
>
> U-Boot SPL 2021.07-00475-g1126252f40 (Jul 15 2021 - 11:09:02 -0700)
> GSC : v58 0xf098 RST:VIN Th
On Thu, Jul 15, 2021 at 04:51:35PM +0200, Heinrich Schuchardt wrote:
> On 7/8/21 10:22 AM, Michael Chang wrote:
> > The u-boot efi console service registers a timer to poll the keyboard
> > input in every 50ns. In the efi block io service, this timer is
>
> The event is triggered every 5000 ns not
This patch series intends to provide a secure boot chain from SPL to Linux
kernel
based on the hash and signature verification of FIT image paradigm.
To improve the performance and save code size (SPL is limited to 64KB due to
HW-RoT),
the drviers of two HW crypto engine HACE and ARCY are also a
From: Joel Stanley
Probe HACE driver in SPL board init if enabled.
Signed-off-by: Joel Stanley
Signed-off-by: Chia-Wei Wang
---
arch/arm/mach-aspeed/ast2600/spl.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c
b/arch/arm/mach-aspeed/ast
From: Joel Stanley
Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.
Signed-off-by: Joel Stanley
Signed-off-by: Chia-Wei Wang
---
.../arm/include/asm/arch-aspeed/scu_ast2600.h | 5 +++--
drivers/clk/aspeed/clk_ast2600.c | 20 +++
2 files change
From: Joel Stanley
Hash and Crypto Engine (HACE) is designed to accelerate the
throughput of hash data digest, and symmetric-key encryption.
Signed-off-by: Joel Stanley
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/Kconfig | 2 +
drivers/crypto/Makefile | 1 +
d
The AST2600 SRAM has been extended to 88KB since A1
chip revision. This patch updates the SRAM size to
offer more space for early stack/heap use.
Signed-off-by: Chia-Wei Wang
---
arch/arm/include/asm/arch-aspeed/platform.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/
ARCY is deisnged to accerlerate ECC/RSA digital signature
generation and verification.
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/aspeed/Kconfig | 10 ++
drivers/crypto/aspeed/Makefile | 1 +
drivers/crypto/aspeed/aspeed_arcy.c | 182
lib/rsa/Kconf
Probe ARCY driver in SPL board init if enabled.
Signed-off-by: Chia-Wei Wang
---
arch/arm/mach-aspeed/ast2600/spl.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c
b/arch/arm/mach-aspeed/ast2600/spl.c
index a0fc420ff1..2172bb4ae7 100644
--- a/arch/ar
Add RSACLK enable for ARCY, the HW RSA/ECC crypto engine
of ASPEED AST26xx SoCs.
Signed-off-by: Chia-Wei Wang
---
arch/arm/include/asm/arch-aspeed/scu_ast2600.h | 1 +
drivers/clk/aspeed/clk_ast2600.c | 15 +++
2 files changed, 16 insertions(+)
diff --git a/arch/arm/i
Add ARCY DTS node and enable it for AST2600 EVB.
Signed-off-by: Chia-Wei Wang
---
arch/arm/dts/ast2600-evb.dts | 5 +
arch/arm/dts/ast2600.dtsi| 9 +
2 files changed, 14 insertions(+)
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index adb80a30ef..fd4e
Return CONFIG_SYS_LOAD_ADDR pointing to DRAM space for
spl_get_load_buffer() to allow generic SPL image loading
code (e.g. FIT and Ymodem) to store data in DRAM.
Signed-off-by: Chia-Wei Wang
---
arch/arm/mach-aspeed/ast2600/spl.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
dif
From: Joel Stanley
Currently the FIT verification calls directly into
SW implemented functions to get a CRC/SHA/MD5 hash.
This patch removes duplcated algorithm lookup and use
hash_lookup_algo to get the hashing function with HW
accelearation supported if configured.
The MD5 direct call remains
From: Joel Stanley
Add HACE DTS node and enable it for AST2600 EVB.
Signed-off-by: Joel Stanley
Signed-off-by: Chia-Wei Wang
---
arch/arm/dts/ast2600-evb.dts | 5 +
arch/arm/dts/ast2600.dtsi| 8
2 files changed, 13 insertions(+)
diff --git a/arch/arm/dts/ast2600-evb.dts b/ar
AST2600 leverages the FIT hash/signature verification to fulfill
secure boot trust chain. To improve the performance and save SW
code size for those crypto operations, the two HW crypto engine,
HACE and ARCY, are enabled.
However, both of the engines can only access to data stored in
DRAM space. T
Move CONFIG_EXTRA_ENV_SETTINGS to board-specific
configuration headers.
Signed-off-by: Chia-Wei Wang
---
include/configs/aspeed-common.h | 9 -
include/configs/evb_ast2500.h | 6 ++
include/configs/evb_ast2600.h | 6 ++
3 files changed, 12 insertions(+), 9 deletions(-)
diff
2021年7月16日(金) 2:00 Ilias Apalodimas :
>
> The capsule signature is now part of our DTB. This is problematic when a
> user is allowed to change/fixup that DTB from U-Boots command line since he
> can overwrite the signature as well.
> So Instead of adding the key on the DTB, embed it in the u-boot
Enable SPL FIT image load and verification support.
The HW accelerated SHA is also available with the
newly added support of the HACE HW hash engine.
Signed-off-by: Chia-Wei Wang
---
configs/evb-ast2600_defconfig | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
di
2021年7月16日(金) 2:00 Ilias Apalodimas :
>
> commit 322c813f4bec ("mkeficapsule: Add support for embedding public key in a
> dtb")
> added a bunch of options enabling the addition of the capsule public key
> in a dtb. Since now we embeded the key in U-Boot's .rodata we don't this
> this functionalit
On 4/22/21 6:09 PM, Pali Rohár wrote:
BIOS Release Date must be in format mm/dd/ and must be release date.
%s/BIOS/The SMBIOS/
Please add a reference to the System Management BIOS (SMBIOS) Reference
Specification here an as comment in the code.
U-Boot currently sets BIOS Release Date fro
On 7/14/21 7:19 AM, Masami Hiramatsu wrote:
Use %pD to log device-path instead of using efi_dp_str() and
efi_free_pool() locally in find_boot_device().
This is a cleanup patch, no feature update nor fix.
Suggested-by: Heinrich Schuchardt
Signed-off-by: Masami Hiramatsu
Reviewed-by: Heinrich
On Thu, 15 Jul 2021 at 22:30, Ilias Apalodimas
wrote:
> The capsule signature is now part of our DTB. This is problematic when a
> user is allowed to change/fixup that DTB from U-Boots command line since he
> can overwrite the signature as well.
> So Instead of adding the key on the DTB, embed i
On 7/15/21 7:00 PM, Ilias Apalodimas wrote:
Since we removed embeddingg the capsule key into a .dtb and fixed
authenticated capsule updates for all boards, move the relevant
documentation in the efi file and update it accordingly
Signed-off-by: Ilias Apalodimas
---
doc/board/emulation/qemu_ca
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