Weirdness of ofnode_get_addr_size()

Hi, I'm trying to make some sense of ofnode_get_addr_size() in order to fix [1] properly. First, the documentation if this functions says "This does no address translation". But the node-pointer path happily calls of_translate_address(), as the result of a6a45cd32539. For not offset-bases path, i

Unable to boot u-boot image from nand storage imx6ull.

Hello all, Ported uboot to seeed studio based imx6ull board.         NAND Part Number - mt29f4g08abaeawp         NAND Size - 512 MBytes Both the SPL and U-BOOT image boot successfully fr

FEC_MXC_SHARE_MDIO on i.MX6ULL

Hi all, I'm working on adding u-boot support for boards based on i.MX6ULL SoC. One board has a shared MDIO (CONFIG_FEC_MXC_SHARE_MDIO=y). > U-Boot 2021.04-2-gb199ac910c-dirty (May 02 2021 - 01:03:13 +0300) I've found a weird race condition in phy_find_by_mask() function. During the cold boot

Re: [PATCH] Makefile: Fix generation of flash.bin u-boot.itb with binman

Hi Marek, On 30.04.21 20:52, Simon Glass wrote: Hi Marek, On Fri, 30 Apr 2021 at 11:47, Marek Vasut wrote: On 4/30/21 8:13 PM, Simon Glass wrote: Hi, Hello Simon, On Thu, 29 Apr 2021 at 17:11, Bin Meng wrote: On Sat, Apr 24, 2021 at 8:57 PM Marek Vasut wrote: On 2/25/21 9:50 PM, M

Re: [PATCH] arm: mach-imx: Fix speculative instruction prefetch issue

Hi Ye, this patch is quite old and it looks like it was forgotten - I apply it and runs CI, but it breaks most arm board. So I have to drop it. Best regards, Stefano Babic On 21.02.21 03:27, Ye Li wrote: Default ARM32 MMU setting in u-boot sets XN bit to entire 4GB space no matter which DCAC

Re: [PATCH 3/3] imx: ventana: enable dm support for PCI and FEC ethernet

Hi Tim, I applied the first two patches of series, but this one has several conflicts in the configs file. Could you check and rebase it ? Thanks ! Best regards, Stefano On 16.04.21 23:53, Tim Harvey wrote: Enable driver model support for FEC ethernet which allows us to remove the iomux and

[PATCH v3 1/4] arm64: dts: imx8mm: Add common -u-boot.dtsi

> /soc@0 > aips1 > aips2 > aips3 > clk > iomuxc > osc_24m > are common node enablements across imx8mm platform for dm-spi, > dm-pre-reloc stages. > Move them into common dtsi, imx8mm-u-boot.dtsi > Cc: Tim Harvey > Cc: Adam Ford > Cc: Peng Fan > Cc: Teresa Remmet > Cc: Igor Opaniuk > Signed-off

[PATCH 7/7] include: configs: ge: avoid shell on boot failure

> From: Ian Ray > Prevent shell access on boot failure by entering an infinite > loop. > Signed-off-by: Ian Ray > Signed-off-by: Sebastian Reichel Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX

[PATCH v3 2/4] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM

> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini > from Engicam. > General features: > - NXP i.MX8M Mini > - Up to 2GB LDDR4 > - 8/16GB eMMC > - Gigabit Ethernet > - USB 2.0 Host/OTG > - PCIe Gen2 interface > - I2S > - MIPI DSI to LVDS > - rest of i.MX8M Mini features > i.Core MX8M Mini

[PATCH 1/7] board: ge: bx50v3: fix crystal bit

> The DA9063 enables the CRYSTAL bit by default, but there is no > crystal populated on the BA16 system on module. Without explicitly > clearing the CRYSTAL bit the system runs unstable and sometimes > reboots unexpectedly. > Signed-off-by: Sebastian Reichel Applied to u-boot-imx, master, thanks !

[PATCH 2/3] pci: pci-uclass: Add board_pci_fixup_dev for DM_PCI

> Add a board_pci_fixup_dev weak function to allow PCI device fixups > during enumeration. > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH,

[PATCH] ARM:imx:imx8mq-cm: Add support for Ronetix iMX8MQ-CM

> Supported peripherals: Ethernet, eMMC, Serial. > U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 > +0200) > Normal Boot > Trying to boot from MMC2 > U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) > CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz > Reset cause

[PATCH 3/7] configs: ge: bx50v3: adjust watchdog period

> From: Ian Ray > Increase watchdog period, in order to accomodate recent kernel size > and configuration changes. > Signed-off-by: Ian Ray > Signed-off-by: Sebastian Reichel Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- ===

[PATCH 2/2] arm: dts: imx6qdl-gw552x.dtsi: fix VBUS supply

> Remove the invalid 'regulator-always-on' property to resolve: > starting USB... > Bus usb@2184000: Error enabling VBUS supply (ret=-13) > probe failed, error -13 > Bus usb@2184200: USB EHCI 1.00 > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic --

[PATCH v2 1/2] net: fec: Don't use disabled phys

> If a phy is disabled, don't use it. This matches Linux's behavior. > Signed-off-by: Sean Anderson > Reviewed-by: Ramon Fried Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering

[PATCH v2 2/2] net: fec: Only unregister MII bus if we registered it

> If we fail to probe for whatever reason, we cannot unregister/free the > MII bus unless we registered it with fec_get_miibus. This fixes FECs > sharing an MDIO bus from destroying it, preventing the other FEC from > using it. > Fixes: 6a895d039b ("net: Update eQos driver and FEC driver to use eth

[PATCH v3 4/4] board: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0

> Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier > board. > Genaral features: > - Ethernet 10/100 > - Wifi/BT > - USB Type A/OTG > - Audio Out > - CAN > - LVDS panel connector > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. > i.Core MX8M Mini needs to mo

[PATCH 4/7] configs: ge: use non-persistent environment

> From: Ian Ray > Disable the unused persistent environment. > Signed-off-by: Ian Ray > Signed-off-by: Sebastian Reichel Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH,

[PATCH] imx: mkimage_fit_atf: fix file size reporting

> instead using ls and awk to determine file size use stat instead. > This fixes an invalid size reporting for user or group names that have > spaces in them. > This adds a dependency on the stat application which is part of > the coreutils package which also includes ls. > Signed-off-by: Tim Harve

[PATCH 6/7] include: configs: ge: simplify default boot command

> From: Ian Ray > Minor cosmetic changes to unify `CONFIG_EXTRA_ENV_SETTINGS' > indentation between Bx50v3 and PPD to make comparison and > review easier and simplify the default boot command. > Signed-off-by: Ian Ray Ian Ray > Signed-off-by: Sebastian Reichel Applied to u-boot-imx, master, than

[PATCH 5/7] include: configs: ge: bx50v3: drop USB boot

> From: Ian Ray > Remove unsupported USB boot. > Signed-off-by: Ian Ray > Signed-off-by: Sebastian Reichel Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing

[PATCH] imx: imx8: Update README with somewhat correct firmware versions

> From: Priit Laes > Current setup instructions for i.MX8QM MEK board include somewhat > conflicting instructions, so here's an attempt to fix it. > After trying both sets of firmwares, I can conclude that both of > them fail to work: > - no boot at all with imx-sc-firmware-0.7 / firmware-imx-7.6

[PATCH v8 1/2] arm: dts: add imx8mm-cl-iot-gate dts file

> From: "Ying-Chun Liu (PaulLiu)" > Add board dts for imx8mm-cl-iot-gate > Signed-off-by: Kirill Kapranov > Signed-off-by: Uri Mashiach > Signed-off-by: Valentin Raevsky > Signed-off-by: Ying-Chun Liu (PaulLiu) > Cc: Peter Robinson Applied to u-boot-imx, master, thanks ! Best regards, Stefan

[PATCH v3 3/4] board: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit

> Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive > Evaluation Board. > Genaral features: > - LCD 7" C.Touch > - microSD slot > - Ethernet 1Gb > - Wifi/BT > - 2x LVDS Full HD interfaces > - 3x USB 2.0 > - 1x USB 3.0 > - HDMI Out > - Mini PCIe > - MIPI CSI > - 2x CAN > - Audio Ou

[PATCH] pci: imx: disable imx6sdl LTSSM upon driver remove

> commit 6ecbe1375671 ("drivers: pci: imx: add imx_pcie_remove function") > attempted to resolve an issue caused by MX6QDL not having a proper > intneral PCIe core reset and thus hanging during kernel init if the > bootloader had enabled PCI. > The issue exists for IMX6Q, IMX6D, IXM6S, and IMX6DL.

[PATCH] Makefile: Fix generation of flash.bin u-boot.itb with binman

> In case binman is enabled, the u-boot.itb is generated using this tool > and there is no direct u-boot.itb target, but instead the binman tool > must be invoked. Add support for this case. > Signed-off-by: Marek Vasut > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks !

[PATCH v3] imx: Add support for Ronetix's iMX7-CM board

> Console boot log: > U-Boot SPL 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) > Trying to boot from MMC1 > U-Boot 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) > CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz) > CPU: Commercial temperature grade (0C

[PATCH v8 2/2] arm: imx8m: add support for Compulab iot-gate-imx8 (imx8mm-cl-iot-gate)

> From: "Ying-Chun Liu (PaulLiu)" > Add initial support for Compulab iot-gate-imx8 board (imx8mm-cl-iot-gate). > The initial support includes: > - MMC > - eMMC > - I2C > - FEC > - Serial console > Signed-off-by: Kirill Kapranov > Signed-off-by: Uri Mashiach > Signed-off-by: Valentin Raevsky

[PATCH 1/2] imx: ventana: add delay before reading EEPROM

> fixes: d863d054397a ("imx: ventana: convert U-Boot to OF_CONTROL using FIT > image") > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, M

[PATCH 1/3] pci: Update the highest subordinate bus number for bridge setup

> From: Masami Hiramatsu > Update the highest subordinate bus number after probing the devices > under the bus for setting up the bridge correctly. > The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") > removed this but it is required if a PCIe bridge is under the bus. > Fixes: 42

[PATCH 2/7] board: ge: bx50v3: add phy reset GPIO

> Add PHY's reset GPIO, so that U-Boot does a PHY hard reset. > This is needed, since the PHY might become unresponsive if > watchdog reboots the system while a transaction is ongoing. > The reset GPIO is added to the U-Boot specific DT files, since > the kernel does not setup the reserved register

[PATCH v2] imx8mn: configs: add support for distro boot commands

Supported boot device types in iMX8MN: MMC, DHCP. Add DISTRO_DEFAULTS config option and include the distro boot command header file to enable full support of distro boot on i.MX8M Nano EVK (both DDR and LPDDR derivatives). Drop previous environment, which was targeting customized boot commands an

Re: sunxi_nand_spl reading zeros on NextThing C.H.I.P.

Replying to myself, I'm using sunxi driver for nand spl, had to remove ECC from "nand_read_page" function, after that I was able to proceed to second stage of boot. Not sure of the cause, maybe the u-boot_SPL ECC algorithm is different of the one on u-boot, which is used to write u-boot on nand a

Re: [PATCH] arm: imx: imx8mm: correct unrecognized fracpll frequency

On Sat, May 1, 2021 at 5:13 PM Andrey Zhizhikin wrote: > > Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() > macro, which expands the value provided to the Hz range without taking into > account the precise Hz setting. This causes the frequency of 266 MHz not ot > be found i

Re: [PATCH v2] imx8mn: configs: add support for distro boot commands

Hi Andrey, On Sun, May 2, 2021 at 11:33 AM Andrey Zhizhikin wrote: > > Supported boot device types in iMX8MN: MMC, DHCP. > > Add DISTRO_DEFAULTS config option and include the distro boot command > header file to enable full support of distro boot on i.MX8M Nano EVK (both > DDR and LPDDR derivativ

Re: [PATCH] arm: imx: imx8mm: correct unrecognized fracpll frequency

Hi Andrey, After re-reading the patch I have some comments: On Sat, May 1, 2021 at 5:13 PM Andrey Zhizhikin wrote: > > Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() > macro, which expands the value provided to the Hz range without taking into > account the precise Hz set

Re: [PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support

Thanks, Bin. Hi Rick, Not sure whether you have a chance to pick it up. Or let me know if any part needs change. Thanks, - Green On Thu, Apr 29, 2021 at 8:27 PM Bin Meng wrote: > > Hi Green, > > On Thu, Apr 29, 2021 at 7:11 PM Green Wan wrote: > > > > Hi Bin, > > > > How should this patch set

Re: [PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support

Hi Green, I did not sign the Reviewed-by for this patch "board: sifive: add HiFive Unmatched board support" from v1 to v6. But it just has been tagged in [v7,7/8] board: sifive: add HiFive Unmatched board support by yourself. [v6,6/7] board: sifive: add HiFive Unmatched board support https://pat

[PATCH 0/4] malloc: Enable profiling dlmalloc with valgrind

This series adds support for running valgrind against U-Boot's internal malloc. This allows for much more useful reports to be generated. Sean Anderson (4): Add valgrind headers to U-Boot malloc: Annotate allocator for valgrind doc: sandbox: Document how to run sandbox with valgrind mallo

[PATCH 3/4] doc: sandbox: Document how to run sandbox with valgrind

This documents how to get more detailed results from valgrind made possible by the last two commits. Signed-off-by: Sean Anderson --- doc/arch/sandbox.rst | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst index e052b6

[PATCH 2/4] malloc: Annotate allocator for valgrind

This annotates malloc and friends so that valgrind can track the heap. To do this, we need to follow a few rules: * Call VALGRIND_MALLOCLIKE_BLOCK whenever we malloc something * Call VALGRIND_FREELIKE_BLOCK whenever we free something (generally after we have done our bookkeeping) * Call VALGRIND

[PATCH 4/4] malloc: Fix sbrk clearing memory after freeing it instead of before

This fixes memory being cleared after releasing it. Instead, clear memory before releasing it. In addition, suppress valgrind warnings about writing to free'd memory. Signed-off-by: Sean Anderson --- common/dlmalloc.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git

Re: [PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support

Hi Rick, Thanks for quick response. See my reply below. On Mon, May 3, 2021 at 10:34 AM Rick Chen wrote: > > Hi Green, > > > I did not sign the Reviewed-by for this patch "board: sifive: add > HiFive Unmatched board support" from v1 to v6. > But it just has been tagged in [v7,7/8] board: sifive:

Re: [PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support

Hi Green, > Hi Rick, > > Thanks for quick response. See my reply below. > > On Mon, May 3, 2021 at 10:34 AM Rick Chen wrote: > > > > Hi Green, > > > > > > I did not sign the Reviewed-by for this patch "board: sifive: add > > HiFive Unmatched board support" from v1 to v6. > > But it just has been

Re: [PATCH v6 2/7] riscv: cpu: fu740: Add support for cpu fu740

> From: Green Wan [mailto:green@sifive.com] > Sent: Thursday, April 08, 2021 9:40 PM > Cc: bmeng...@gmail.com; Green Wan ; Rick Jian-Zhi > Chen(陳建志) ; Paul Walmsley ; > Palmer Dabbelt ; Anup Patel ; Atish > Patra ; Pragnesh Patel ; > Lukasz Majewski ; Joe Hershberger ; > Ramon Fried ; u-bo

[PATCH v1 2/2] arm: octeontx2: Add Octeon TX2 CN9132 DB support

From: Konstantin Porotchkin This patch adds the base support for the Marvell Octeon TX2 CN9132 DB. Two versions are currently added via different defconfig's, one for booting via SPI NOR and one for NAND booting. Not all interfaces are supported fully yet. Signed-off-by: Konstantin Porotchkin S

[PATCH v1 0/2] arm: octeontx2: Add base support for Marvell OcteonTX2 CN9132 DB

This patchset adds the base support for the Marvell OcteonTX2 CN9132 DB board and includes required dts/dtsi files and the defconfig files for this. Thanks, Stefan Stefan Roese (2): arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN9132 DB arm: octeontx2: Add Octeon TX2 CN9132 DB support

[PATCH v1 1/2] arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN9132 DB

From: Konstantin Porotchkin This patch adds the dtsi/dts files needed to support the Marvell Octeon TX2 CN9132 DB. This is only the base port with not all interfaces supported fully. Signed-off-by: Konstantin Porotchkin Signed-off-by: Stefan Roese --- arch/arm/dts/Makefile|

[PATCH v2 01/10] phy: introduce 1000BaseX and 2500BaseX modes

From: Stefan Chulski Signed-off-by: Stefan Chulski Signed-off-by: Stefan Roese --- (no changes since v1) include/phy_interface.h | 4 1 file changed, 4 insertions(+) diff --git a/include/phy_interface.h b/include/phy_interface.h index 841ade311efb..ebb18ecd40c0 100644 --- a/include/phy

[PATCH v2 00/10] net: mvpp2: Sync Marvell mvpp2 driver with Marvell version

This patchset adds the missing ethernet mvpp2 patches from the Marvell U-Boot SDK version to support and fix higher connection speeds. This is done in preparation for the integration of the Octeon TX2 CN913x support, which uses the updated version of this code. Please note that I explicitly did

[PATCH v2 02/10] net: mvpp2: add CP115 port1 10G/5G SFI support

From: Stefan Chulski 1. Differ between Port1 RGMII and SFI modes in Netcomplex config. 2. Remove XPCS config from SFI mode. Port1 doesn't XPCS domain, XPCS config should be removed. Access to Port1 XPCS can cause stall. 3. Add Port1 MPCS configurations. Signed-off-by: Stefan Chulski Signe

[PATCH v2 04/10] net: mvpp2: remove redundant SMI address configuration

From: Marcin Wojtas Because the mvpp2 driver now relies on the PHYLIB and the external MDIO driver, configuring low level SMI bus settings is redundant. Signed-off-by: Marcin Wojtas Reviewed-by: Kostya Porotchkin Reviewed-by: Stefan Chulski Signed-off-by: Stefan Roese --- (no changes since

[PATCH v2 05/10] net: mvpp2: Fix 2.5G GMII_SPEED configurations

From: Stefan Chulski GMII_SPEED should be enabled for 2.5G speed Signed-off-by: Stefan Chulski Reviewed-by: Yan Markman Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese --- (no changes since v1) drivers/net/mvpp2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --

[PATCH v2 03/10] net: mvpp2: add 1000BaseX and 2500BaseX ppv2 support

From: Stefan Chulski Signed-off-by: Stefan Chulski Signed-off-by: Stefan Roese --- (no changes since v1) drivers/net/mvpp2.c | 117 ++-- 1 file changed, 112 insertions(+), 5 deletions(-) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 015

[PATCH v2 07/10] net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REG

From: Ben Peled Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese --- (no changes since v1) drivers/net/mvpp2.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 879289452b15..

[PATCH v2 06/10] net: mvpp2: AN Bypass in 1000 and 2500 basex mode

From: Ben Peled Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese --- (no changes since v1) drivers/net/mvpp2.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c

[PATCH v2 09/10] net: mvpp2: allow MDIO registration for fixed links

From: Stefan Chulski Currently, there are 2 valid cases for interface, PHY and mdio relation: - If an interface has PHY handler, it'll call mdio_mii_bus_get_from_phy(), which will register MDIO bus. - If we want to use fixed-link for an interface, PHY handle is not defined in the

[PATCH v2 08/10] net: mvpp2: fix missing switch case break

From: Ben Peled Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese --- (no changes since v1) drivers/net/mvpp2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 61a0ea0894a7..

[PATCH v2 10/10] net: mvpp2: add explicit sgmii-2500 support

From: Marcin Wojtas Until now the mvpp2 driver used an extra 'phy-speed' DT property in order to differentiate between the SGMII and SGMII @2.5GHz. As there is a dedicated PHY_INTERFACE_MODE_SGMII_2500 flag to mark the latter start using it and drop the custom flag. Signed-off-by: Marcin Wojtas

Re: [PATCH v1 08/10] net: mvpp2: fix missing switch case break

Hi Ramon, On 30.04.21 16:18, Ramon Fried wrote: On Fri, Apr 30, 2021 at 7:40 AM Stefan Roese wrote: On 29.04.21 22:24, Ramon Fried wrote: On Tue, Apr 27, 2021 at 4:28 PM Stefan Roese wrote: From: Ben Peled Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotc

[PATCH 1/2] riscv: cpu: Add callback to init each core

Add a callback harts_early_init() to start.S to allow different riscv hart perform setup code for each hart as early as possible. Since all the harts enter the callback, they must be able to run the same setup. Signed-off-by: Green Wan Reviewed-by: Rick Chen Reviewed-by: Bin Meng --- arch/risc

[PATCH 2/2] riscv: cpu: fu740: clear feature disable CSR

Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan Reviewed-by: