Hi Dan
I am interested to see the mainline support for the DP83869 phy. Is
there any progress on this patch or are there any blocker?
Am Di., 21. Apr. 2020 um 16:35 Uhr schrieb Dan Murphy :
>
> Michal
>
> On 4/21/20 7:39 AM, Michal Simek wrote:
> > On 21. 04. 20 14:04, Dan Murphy wrote:
> >> Mich
Hi Tom, Simon,
On 20/04/2021 10:42, Neil Armstrong wrote:
> A regression weas detected on Amlogic G12A/G12B SoCs, where HDMI output was
> disable
> even when Linux was booting.
>
> Bisect reports 139e4a1cbe ("drivers: reset: Add a managed API to get reset
> controllers from the DT")
> as the of
On Tue, 27 Apr 2021 02:37:20 +0200
Marek Vasut wrote:
Hi,
> On 4/27/21 2:03 AM, Andre Przywara wrote:
> > As the comment in musb_regs.h describes, Allwinner saves the
> > MUSB_CONFIGDATA register, which always return 0 on those SoCs.
> >
> > This is also true for the H6 and H616, so extend the
Add properties related to eMMC HS400 mode for esdhc1.
Signed-off-by: Yangbo Lu
---
arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi | 6 ++
arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi | 6 ++
arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi | 6 ++
arch/arm/dts/fsl-lx2162a-qds.dts | 6 ++
4
On 26.04.21 22:47, Tom Rini wrote:
On Mon, Apr 26, 2021 at 10:21:30PM +0200, Rasmus Villemoes wrote:
On 14/04/2021 09.18, Rasmus Villemoes wrote:
This is a resend of v3 from a year ago. Please consider applying.
v4: rebase to current master.
v3: add fixup patch for mpc83xx_timer, add document
On 13.04.21 16:43, Rasmus Villemoes wrote:
Some boards don't work with the rate-limiting done in the generic
watchdog_reset() provided by wdt-uclass.
For example, on powerpc, get_timer() ceases working during bootm since
interrupts are disabled before the kernel image gets decompressed, and
when
Hi Tom,
please pull the following watchdog related patches from Rasmus:
- WDT: Enable use of hw_margin_ms=0
- PowerPC: Introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD
- PowerPC: Misc changes and fixes to the WDT handling
--
Enable eMMC HS400 workarounds for LX2160A/LX2162A.
Signed-off-by: Yangbo Lu
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9d1ba4c771..395e5ccaad 10
On Mon, Apr 26, 2021 at 12:08 AM Yuichiro Goto wrote:
>
> Use of strcat() against an uninitialized buffer would lead
> to buffer overflow. This patch fixes it.
>
> Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()")
> Signed-off-by: Yuichiro Goto
> Cc: Peter Robinson
> Cc: Andy Shevche
Remove the tab in clk_get_bulk to respect the coding rules.
Signed-off-by: Patrick Delaunay
---
drivers/clk/clk-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 4ab3c402ed..b126c5ed60 100644
--- a/drivers/clk/
Define LOG_CATEGORY for all uclass to allow filtering with
log command.
Signed-off-by: Patrick Delaunay
---
drivers/adc/adc-uclass.c| 2 ++
drivers/ata/ahci-uclass.c | 2 ++
drivers/axi/axi-emul-uclass.c | 2 ++
drivers/axi/axi-uclass.c
On 4/27/21 10:10 AM, Andre Przywara wrote:
On Tue, 27 Apr 2021 02:37:20 +0200
Marek Vasut wrote:
Hi,
On 4/27/21 2:03 AM, Andre Przywara wrote:
As the comment in musb_regs.h describes, Allwinner saves the
MUSB_CONFIGDATA register, which always return 0 on those SoCs.
This is also true for th
On Tue, Apr 27, 2021 at 1:41 PM Andre Przywara wrote:
>
> On Tue, 27 Apr 2021 02:37:20 +0200
> Marek Vasut wrote:
>
> Hi,
>
> > On 4/27/21 2:03 AM, Andre Przywara wrote:
> > > As the comment in musb_regs.h describes, Allwinner saves the
> > > MUSB_CONFIGDATA register, which always return 0 on tho
Because of the incorrectly supported SGMII_2500 mode, this patch
disables eth2 for now until this issue will be fixed in mainline.
Also fix an incorrect comment.
Signed-off-by: Stefan Roese
Cc: Konstantin Porotchkin
Cc: Stefan Chulski
Cc: Nadav Haklai
Cc: Marek Behun
---
This patch is target
With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode
definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even
when this is functionally incorrect since "2500base-x" was not supported
in U-Boot at that time. As this mode is now supported (at least present
in the header
As was discussed on the list, PHY_INTERFACE_MODE_SGMII_2500 is used
incorrectly in the Marvell mvpp2 network driver and the Marvell PHY
code. This patch removes the references to this macro in the Marvell
PHY driver for now.
The correct support shall be implemented at a later time.
Signed-off-by:
As was discussed on the list, PHY_INTERFACE_MODE_SGMII_2500 is used
incorrectly in the Marvell mvpp2 network driver and the Marvell PHY
code. This patch removes the references to this macro in the mvpp2
network driver for now.
The correct support shall be implemented at a later time.
Signed-off-b
On Tue, Apr 27, 2021 at 7:54 AM wrote:
>
> From: Takahiro Kuwano
>
> The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
>
> The summary datasheets can be found in the following links.
> https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
> https://www.cyp
Hi Bin,
On 4/27/21 7:17 AM, Bin Meng wrote:
> Hi Michal,
>
> On Mon, Apr 26, 2021 at 8:31 PM Michal Simek wrote:
>>
>> The commit 6c993815bbea ("net: phy: xilinx: Be compatible with live OF
>> tree") change driver behavior to while loop which wasn't correct because
>> the driver was looping over
On Tue, Apr 27, 2021 at 09:37:11AM +0200, Neil Armstrong wrote:
> Hi Tom, Simon,
>
> On 20/04/2021 10:42, Neil Armstrong wrote:
> > A regression weas detected on Amlogic G12A/G12B SoCs, where HDMI output was
> > disable
> > even when Linux was booting.
> >
> > Bisect reports 139e4a1cbe ("drivers
Am Montag, den 26.04.2021, 16:43 +0200 schrieb Stefan Roese:
> This patch makes the necessary adjustments in the defconfig to fully
> support the CFI flash on the Octeon EBB7304.
>
> Signed-off-by: Stefan Roese
> Cc: Aaron Williams
> Cc: Chandrakala Chavva
> Cc: Daniel Schwierzeck
> ---
> con
Hi Dario,
One question below.
On 25/04/2021 17:17, Dario Binacchi wrote:
As pointed by [1] and [2], commit
d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") is wrong:
- It makes every 'reg' DT property translatable. It changes the address
translation so that for an I2C 'reg' address
From: MengLi
In uboot command line environment, watchdog is not able to be
stopped with below commands:
SOCFPGA_STRATIX10 # wdt dev watchdog@ffd00200
SOCFPGA_STRATIX10 # wdt stop
Refer to watchdog driver in linux kernel, it is also need to reset
watchdog after disable it so that the disable actio
From: MengLi
In latest u-boot code, watchdog feature is implemented, so enable
wdt command by default.
Signed-off-by: Meng Li
---
configs/socfpga_stratix10_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_stratix10_defconfig
b/configs/socfpga_stratix10_defconfig
i
Hi Stefan,
On 27/04/2021 11:48, Stefan Roese wrote:
With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode
definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even
when this is functionally incorrect since "2500base-x" was not supported
in U-Boot at that time. As thi
This patch series add the PE/COFF measurement support.
Extending PCR and Event Log is tested with fTPM
running as a OP-TEE TA.
Unit test will be added in the separate series.
Masahisa Kojima (2):
efi_loader: expose efi_image_parse() even if UEFI Secure Boot is
disabled
efi_loader: add PE/C
This is preparation for PE/COFF measurement support.
PE/COFF image hash calculation is same in both
UEFI Secure Boot image verification and measurement in
measured boot. PE/COFF image parsing functions are
gathered into efi_image_loader.c, and exposed even if
UEFI Secure Boot is not enabled.
This
"TCG PC Client Platform Firmware Profile Specification"
requires to measure every attempt to load and execute
a OS Loader(a UEFI application) into PCR[4].
This commit adds the PE/COFF image measurement, extends PCR,
and appends measurement into Event Log.
Signed-off-by: Masahisa Kojima
---
Chang
Hi Jakov,
On 27.04.21 14:57, Jakov Petrina wrote:
Hi Stefan,
On 27/04/2021 11:48, Stefan Roese wrote:
With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode
definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even
when this is functionally incorrect since "2500base
From: Stefan Chulski
Signed-off-by: Stefan Chulski
Signed-off-by: Stefan Roese
---
include/phy_interface.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/phy_interface.h b/include/phy_interface.h
index 841ade311efb..ebb18ecd40c0 100644
--- a/include/phy_interface.h
+++ b/incl
From: Stefan Chulski
1. Differ between Port1 RGMII and SFI modes in Netcomplex config.
2. Remove XPCS config from SFI mode.
Port1 doesn't XPCS domain, XPCS config should be removed.
Access to Port1 XPCS can cause stall.
3. Add Port1 MPCS configurations.
Signed-off-by: Stefan Chulski
Signe
From: Stefan Chulski
GMII_SPEED should be enabled for 2.5G speed
Signed-off-by: Stefan Chulski
Reviewed-by: Yan Markman
Reviewed-by: Kostya Porotchkin
Tested-by: sa_ip-sw-jenkins
Signed-off-by: Stefan Roese
---
drivers/net/mvpp2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
d
This patchset adds the missing ethernet mvpp2 patches from the Marvell
U-Boot SDK version to support and fix higher connection speeds. This is
done in preparation for the integration of the Octeon TX2 CN913x
support, which uses the updated version of this code.
Please note that I explicitly did
From: Stefan Chulski
Signed-off-by: Stefan Chulski
Signed-off-by: Stefan Roese
---
drivers/net/mvpp2.c | 117 ++--
1 file changed, 112 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 015f5329de74..847007d5b487
From: Marcin Wojtas
Because the mvpp2 driver now relies on the PHYLIB and
the external MDIO driver, configuring low level
SMI bus settings is redundant.
Signed-off-by: Marcin Wojtas
Tested-by: sa_ip-sw-jenkins
Reviewed-by: Kostya Porotchkin
Reviewed-by: Stefan Chulski
Signed-off-by: Stefan R
From: Ben Peled
Signed-off-by: Ben Peled
Reviewed-by: Stefan Chulski
Reviewed-by: Kostya Porotchkin
Tested-by: sa_ip-sw-jenkins
Signed-off-by: Stefan Roese
---
drivers/net/mvpp2.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 61a0ea08
From: Ben Peled
Signed-off-by: Ben Peled
Reviewed-by: Stefan Chulski
Reviewed-by: Kostya Porotchkin
Tested-by: sa_ip-sw-jenkins
Signed-off-by: Stefan Roese
---
drivers/net/mvpp2.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 87928945
From: Ben Peled
Signed-off-by: Ben Peled
Reviewed-by: Stefan Chulski
Reviewed-by: Kostya Porotchkin
Tested-by: sa_ip-sw-jenkins
Signed-off-by: Stefan Roese
---
drivers/net/mvpp2.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mv
From: Stefan Chulski
Currently, there are 2 valid cases for interface, PHY
and mdio relation:
- If an interface has PHY handler, it'll call
mdio_mii_bus_get_from_phy(), which will register
MDIO bus.
- If we want to use fixed-link for an interface,
PHY handle is not defined in the
From: Marcin Wojtas
Until now the mvpp2 driver used an extra 'phy-speed'
DT property in order to differentiate between the
SGMII and SGMII @2.5GHz. As there is a dedicated
PHY_INTERFACE_MODE_SGMII_2500 flag to mark the latter
start using it and drop the custom flag.
Signed-off-by: Marcin Wojtas
Hi, Stefan,
> -Original Message-
> From: Stefan Roese
> Sent: Tuesday, April 27, 2021 16:27
> To: u-boot@lists.denx.de
> Cc: Stefan Chulski ; Marcin Wojtas
> ; Nadav Haklai ; Marek Behun
> ; Joe Hershberger ; Kostya
> Porotchkin ; Yan Markman
> ; sa_ip-sw-jenkins jenk...@marvell.com>
> S
On 27.04.21 15:08, Masahisa Kojima wrote:
> This is preparation for PE/COFF measurement support.
> PE/COFF image hash calculation is same in both
> UEFI Secure Boot image verification and measurement in
> measured boot. PE/COFF image parsing functions are
> gathered into efi_image_loader.c, and exp
Hi Kosta,
On 27.04.21 15:48, Kostya Porotchkin wrote:
Hi, Stefan,
-Original Message-
From: Stefan Roese
Sent: Tuesday, April 27, 2021 16:27
To: u-boot@lists.denx.de
Cc: Stefan Chulski ; Marcin Wojtas
; Nadav Haklai ; Marek Behun
; Joe Hershberger ; Kostya
Porotchkin ; Yan Markman
; sa
Hi Heinrich,
> > +++ b/include/tpm-v2.h
> > @@ -61,6 +61,7 @@ struct udevice;
> > #define EV_S_CRTM_VERSION ((u32)0x0008)
> > #define EV_CPU_MICROCODE((u32)0x0009)
> > #define EV_TABLE_OF_DEVICES ((u32)0x000B)
>
> Please, add a comment here that the following values are def
On 27.04.21 10:41, meng...@windriver.com wrote:
From: MengLi
In uboot command line environment, watchdog is not able to be
stopped with below commands:
SOCFPGA_STRATIX10 # wdt dev watchdog@ffd00200
SOCFPGA_STRATIX10 # wdt stop
Refer to watchdog driver in linux kernel, it is also need to reset
w
On 4/27/21 10:23 AM, Stefan Roese wrote:
> On 27.04.21 10:41, meng...@windriver.com wrote:
>> From: MengLi
>>
>> In uboot command line environment, watchdog is not able to be
>> stopped with below commands:
>> SOCFPGA_STRATIX10 # wdt dev watchdog@ffd00200
>> SOCFPGA_STRATIX10 # wdt stop
>> Ref
On Mon, Apr 26, 2021, 5:35 PM Marek Vasut wrote:
>
> On 4/27/21 2:01 AM, Tim Harvey wrote:
> [...]
> >>> Why would the power domain get probed/enabled for the usbotg2
> >>> bus but not the usbotg1 bus? Here is some debugging:
> >>> u-boot=> usb start
> >>> starting USB...
> >>> Bus usb@32e4: e
For systems which use generic PHY support and implement USB PHY driver,
the parsing of PHY properties is unnecessary, disable it.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
Cc: Ye Li
Cc: uboot-imx
---
drivers/usb/host/ehci-mx6.c | 17
On Tue, Apr 27, 2021 at 9:06 AM Marek Vasut wrote:
>
> For systems which use generic PHY support and implement USB PHY driver,
> the parsing of PHY properties is unnecessary, disable it.
>
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> Cc: Tim Harvey
> C
On Tue, Apr 27, 2021 at 10:28:20AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following watchdog related patches from Rasmus:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sat, Apr 17, 2021 at 08:52:13PM +0800, Qu Wenruo wrote:
> There are some cases where decompressed sectors can have padding zeros.
>
> In kernel code, we have lines to address such situation:
>
> /*
> * btrfs_getblock is doing a zero on the tail of the page too,
> * b
On Sat, Apr 17, 2021 at 09:34:37AM -0500, Samuel Holland wrote:
> When zImage support was added to SPL, the messages were hidden to reduce
> code size. However, the wrong config symbol was used. Since this file is
> only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden.
>
> Use
On Tue, Apr 20, 2021 at 10:42:25AM +0200, Neil Armstrong wrote:
> With this extended test, we get the following failure :
>
> => ut dm reset_base
> Test: dm_test_reset_base: reset.c
> test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id ==
> reset_method3_1.id: Expected 0x14 (20), got 0x2
On Tue, Apr 20, 2021 at 10:42:26AM +0200, Neil Armstrong wrote:
> This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
> made it return the index 0 or 1, whatever index was passed.
>
> The dm_test_reset_base() did not catch it, but the dm_test_reset_base()
> extension
> catches i
On Thu, Apr 22, 2021 at 09:44:18AM +0200, Rasmus Villemoes wrote:
> When CONFIG_USE_DEFAULT_ENV_FILE=y and the file
> CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any
> non-comment, non-empty lines), we end up feeding nothing into xxd,
> which in turn then outputs nothing. Then bl
On Thu, Apr 22, 2021 at 06:35:58PM +0200, Dario Binacchi wrote:
> Otherwise it can generate a division by zero, which has an undefined
> behavior.
>
> Signed-off-by: Dario Binacchi
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Apr 22, 2021 at 10:28:56PM +0200, Dario Binacchi wrote:
> As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
> comparison of an unsigned value is never true.
>
> Signed-off-by: Dario Binacchi
> Reviewed-by: Pratyush Yadav
Applied to u-boot/master, thanks!
--
Tom
sign
On Mon, Apr 26, 2021 at 08:08:03AM +0900, Yuichiro Goto wrote:
> Use of strcat() against an uninitialized buffer would lead
> to buffer overflow. This patch fixes it.
>
> Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()")
> Signed-off-by: Yuichiro Goto
> Cc: Peter Robinson
> Cc: Andy
There is no need to set and/or detect mode in of_to_plat and
accessing phy registers at that point before device power domain and
clock are enabled will cause hangs on platforms such as IMX8M Mini.
Move the mode set/detect from of_to_plat into the probe and remove
the unnecessary of_to_plat.
Sign
Add support for determining host vs peripheral mode for IMX8MM
configured as OTG.
Signed-off-by: Tim Harvey
---
drivers/usb/host/ehci-mx6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index c2dfe49012..d055d2b1fe 1
Enable USB support for host controller and various USB ethernet devices.
Signed-off-by: Tim Harvey
---
configs/imx8mm_venice_defconfig | 15 +++
include/configs/imx8mm_venice.h | 4
2 files changed, 19 insertions(+)
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm
On 4/27/21 7:08 PM, Tim Harvey wrote:
Add support for determining host vs peripheral mode for IMX8MM
configured as OTG.
Signed-off-by: Tim Harvey
---
drivers/usb/host/ehci-mx6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host
On 4/27/21 7:08 PM, Tim Harvey wrote:
There is no need to set and/or detect mode in of_to_plat and
accessing phy registers at that point before device power domain and
clock are enabled will cause hangs on platforms such as IMX8M Mini.
Move the mode set/detect from of_to_plat into the probe and
On Tue, Apr 27, 2021 at 10:44 AM Marek Vasut wrote:
>
> On 4/27/21 7:08 PM, Tim Harvey wrote:
> > Add support for determining host vs peripheral mode for IMX8MM
> > configured as OTG.
> >
> > Signed-off-by: Tim Harvey
> > ---
> > drivers/usb/host/ehci-mx6.c | 2 +-
> > 1 file changed, 1 insert
Am Tue, Apr 27, 2021 at 10:50:34AM -0700 schrieb Tim Harvey:
> On Tue, Apr 27, 2021 at 10:44 AM Marek Vasut wrote:
> >
> > On 4/27/21 7:08 PM, Tim Harvey wrote:
> > > Add support for determining host vs peripheral mode for IMX8MM
> > > configured as OTG.
> > >
> > > Signed-off-by: Tim Harvey
> >
Am Tue, Apr 27, 2021 at 11:11:19AM +0530 schrieb Anand Moon:
> hi Patrick,
>
> On Tue, 27 Apr 2021 at 01:38, Patrick Wildt wrote:
> >
> > Am Mon, Apr 26, 2021 at 01:26:32PM + schrieb Anand Moon:
> > > Use udelay instead of msleep fix the below warning.
> >
> > You sure that's correct? the m i
On 4/27/21 9:24 PM, Patrick Wildt wrote:
Am Tue, Apr 27, 2021 at 10:50:34AM -0700 schrieb Tim Harvey:
On Tue, Apr 27, 2021 at 10:44 AM Marek Vasut wrote:
On 4/27/21 7:08 PM, Tim Harvey wrote:
Add support for determining host vs peripheral mode for IMX8MM
configured as OTG.
Signed-off-by: Ti
On Tue, 27 Apr 2021 at 22:52, Heinrich Schuchardt wrote:
>
> On 27.04.21 15:08, Masahisa Kojima wrote:
> > This is preparation for PE/COFF measurement support.
> > PE/COFF image hash calculation is same in both
> > UEFI Secure Boot image verification and measurement in
> > measured boot. PE/COFF i
On Tue, Apr 27, 2021 at 10:45 AM Marek Vasut wrote:
>
> On 4/27/21 7:08 PM, Tim Harvey wrote:
> > There is no need to set and/or detect mode in of_to_plat and
> > accessing phy registers at that point before device power domain and
> > clock are enabled will cause hangs on platforms such as IMX8M
On Tue, Apr 27, 2021 at 12:52 PM Marek Vasut wrote:
>
> On 4/27/21 9:24 PM, Patrick Wildt wrote:
> > Am Tue, Apr 27, 2021 at 10:50:34AM -0700 schrieb Tim Harvey:
> >> On Tue, Apr 27, 2021 at 10:44 AM Marek Vasut wrote:
> >>>
> >>> On 4/27/21 7:08 PM, Tim Harvey wrote:
> Add support for deter
On 4/28/21 3:55 AM, Tim Harvey wrote:
On Tue, Apr 27, 2021 at 12:52 PM Marek Vasut wrote:
On 4/27/21 9:24 PM, Patrick Wildt wrote:
Am Tue, Apr 27, 2021 at 10:50:34AM -0700 schrieb Tim Harvey:
On Tue, Apr 27, 2021 at 10:44 AM Marek Vasut wrote:
On 4/27/21 7:08 PM, Tim Harvey wrote:
Add su
On 4/28/21 3:51 AM, Tim Harvey wrote:
On Tue, Apr 27, 2021 at 10:45 AM Marek Vasut wrote:
On 4/27/21 7:08 PM, Tim Harvey wrote:
There is no need to set and/or detect mode in of_to_plat and
accessing phy registers at that point before device power domain and
clock are enabled will cause hangs
Am 28. April 2021 03:06:15 MESZ schrieb Masahisa Kojima
:
>On Tue, 27 Apr 2021 at 22:52, Heinrich Schuchardt
>wrote:
>>
>> On 27.04.21 15:08, Masahisa Kojima wrote:
>> > This is preparation for PE/COFF measurement support.
>> > PE/COFF image hash calculation is same in both
>> > UEFI Secure Boot
On Wed, 28 Apr 2021 at 11:35, Heinrich Schuchardt wrote:
>
> Am 28. April 2021 03:06:15 MESZ schrieb Masahisa Kojima
> :
> >On Tue, 27 Apr 2021 at 22:52, Heinrich Schuchardt
> >wrote:
> >>
> >> On 27.04.21 15:08, Masahisa Kojima wrote:
> >> > This is preparation for PE/COFF measurement support.
> -Original Message-
> From: Sean Anderson
> Sent: Tuesday, April 27, 2021 10:50 PM
> To: Stefan Roese ; Li, Meng ; u-
> b...@lists.denx.de; chin.liang@intel.com; dinh.ngu...@intel.com;
> s...@chromium.org
> Subject: Re: [PATCH v2, 1/2] driver: watchdog: reset watchdog in
> designwar
> -Original Message-
> From: Stefan Roese
> Sent: Tuesday, April 27, 2021 10:23 PM
> To: Li, Meng ; u-boot@lists.denx.de;
> chin.liang@intel.com; dinh.ngu...@intel.com; s...@chromium.org
> Subject: Re: [PATCH v2, 1/2] driver: watchdog: reset watchdog in
> designware_wdt_stop() functi
On 28.04.21 04:15, Li, Meng wrote:
-Original Message-
From: Stefan Roese
Sent: Tuesday, April 27, 2021 10:23 PM
To: Li, Meng ; u-boot@lists.denx.de;
chin.liang@intel.com; dinh.ngu...@intel.com; s...@chromium.org
Subject: Re: [PATCH v2, 1/2] driver: watchdog: reset watchdog in
desi
On Sun, Apr 25, 2021 at 09:24:39AM +0200, Heinrich Schuchardt wrote:
> On 4/12/21 5:05 PM, Sughosh Ganu wrote:
> > Add config options EFI_PKEY_DTB_EMBED and EFI_PKEY_FILE which are to
> > be used for embedding the public key to be used for capsule
> > authentication into the platform's device tree.
On Wed, Apr 28, 2021 at 01:55:18PM +0900, AKASHI Takahiro wrote:
> On Sun, Apr 25, 2021 at 09:24:39AM +0200, Heinrich Schuchardt wrote:
> > On 4/12/21 5:05 PM, Sughosh Ganu wrote:
> > > Add config options EFI_PKEY_DTB_EMBED and EFI_PKEY_FILE which are to
> > > be used for embedding the public key t
On 28.04.21 04:12, Li, Meng wrote:
-Original Message-
From: Sean Anderson
Sent: Tuesday, April 27, 2021 10:50 PM
To: Stefan Roese ; Li, Meng ; u-
b...@lists.denx.de; chin.liang@intel.com; dinh.ngu...@intel.com;
s...@chromium.org
Subject: Re: [PATCH v2, 1/2] driver: watchdog: reset
On 27.04.21 21:57, Dagan Martinez wrote:
From 328c559acf6872bf0cbafe7fbb881748d5c753fb Mon Sep 17 00:00:00 2001
From: Property404
Date: Tue, 27 Apr 2021 15:48:31 -0400
Subject: [PATCH] Kirkwood: Fix tv sec/usec normalization in kwboot
`kwboot.c` had an issue where it failed to normalize the `t
Simon,
On Mon, Apr 12, 2021 at 08:35:25PM +0530, Sughosh Ganu wrote:
> Define a function which would be used in the scenario where the
> public key is stored on the platform's dtb. This dtb is concatenated
> with the u-boot binary during the build process. Platforms which have
> a different mechan
On Mon, Apr 12, 2021 at 08:35:26PM +0530, Sughosh Ganu wrote:
> Add provision for embedding the public key used for capsule
> authentication in the platform's dtb. This is done by invoking the
> mkeficapsule utility which puts the public key in the efi signature
> list(esl) format into the dtb.
>
On Thu, Apr 08, 2021 at 09:58:17PM +0200, Heinrich Schuchardt wrote:
> On 4/7/21 1:53 PM, Sughosh Ganu wrote:
> > Add provision for embedding the public key used for capsule
> > authentication in the platform's dtb. This is done by invoking the
> > mkeficapsule utility which puts the public key in
2021年4月28日(水) 14:44 AKASHI Takahiro :
>
> On Thu, Apr 08, 2021 at 09:58:17PM +0200, Heinrich Schuchardt wrote:
> > On 4/7/21 1:53 PM, Sughosh Ganu wrote:
> > > Add provision for embedding the public key used for capsule
> > > authentication in the platform's dtb. This is done by invoking the
> > >
On 4/27/2021 7:14 PM, Jagan Teki wrote:
> On Tue, Apr 27, 2021 at 7:54 AM wrote:
>>
>> From: Takahiro Kuwano
>>
>> The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
>>
>> The summary datasheets can be found in the following links.
>> https://www.cypress.com/file/424146/downloa
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