Add properties related to eMMC HS400 mode for esdhc1.
Signed-off-by: Yangbo Lu <yangbo...@nxp.com>
---
arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi | 6 ++++++
arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi | 6 ++++++
arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi | 6 ++++++
arch/arm/dts/fsl-lx2162a-qds.dts | 6 ++++++
4 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi
b/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi
index 60f5a4ee43..3b6fddba7c 100644
--- a/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi
+++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi
@@ -56,3 +56,9 @@
reg = <0x3>;
};
};
+
+&esdhc1 {
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+};
diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi
b/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi
index 8e11b0680a..0f4329f587 100644
--- a/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi
+++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi
@@ -59,3 +59,9 @@
reg = <0x1>;
};
};
+
+&esdhc1 {
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+};
diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi
b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi
index faf4285eab..8c856a19d4 100644
--- a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi
+++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi
@@ -24,3 +24,9 @@
reg = <0x0>;
};
};
+
+&esdhc1 {
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+};
diff --git a/arch/arm/dts/fsl-lx2162a-qds.dts b/arch/arm/dts/fsl-lx2162a-qds.dts
index 341610ccf4..68cb328716 100644
--- a/arch/arm/dts/fsl-lx2162a-qds.dts
+++ b/arch/arm/dts/fsl-lx2162a-qds.dts
@@ -135,3 +135,9 @@
reg = <2>;
};
};
+
+&esdhc1 {
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+};
--
2.25.1
