Hi Punit,
On Sat, Aug 29, 2020 at 8:30 AM Punit Agrawal wrote:
>
> Hi,
>
> I get the following errors when booting Linux from an ADATA XPG SX8200
> NVMe on a RockPro64.
>
> [3.705205] rockchip-pcie f800.pcie: unexpected IRQ, INT0
> [3.705226] rockchip-pcie f800.pcie: unexpected IR
Hello Simon,
with commit c7ae3dfdccc1 ("efi: Add support for a hello world test
program") you added section .dynamic and .dynsym to generated UEFI binaries.
It is unclear to me why those sections should be needed. According to
https://docs.oracle.com/cd/E23824_01/html/819-0690/chapter6-42444.html
Enable the fitImage update options on RCar Gen3 boards.
This permits easy update of multiple bootloader components.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/r8a77970_eagle_defconfig | 4
configs/r8a77990_ebisu_defconfig | 11 +++
configs/r8a77995_draak_defc
Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965
Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF
accessible, mainline ATF is mandatory and must be built with
RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for
development and testing convenience only and must be d
On Thu, Aug 27, 2020 at 5:20 PM Alex Kiernan wrote:
>
> On Thu, Aug 27, 2020 at 2:03 PM Tom Rini wrote:
> >
> > On Thu, Aug 27, 2020 at 11:49:25AM +0200, Marek Vasut wrote:
> > > On 8/27/20 11:43 AM, Alex Kiernan wrote:
> > > > This reverts commit 0f036bf4b87e6416f5c4d23865a62a62d9073c20.
> > > >
Hi Heinrich,
On Sat, 29 Aug 2020 at 02:31, Heinrich Schuchardt wrote:
>
> Hello Simon,
>
> with commit c7ae3dfdccc1 ("efi: Add support for a hello world test
> program") you added section .dynamic and .dynsym to generated UEFI binaries.
>
> It is unclear to me why those sections should be needed.
There are few places where the path of the current modules is calculated
but not used. Drop them.
Signed-off-by: Simon Glass
---
tools/binman/entry.py | 2 --
tools/buildman/test.py | 3 ---
tools/rmboard.py | 3 ---
3 files changed, 8 deletions(-)
diff --git a/tools/binman/entry.py b/t
At present we look for resources based on the path of the Python module
that wants them. Instead we should use Python's pkg_resources feature
which is designed for this purpose.
Update binman to use this.
Signed-off-by: Simon Glass
---
tools/binman/control.py | 6 --
1 file changed, 4 inse
On 8/29/20 4:14 PM, Alex Kiernan wrote:
> On Thu, Aug 27, 2020 at 5:20 PM Alex Kiernan wrote:
>>
>> On Thu, Aug 27, 2020 at 2:03 PM Tom Rini wrote:
>>>
>>> On Thu, Aug 27, 2020 at 11:49:25AM +0200, Marek Vasut wrote:
On 8/27/20 11:43 AM, Alex Kiernan wrote:
> This reverts commit 0f036bf4
Hi Alper,
On Tue, 25 Aug 2020 at 12:01, Alper Nebi Yasak wrote:
>
> Switch to str.startswith for matching like the FIT etype does since the
> current version doesn't ignore 'hash-1', 'hash-2', etc.
>
> Signed-off-by: Alper Nebi Yasak
> ---
>
> tools/binman/etype/section.py | 2 +-
> 1 file chan
On Tue, 25 Aug 2020 at 11:46, Rayagonda Kokatanur
wrote:
>
> Chimp is a core in Broadcom netxtream controller (bnxt).
> Add support to check bnxt's chimp component status.
>
> Signed-off-by: Rayagonda Kokatanur
> ---
> Changes from V1:
> -Address review comments from Simon,
> Add comment about
Hi Alper,
On Tue, 25 Aug 2020 at 12:01, Alper Nebi Yasak wrote:
>
> Other relevant properties (pad-after, offset, size, align, align-size,
> align-end) already work since Pack() sets correct ranges for subentries'
> data (.offset, .size variables), but some padding here is necessary to
> align th
Hi Dario,
On Tue, 25 Aug 2020 at 03:25, Dario Binacchi wrote:
>
> The __of_translate_address routine translates an address from the
> device tree into a CPU physical address. A note in the description of
> the routine explains that the crossing of any level with
there is something missing here.
Hi Bin,
On Fri, 17 Jul 2020 at 00:30, Bin Meng wrote:
>
> Hi Simon,
>
> On Fri, Jul 17, 2020 at 11:22 AM Simon Glass wrote:
> >
> > If there is MRC information we should run FSP-M with a different
> > boot_mode flag since it is supposed to do a 'fast path' through the
> > memory init. Fix this.
Hi Alper,
On Tue, 25 Aug 2020 at 12:01, Alper Nebi Yasak wrote:
>
> When reading subentries of each image, the FIT entry type directly
> concatenates their contents without padding them according to their
> offset, size, align, align-size, align-end, pad-before, pad-after
> properties.
>
> This p
Hi Bin,
On Sun, 12 Jul 2020 at 23:49, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jul 13, 2020 at 12:22 PM Bin Meng wrote:
> >
> > On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
> > >
> > > Add a function to write a SPI descriptor to the generated ACPI code.
> > >
> > > Signed-off-by: Simon Gl
Hi Wolfgang,
On Wed, 8 Jul 2020 at 05:06, Wolfgang Wallner
wrote:
>
> Hi Simon, Bin,
>
> -"Simon Glass" schrieb: -
> > Betreff: Re: [PATCH v1 25/43] x86: gpio: Add support for obtaining ACPI
> > info for a GPIO
> >
> > Hi Bin,
> >
> > On Tue, 30 Jun 2020 at 01:47, Bin Meng wrote:
> > >
Hi Dario,
+Stephen Warren
On Tue, 25 Aug 2020 at 03:24, Dario Binacchi wrote:
>
> It returns the rate which will be set if you ask clk_set_rate() to set
> that rate. It provides a way to query exactly what rate you'll get if
> you call clk_set_rate() with that same argument.
> So essentially, clk
On Tue, 25 Aug 2020 at 03:25, Dario Binacchi wrote:
>
> The patch adds a function to get display timings from the device tree
> node attached to the device.
>
> Signed-off-by: Dario Binacchi
> ---
>
> arch/sandbox/dts/test.dts | 46 ++
> drivers/core/read.c | 6 +++
>
On Tue, 25 Aug 2020 at 03:25, Dario Binacchi wrote:
>
> Replace 'dev->dev' with '@desc->dev' in the gpio_request_by_name function
> desc parameter description.
>
> Signed-off-by: Dario Binacchi
> ---
>
> include/asm-generic/gpio.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed
On Tue, 25 Aug 2020 at 03:25, Dario Binacchi wrote:
>
> Up till this commit passing NULL as input parameter was allowed, but not
> handled properly. When a NULL parameter was passed to the function a data
> abort was raised.
>
> Signed-off-by: Dario Binacchi
> ---
>
> arch/arm/mach-omap2/am33xx/
On Tue, 25 Aug 2020 at 03:24, Dario Binacchi wrote:
>
> Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h.
>
> Signed-off-by: Dario Binacchi
> ---
>
> arch/sandbox/include/asm/clk.h | 26 +-
> 1 file changed, 13 insertions(+), 13 deletions(-)
Reviewed-by: Simon Gl
On Tue, 25 Aug 2020 at 03:25, Dario Binacchi wrote:
>
> Complete the devp parameter description.
>
> Signed-off-by: Dario Binacchi
> ---
>
> include/dm/uclass.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Reviewed-by: Simon Glass
On Tue, 25 Aug 2020 at 03:25, Dario Binacchi wrote:
>
> For levels equal to the maximum value, the duty cycle must be equal to
> the period.
>
> Signed-off-by: Dario Binacchi
> ---
>
> drivers/video/pwm_backlight.c | 2 +-
> test/dm/panel.c | 12 ++--
> 2 files changed, 7
This function is not actually used in U-Boot. Drop it.
Suggested-by: Bin Meng
Signed-off-by: Simon Glass
---
arch/x86/include/asm/acpi_nhlt.h | 8
1 file changed, 8 deletions(-)
diff --git a/arch/x86/include/asm/acpi_nhlt.h b/arch/x86/include/asm/acpi_nhlt.h
index 47203213818..2c441
Fix this typo in the Kconfig help.
Signed-off-by: Simon Glass
Suggested-by: Wolfgang Wallner
---
drivers/pinctrl/intel/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig
index 1acc5dabb01..316a8fe27fd 100644
I found a few nits in my queue that were not addressed at the time. This
series fixes them.
Simon Glass (2):
x86: pinctrl: Fix 'relatove' typo
x86: Drop nhlt_serialise()
arch/x86/include/asm/acpi_nhlt.h | 8
drivers/pinctrl/intel/Kconfig| 2 +-
2 files changed, 1 insertion(+),
This header is missing a few of the newer features from the specification.
Add these as well as a link to the spec. Also use the BIT() macros where
appropriate.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/include/asm/bootparam.h | 25 +++
Use IS_ENABLED() instead of #ifdef in this file.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/zimage.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index a799
This command is currently monolithic and does not support scripts which
want to adjust the boot process. This series updates it to be more like
'bootm', in that it has sub-commands for each stage of the boot. This
allows some stages to be adjusted or skipped.
It also adds a way to dump out the set
To help reduce the size and complexity of load_zimage(), move the code
that reads the kernel version into a separate function. Update
get_boot_protocol() to allow printing the 'Magic signature' message only
once, under control of its callers.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Walln
At present U-Boot sets a loader type of 8 which means LILO version 8,
according to the spec. Update it to 0x80, which means U-Boot with no
particular version.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/zimage.c | 3 +--
1 file changed, 1 in
At present if an error occurs while setting up the boot, interrupts are
left disabled. Move this call later in the sequence to avoid this problem.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/zimage.c | 2 +-
1 file changed, 1 insertion(+), 1
At present the 'zboot' command does everything in one go. It would be
better if it supported sub-commands like bootm, so it is possible to
examine what will be booted before actually booting it.
In preparation for this, move the 'state' of the command into a struct.
This will allow it to be shared
Split out the code that actually boots linux into a separate sub-command.
Add base_ptr to the state to support this.
Show an error if the boot fails, since this should not happen.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/zimage.c | 26 ++
At present the setup block is always obtained from the image
automatically. In some cases it can be useful to use a setup block
obtained elsewhere, e.g. if the image has already been unpacked. Add an
argument to support this and update the logic to use it if provided.
Signed-off-by: Simon Glass
R
Add a subcommand that sets up the kernel ready for execution.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/zimage.c | 52 ++-
1 file changed, 42 insertions(+), 10 deletions(-)
diff --git a/arch/x86/lib
At present it is not possible to tell from a script where the setup block
is, or where the image was loaded to. Add environment variables for this.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
README| 4
arch/x86/lib/zimage.c | 3 +++
Add a little subcommand that prints out where the kernel was loaded and
its setup pointer. Run it by default in the normal boot.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/zimage.c | 17 ++---
1 file changed, 14 insertions(+), 3
Add subcommands to zboot. At present there is only one called 'start'
which does the whole boot. It is the default command so is optional.
Change the 's' string variable to const while we are here.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix comment about argv[0] in do_zboot_parent()
a
Recent versions of Chrome OS do not have a kernel in the root disk, to
save space.
With the improvements to the 'zboot' command it is fairly easy to load
the kernel from the raw partition. Add instructions on how to do this.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no chan
A few things have changed since this was written about 18 months ago.
Update the README.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
doc/README.chromium | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/doc/README.chromium b/do
When booting Chrome OS images the command line is stored separately
from the kernel. Add a way to specify this address so that images boot
correctly.
Also add comments to the zimage.h header.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/include/
There is a lot of information in the setup block and it is quite hard to
decode manually. Add a 'zboot dump' command to decode it into a
human-readable format.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/include/asm/e820.h | 1 +
arch/x86/lib/
On 8/29/20 5:20 PM, Simon Glass wrote:
> Hi Dario,
>
> +Stephen Warren
> On Tue, 25 Aug 2020 at 03:24, Dario Binacchi wrote:
>>
>> It returns the rate which will be set if you ask clk_set_rate() to set
>> that rate. It provides a way to query exactly what rate you'll get if
>> you call clk_set_
On 8/29/20 5:48 PM, Sean Anderson wrote:
>
> On 8/29/20 5:20 PM, Simon Glass wrote:
>> Hi Dario,
>>
>> +Stephen Warren
>> On Tue, 25 Aug 2020 at 03:24, Dario Binacchi wrote:
>>>
>>> It returns the rate which will be set if you ask clk_set_rate() to set
>>> that rate. It provides a way to query ex
Note: This is part D of this effort. With this, Coral includes all
required ACPI tables.
At present on x86 U-Boot supports creating ACPI (Advanced Configuration
and Power Interface) tables using the Intel ACPI Source Language (ASL)
compiler.
This is good enough for basic operation but some device
Note: This is part D of this effort. With this, Coral includes all
required ACPI tables.
At present on x86 U-Boot supports creating ACPI (Advanced Configuration
and Power Interface) tables using the Intel ACPI Source Language (ASL)
compiler.
This is good enough for basic operation but some device
This value is incorrect and causes problems booting Linux. Fix it.
Signed-off-by: Simon Glass
---
(no changes since v1)
board/google/chromebook_coral/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/google/chromebook_coral/Kconfig
b/board/google/chromebook_cor
Add ASL files for the Chrome OS EC, taken from coreboot.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/acpi/cros_ec/ac.asl | 22 +
arch/x86/include/asm/acpi/cros_ec/als.asl | 56 ++
arch/x86/include/asm/acpi/cros_ec/battery.asl | 411 +
arch/x
Add common x86 ASL files, taken from coreboot.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/acpi/chromeos.asl| 108 +
arch/x86/include/asm/acpi/cpu.asl | 25
arch/x86/include/asm/acpi/cros_gnvs.asl | 29 +
arch/x86/include/a
Add common DPTF (Intel Dynamic Performance and Thermal Framework) files,
taken from coreboot.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/acpi/dptf/charger.asl | 65 +++
arch/x86/include/asm/acpi/dptf/cpu.asl | 186
arch/x86/include/asm/acpi/dptf/dpt
At present U-Boot puts a magic number in the ASL for the GNVS table and
searches for it later.
Add a Kconfig option to use a different approach, where the ASL files
declare the table as an external symbol. U-Boot can then put it wherever
it likes, without any magic numbers or searching.
Signed-of
Add the definition of this structure common to Intel devices. It includes
some optional Chrome OS pieces which are used when vboot is integrated.
Drop the APL version as it is basically the same.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Use this file in APL
.../i
Add Apollo Lake ASL files, taken from coreboot.
Signed-off-by: Simon Glass
---
(no changes since v1)
.../include/asm/arch-apollolake/acpi/dptf.asl | 35
.../asm/arch-apollolake/acpi/globalnvs.asl| 41
.../include/asm/arch-apollolake/acpi/gpio.asl | 191 ++
.../a
Add a way to specify the required size for this region. This is used when
generating ACPI tables.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/Kconfig| 18 ++
arch/x86/cpu/apollolake/Kconfig | 1 +
2 files changed, 19 insertions(+)
diff --git
This device has a large set of ACPI tables. Bring these in from coreboot
so that full functionality is available (apart from SMI).
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add NHLT audio support
- Capitalise ACPI_OPS_PTR
- Use OEM_TABLE_ID instead of ACPI_TABLE_CREA
A 'Power Resource for Wake' list the resources a device depends on for
wake. Add a function to generate this.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/acpi/acpigen.h | 10 ++
lib/acpi/acpigen.c | 10 ++
test/dm/acpigen.c | 30 +++
Expand this to 4KB so that it is possible to add custom information to it.
On Chromebooks this is used to pass verified-boot information.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/acpi/global_nvs.h | 2 +-
arch/x86/include/asm/intel_gnvs.h | 1 +
2 files ch
Add functions to support generating ACPI code for condition checks and
return values.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/acpi/acpigen.h | 93 ++
lib/acpi/acpigen.c | 68 ++
test/dm/acpigen.c
Add a function to generate ACPI code for a _DSM method for a device.
This includes functions for starting and ending each part of the _DSM.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/acpi/acpi_device.h | 14 +
include/acpi/acpigen.h | 99
The extra ACPI code increases U-Boot above it current size limit. Move
the start earlier to provide space.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to allow more space for U-Boot on link
configs/chromebook_link_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
Many I2C devices produce roughly the same ACPI data with just things like
the GPIO/interrupt information being different.
This can be handled by a generic driver along with some information in the
device tree.
Add a generic i2c driver for this purpose.
Signed-off-by: Simon Glass
---
(no change
This function currently accepts the IRQ-polarity type. Fix it to use the
GPIO type instead.
Signed-off-by: Simon Glass
---
Changes in v2:
- add new patch to fix polarity type in acpi_dp_add_gpio()
drivers/sound/max98357a.c | 2 +-
include/acpi/acpi_dp.h| 2 +-
lib/acpi/acpi_dp.c| 4
Some devices can wake the system from sleep, e.g opening the lid on a
clamshell or moving a USB mouse.
Add a wake to specify this for USB devices and add the settings for Apollo
Lake.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/arch-apollolake/gpe.h | 135 ++
Intel WiFi chips can use a common routine to write the information needed
by linux. Add an implementation of this.
Enable it for coral.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Capitalise ACPI_OPS_PTR
- Use acpi,ddn instead of acpi,desc
arch/x86/Kconfig
Add functions to query CPU information, needed for ACPI.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add more comments and rename cpu_get_bus_clock to cpu_get_bus_clock_khz()
arch/x86/cpu/intel_common/cpu.c | 64 +++
arch/x86/include/asm
Add some more definitions to the iomap. These will be used by
ACPI-generation code as well as the device tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/arch-apollolake/iomap.h | 16
1 file changed, 16 insertions(+)
diff --git a/arch/x86/includ
Add SCI and power-state definitions required by ACPI tables. Fix the
license to match the original source file.
Als update the guard on acpi_pmc.h to avoid an error when buiding ASL.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Use SHIFT and MASK for defines
arch/x86
This table is needed by the Linux graphics driver to handle graphics
correctly. Write it to ACPI.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Capitalise ACPI_OPS_PTR
- Don't build for SPL
arch/x86/Kconfig | 8 +
arch/x86/cpu/apollolake/Kco
Add an implementation of the HPET (High Precision Event Timer) ACPI
table. Since this is x86-specific, put it in an x86-specific file
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Put this code in an x86-specific place and update commit message
arch/x86/include/asm/acp
This adds tables relating to P-States and C-States.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/acpi/acpigen.h | 162 +++
lib/acpi/acpigen.c | 167 +++
test/dm/acpigen.c | 294 +
3 files c
ACPI has a number of CPU-related tables. Add utility functions to write
out the basic packages.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/acpi/acpigen.h | 39 +++
lib/acpi/acpigen.c | 55 +
test/dm/acpigen.c | 106 ++
Add an implementation of the DBG2 (Debug Port Table 2) ACPI table.
Adjust one of the header includes to be in the correct order, before
adding more.
Note that the DBG2 table is generic but the PCI UART is x86-specific at
present since it assumes an ns16550 UART. It can be generalised later
if nece
These are needed for the CPU tables. Add them into an x86-specific file
since we do not support them on sandbox, or include tests.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Split PCT and PTC tables into a separate patch
arch/x86/include/asm/acpigen.h | 35 +
Add various tables that are common to Intel CPUs. These functions can be
used by arch-specific CPU code.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/intel_common/Makefile | 2 +
arch/x86/cpu/intel_common/acpi.c | 377 +
arch/x86/cpu/intel_c
Some Atom SoCs use SWSMISCI for SMI control. Add a Kconfig to select this.
It is used on Apollo Lake.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/Kconfig| 6 ++
arch/x86/cpu/apollolake/Kconfig | 1 +
2 files changed, 7 insertions(+)
diff --git a/arch/x86/
Add a few functions to permit reading of various useful base addresses
provided by the hostbridge.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add comments
arch/x86/cpu/apollolake/hostbridge.c | 27
.../include/asm/arch-apollolake/systemagen
Apollo Lake needs to generate a few more table types used on Intel SoCs.
Add support for these into the x86 ACPI code.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Move this code into an x86-specific file
- Update commit message
- Use OEM_TABLE_ID instead of ACPI_TABLE_
Allow this header to be included in ASL files by adding a header guard and
a few definitions that are needed.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/p2sb.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/p2sb.h b/include/p2sb.h
index 93e1155dca6..a2517
Add support for generating various ACPI tables for Apollo Lake. Add a few
S3 definitions that are needed.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Drop unnecessary callbacks
arch/x86/cpu/apollolake/Makefile| 1 +
arch/x86/cpu/apollolake/acpi.c
U-Boot does not support SMM (System Management Mode) at present, but needs
a few definitions to correctly set up the ACPI table. Add these.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/smm.h | 27 +++
1 file changed, 27 insertions(+)
create
Support generating a DMAR table and add a few helper routines as well.
Also set up NHLT so that audio works.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add support for NHLT table
- Capitalise ACPI_OPS_PTR
- Move the acpi.h header file to this commit
- Update commit me
Generate ACPI information for this device so that Linux can use it
correctly.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Capitalise ACPI_OPS_PTR
- Update for acpi_device_write_i2c_dev() return-value change
- Use acpi,ddn instead of acpi,desc
drivers/tpm/cr50_i2c.c |
Add an ACPI table for the LPC on Apollo Lake.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Capitalise ACPI_OPS_PTR
arch/x86/cpu/apollolake/lpc.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollo
This new method is intended to be called when UEFI shuts down the 'boot
services', i.e. any lingering code in the boot loader that might be used
by the OS.
Add a definition for this new method and update the comments a little.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/incl
Add ACPI generation to the APL CPU driver.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Capitalise ACPI_OPS_PTR
- Handle table generation without callbacks
arch/x86/cpu/apollolake/cpu.c | 77 ++
arch/x86/lib/Makefile | 3
We don't have CONFIG_PCI in TPL but it is present in SPL, etc. So this
code is not needed. Drop it, and fix a code-style nit just above.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/apollolake/pmc.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git
At present if hyperthreading is disabled the CPU numbering is not
sequential. Fix this.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/lib/acpi_table.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_tabl
This file cannot currently be included in ASL files. Add a header guard
to permit this.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/acpi_table.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_
Send this notification when U-Boot is about to boot into Linux, as
requested by the FSP.
Currently this causes a crash with the APL FSP, so leave it disabled for
now.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/cpu.c| 15 +++
arch/x86/lib/fsp/fsp_
At present the MTRR registers are programmed with the list the U-Boot
builds up in the same order. In some cases this list may be out of order.
It looks better in Linux to have the registers in order, so sort them,
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/mtrr.c | 12 +
This provides information about a v2 TPM in the system. Generate this
table if the TPM is present.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/lib/acpi_table.c | 74 +++
include/acpi/acpi_table.h | 11 ++
include/bloblist.h| 1
This is currently in the wrong place, so including the file in the device
tree fails. Fix it.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Update commit message with a comma
arch/x86/include/asm/e820.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --gi
Add support for this new field in the common code used by most x86 CPU
drivers.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/i386/cpu.c | 23 +++
arch/x86/cpu/intel_common/cpu.c | 1 +
arch/x86/cpu/x86_64/cpu.c | 5 +
arch/x86/includ
Add files describing the various audio configurations supported on coral.
These are passed to Linux in the ACPI tables.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add new patch with coral audio descriptor files
.../chromebook_coral/dialog-2ch-48khz-24b.dat| Bin
This provides information about a v1 TPM in the system. Generate this
table if the TPM is present.
Add a required new bloblist type and correct the header order of one
header file.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/lib/acpi_table.c | 54
This file doesn't currently have a log category. Add one so that items
are logged correctly.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/lib/acpi_table.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index a3db94b8
If U-Boot is not running FSP-S it should not do the pre-init either. Add a
condition to handle this.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/apollolake/fsp_s.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollol
If locating the FSP header hangs for whatever reason it is useful to see
where it got stuck. Add a debug print. Also show the address of the FSP-S
entry point as a sanity check.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/lib/fsp2/fsp_silicon_init.c | 4 +++-
1 file changed,
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