Hi
On 24/09/19 9:45 PM, Eugeniy Paltsev wrote:
> Hi Vignesh,
> sorry for delay, I was pretty busy with another project :(
>
> I've tried to test SPI with CONFIG_SPI_FLASH_SFDP_SUPPORT enabled, however it
> doesn't seem to work.
>
> CONFIG_SPI_FLASH_SFDP_SUPPORT enabled:
> --
On 24/09/19 10:53 PM, Eugeniy Paltsev wrote:
> Hi Vignesh,
>
> I've check this patches on top of 31e086e460f.
> The read/write/erase seems to work.
>
> However, as I can see 'sf protect lock' doesn't work - it finish successfully
> but the area remains unlocked.
Did you verify that area is i
Add secure boot script, use ahab to verify image
Signed-off-by: Peng Fan
---
include/configs/imx8qxp_mek.h | 64 +--
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index d950d06
Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.
Also add image authentication call when loading container im
Add secure boot script, use ahab to verify image
Signed-off-by: Peng Fan
---
include/configs/imx8qm_mek.h | 64 +---
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 6f615a722
Simon,
On 24/09/19 5:54 PM, tudor.amba...@microchip.com wrote:
> Hi, Simon,
>
> On 09/24/2019 02:47 PM, Simon Goldschmidt wrote:
>> External E-Mail
>>
>>
>> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote:
>>>
>>> Newer variants of n25q256* and n25q512* flashes support 4 Byte
>>> addre
Hi Vignesh,
On Wed, Sep 25, 2019 at 10:20 AM Vignesh Raghavendra wrote:
>
> Simon,
>
> On 24/09/19 5:54 PM, tudor.amba...@microchip.com wrote:
> > Hi, Simon,
> >
> > On 09/24/2019 02:47 PM, Simon Goldschmidt wrote:
> >> External E-Mail
> >>
> >>
> >> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghav
AM65x uses TISCI protocol to reset the device and does not
support PSCI reset. So disable PSCI reset.
Signed-off-by: Lokesh Vutla
---
configs/am65x_evm_a53_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index e5b127
On 25/09/19 1:57 PM, Simon Goldschmidt wrote:
> Hi Vignesh,
>
> On Wed, Sep 25, 2019 at 10:20 AM Vignesh Raghavendra wrote:
>>
>> Simon,
>>
>> On 24/09/19 5:54 PM, tudor.amba...@microchip.com wrote:
>>> Hi, Simon,
>>>
>>> On 09/24/2019 02:47 PM, Simon Goldschmidt wrote:
External E-Mail
>>>
J721E uses TISCI protocol to reset the device and does not
support PSCI reset. So disable PSCI reset.
Signed-off-by: Lokesh Vutla
---
configs/j721e_evm_a72_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 5cb933
CONFIG_SYS_BOOT_RAMDISK_HIGH is already defined in
arch/arm/include/asm/config.h:10:#define CONFIG_SYS_BOOT_RAMDISK_HIGH
that's why there is no reason to define it again in board file.
Signed-off-by: Michal Simek
---
include/configs/apalis-tk1.h | 2 --
1 file changed, 2 deletions(-)
diff --gi
: [v2,2/2] armv7: ls102xa: not power down OCRAM1
> >
> >The patch always not power down OCRAM1
> >for wakeup source to wakeup system in
> >deep sleep
> Please provide a better description.
Okay, got it, I will provide it in v3.
>
> --priyankajain
> >
> >Signed-off-by: Biwen Li
> >---
> >Change in
> >
> >The patch adds errata ID A-008646 for workaround
> >
> Only comment is updated in this patch.
> Update subject and description to reflect this.
> >Signed-off-by: Biwen Li
> >---
> >Change in v2:
> > - split one patch to two patches
> >
> > arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2
> >Subject: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8
> Fix endianness means fixing endianness but here you are correcting it May be
> subject can be updated to something like
> "armv7: ls102xa: Update endianness of SCFG_SPARECR8 read"
> >
> >The patch fixes endianness of SCFG_SPAREC
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.
Reviewed-by: Stefan Roese
Si
This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.
Signed-off-by: Weijie Gao
---
drivers/serial/serial_mtk.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index bce1be8227
This patch adds clkctrl node for mt7628 and adds clocks property for
some node.
Signed-off-by: Weijie Gao
---
v2: Changed clkgate node to clkctrl node.
Replaced clock-frequency with <&clkctrl CLK_UARTx> for uarts and spi.
---
arch/mips/dts/mt7628a.dtsi | 21 +
1 file chan
This patch series have the following changes:
- Add pinctrl(both pinmux and pinconf) driver, reset controller driver and
clock driver for mt7628.
- Add mt7628 platform to mtk-sd driver.
- Modify mt7628's ethernet & usb phy driver to take advantages from the new
drivers.
- Update mt7621-spi d
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 1 -
arch/mips/dts/linkit-smart-7688.dts
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.
Signed-off-by: Weijie Gao
---
v2: newly added
---
drivers/spi/mt7621_spi.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
di
This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.
Signed-off-by: Weijie Gao
---
v2: Changed to a more generic clock driver rather than a gateing only driver.
Now supports output
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR a
This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.
Signed-off-by: Weijie Gao
---
drivers/serial/serial.c | 2 +
drivers/serial/serial_mtk.c | 202 ++
This patch adds default pinctrl for uart nodes
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 8afea1865d..44fbbd5b25 100644
--- a/arch/mips/dts/mt7628a.dtsi
+++ b/
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
v3: Add const qualifier for variables with type struct mtmips_pmx_func.
---
drivers/pinctrl/Kconfig
This patch updates reset controller node for mt7628
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 44fbbd5b25..b0e0ed
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/net/mt7628-eth.c b/d
This patch adds pinctrl node with default pin state for mt7628an.dtsi.
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 150 +
1 file changed, 150 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 6d2142f429..8
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.
This patch adds a call to mt7628_eth_fre
Hi,
On 19/09/2019 13:51, Pi NewBie wrote:
> With top of the tree(tot) uboot, and tot firmware, uboot command bdinfo
> shows the dram bank size as 0x3b40 which is <1G, but the
> rpi4 board has 4G of ram.
>
> However with kernel8.img in the firmware, linux kernel shows in /proc/meminfo
Hi Simon,
On 05/09/2019 10:48, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> The libftd implementation of U-Boot is outdated with the
> upstream project. Especially the default number of size-cells
> was wrong. This series fixes this by backporting the corresponding
> patches from
This sata is a None AHCI sata device. It belongs to PCI sata. To support
DM mode with SCSI interface we use the SCSI_NONE_AHCI.
This patch is an example(pci sata) to fit "support SCSI interface for None AHCI
sata"
Signed-off-by: Peng Ma
---
drivers/ata/sata_sil.c | 515
This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.
Signed-off-by: Weijie Gao
---
drivers/reset/Kconfig| 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-mtmips.c | 82
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 45 +++-
This patch changes baudrate table for all boards preparing for using mtk
highspeed uart driver.
Signed-off-by: Weijie Gao
---
v2: Removed configs in defconfig files.
---
include/configs/gardena-smart-gateway-mt7688.h | 2 +-
include/configs/linkit-smart-7688.h| 2 +-
2 files changed,
This patch adds default eth pinctrl for all boards.
There are two pinctrl nodes used for two scenarios:
ephy_iot_mode- for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao
---
arch/m
This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.
Signed-off-by: Weijie Gao
---
v3: Simplify logic of card-detection.
---
drivers/mmc/mtk-sd.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/d
This sata is a None AHCI sata device. To support DM mode with SCSI interface
we use the SCSI_NONE_AHCI.
This patch is an example(normal sata) to fit "support SCSI interface for None
AHCI sata"
Signed-off-by: Peng Ma
---
drivers/ata/fsl_sata.c | 300 +
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets the mt7621_spi_set_cs() restore the origi
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.
This patch rewrites it and makes it optional. It can be turned on by adding
mediatek,poll-link-phy = explici
This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.
Signed-off-by: Weijie Gao
---
v3: depends on SOC_MT7628.
---
drivers/phy/Kconfig | 1 +
drivers/phy/mt76x
This adds default pinctrl (dual SPI chip select) for gardena smart gateway
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/dts/gardena-smart-gateway-mt7688.dts
b/arch/mips/dt
This patch adds default p0led status and phy0 link polling for all boards.
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao
---
v2: Add phy link detection for all boards.
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 13 +
arch/mips/dts/linkit-smart-7688.dts| 1
This patch adds mmc related nodes for mt7628an.dtsi
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 5fd83c1623..76a80c8952 100644
--- a/arch/mips/dts
In driver/ata. If the sata driver support AHCI mode, there will provides
a complete set of SCSI interface. If the sata is not support AHCI
mode(NONE_AHCI) there will not provides the SCSI interface.
This patch is to support SCSI interface for None AHCI sata such as fsl_sata.c
sil_sata.c etc.
Sign
This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.
Signed-off-by: Weijie Gao
---
v2: Removed unnecessary braces in Kconfig
---
drivers/mmc/Kconfig | 2 +-
drivers/mmc/mtk-sd.c | 23 ---
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/Kc
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.
Signed-off-by: Weijie Gao
---
v2: newly added
---
arch/mips/Kconfig | 6 ++
arch/mips/mach-mtmips/Kconfig | 2 ++
2 files changed, 8 insertions(+)
diff --git a/arch/mip
Some configs are selected in Kconfig and is no longer needed in the
defconfig files. Some configs (power domain, ram) are never used.
Signed-off-by: Weijie Gao
---
v2: newly added
---
configs/gardena-smart-gateway-mt7688-ram_defconfig | 7 ---
configs/gardena-smart-gateway-mt7688_defconfig
The patch corrects endianness of register SCFG_SPARECR8 read
in_le32 -> in_be32
Signed-off-by: Biwen Li
---
Change in v2:
- update subject and description
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls1
All boards are using the same prompt that's why add it as default value to
Kconfig to simplify defconfigs.
Signed-off-by: Michal Simek
---
cmd/Kconfig| 1 +
configs/syzygy_hub_defconfig | 1 -
configs/zynq_cc108_defconfig | 1 -
configs/zynq_cse_n
All boards are using the same prompt that's why add it as default value to
Kconfig to simplify defconfigs.
Signed-off-by: Michal Simek
---
cmd/Kconfig| 1 +
configs/avnet_ultra96_rev1_defconfig | 1 -
configs/avnet_ul
The patch adds an errata ID A-008646 for workaround
to provide more information by ID.
Signed-off-by: Biwen Li
---
Change in v3:
- adjust code style
Change in v2:
- update subject and description
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 7 ---
1 file changed, 4 insertion
Don't power down OCRAM1 for wakeup source
to wakeup system in deep sleep
Signed-off-by: Biwen Li
---
Change in v3:
- update subject and description
Change in v2:
- split one patch to two patches
- always not power down OCRAM1
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c |
Hi Michal,
On 25/09/19 12:38, Michal Simek wrote:
> All boards are using the same prompt that's why add it as default value to
> Kconfig to simplify defconfigs.
>
> Signed-off-by: Michal Simek
> ---
>
> cmd/Kconfig| 1 +
> configs/avnet_ultra
On 25. 09. 19 13:03, Luca Ceresoli wrote:
> Hi Michal,
>
> On 25/09/19 12:38, Michal Simek wrote:
>> All boards are using the same prompt that's why add it as default value to
>> Kconfig to simplify defconfigs.
>>
>> Signed-off-by: Michal Simek
>> ---
>>
>> cmd/Kconfig
On Tue, Sep 24, 2019 at 2:08 PM Simon Goldschmidt
wrote:
>
> Hi Vignesh,
>
> On Tue, Sep 24, 2019 at 1:54 PM Vignesh Raghavendra wrote:
> >
> > Simon,
> >
> > On 24-Sep-19 5:15 PM, Simon Goldschmidt wrote:
> > > Hi Tudor,
> > >
> > > On Tue, Sep 24, 2019 at 1:36 PM wrote:
> > >>
> > [...]
> >
>
Am 25.09.19 um 11:45 schrieb Weijie Gao:
> This patch series have the following changes:
>
> - Add pinctrl(both pinmux and pinconf) driver, reset controller driver and
>clock driver for mt7628.
> - Add mt7628 platform to mtk-sd driver.
> - Modify mt7628's ethernet & usb phy driver to take ad
Hi,
On 25/09/19 4:37 PM, Simon Goldschmidt wrote:
> On Tue, Sep 24, 2019 at 2:08 PM Simon Goldschmidt
> wrote:
>>
[...]
>>>
>>> But, do you have access to n25q variants? And does that support 4 Byte
>>> addressing opcode? What does its JEDEC ID read?
>>
>> No, at the moment I don't. I'll see if I
Hi,
Microblaze is not changing a lot but there was a real pain for not
supporting external initrd. That's why several patches in the series are
fixing this issue. The rest of patches are just cleanup which I found
when I was trying to fix it.
Thanks,
Michal
Michal Simek (10):
microblaze: Remo
This variable is completely unused that's why remove it.
Signed-off-by: Michal Simek
---
board/xilinx/microblaze-generic/microblaze-generic.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c
b/board/xilinx/microblaze-generic/microblaze-g
It is common for the whole architecture that's why move it there.
Signed-off-by: Michal Simek
---
arch/microblaze/include/asm/config.h | 2 ++
include/configs/microblaze-generic.h | 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/microblaze/include/asm/config.h
b/arc
Microblaze as Arm is using multiple memory banks which are read from DT
that's why there is a need to initialized LMB based on bd->bi_dram[].
Without this fix memory base/size is all the time 0 and image relocation is
not possible.
Signed-off-by: Michal Simek
---
common/image.c | 5 +++--
1 fil
There is no reason to use private code for standard bootm command.
Current implementation is also broken and don't support image relocation
properly. Switching to generic bootm implementation is fixing these issues.
cmdline and bdt bootm subcommands are returning -1 because they are not
implemente
arch_lmb_reserve() protects U-Boot relocated code with stack not to be used
for image relocation.
Signed-off-by: Michal Simek
---
arch/microblaze/lib/bootm.c | 41 +
1 file changed, 41 insertions(+)
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/
The whole cache code needs to be redesign to read information about cache
from DT instead of macro selection. Enable caches by default because
systems have caches on by default for Linux.
Also enable CMD_CACHE to be able to disable cache if there is any issue.
Signed-off-by: Michal Simek
---
c
We are far from 8MB default size. Setup 64MB for now.
Signed-off-by: Michal Simek
---
include/configs/microblaze-generic.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/microblaze-generic.h
b/include/configs/microblaze-generic.h
index ce18ee73c2bc..f1d0def3c163 100644
-
There were several changes in past in this file without removing headers
(watchdog cleanup, soft reset, etc). That's why remove additional useless
headers.
Signed-off-by: Michal Simek
---
board/xilinx/microblaze-generic/microblaze-generic.c | 7 ---
1 file changed, 7 deletions(-)
diff --gi
In case that mac address is not found it is generated randomly.
Signed-off-by: Michal Simek
---
configs/microblaze-generic_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/microblaze-generic_defconfig
b/configs/microblaze-generic_defconfig
index 5eaf18f5f951..a0a710e1165c
Setup initrd_high and fdt_high to be placed in lowmem space for kernel to
be able to reach it. Values are setup at run time to ensure that the same
setting can be used on different memory setup. Do this setting only when
variables are not
Similar run time detection was done for Zynqmp and Versal.
Hi,
On 29/07/19 12:28 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Enable CONFIG_SPL_DM and enable the driver model for serial by defining
> an appropriate device in the board file for da850-lcdk.
>
This breaks booting from MMC on omapl138_lcdk. You didn't add a
U_BOOT_DEVICE
On 2019-09-24 9:33 p.m., Sergio de Almeida Lenzi wrote:
note that NetBSD only uses ONE boot file...
Ah, I'm not familiar with the U-Boot package in NetBSD; I've been
working from the main U-Boot repository. So I'm don't know how pkgsrc
builds that image or what it contains.
So the binary-on
At present the x86 FSP (Firmware Support Package) code assumes that FSP
version 1 is used. Since this code was added to U-Boot a new version
(FSP2) has been produced by Intel.
In preparation for adding support for FSP2, move the existing code into
a directory that indicates it is used for FSP1.
C
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is ge
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass
---
Changes in v3:
- Drop struct efi_guid and add a comment about forward declarations
Changes in v2:
- Rewrite to make azalia a common file for FSP1 and FSP2
arch/x86/include/as
At present fsp_support.h includes fsp_vpd.h which is an FPSv1 concept
(VPD means Vital Product Data). For FSPv2 only UPD (Updatable Product
Data) is used.
To avoid mangling header files, put these two includes in a separate
header which we can adjust as necessary for FSPv2.
Signed-off-by: Simon G
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/fsp1/fsp_support.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch
This header file is different for each version of FSP. Move it into the
fsp_arch.h header file.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/fsp1/fsp_support.h | 1 -
arch/x86/include/asm/fsp_arch.h | 1 +
2 files ch
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/{fsp1 => fsp}/fsp_fv.h | 0
arch/x86/include/asm/fsp1/fsp_support.h | 2 +-
2 files cha
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/{fsp1 => fsp}/fsp_types.h | 0
arch/x86/include/asm/fsp1/fsp_support.h| 2 +-
2 fil
This header file is the same for FSP v1 and v2, although there may be
some additions to come. Move it into the generic fsp directory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/{fsp1 => fsp}/fsp_bootmode.h | 0
arch/x86/in
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/{fsp1 => fsp}/fsp_hob.h| 0
arch/x86/include/asm/{fsp1 => fsp}/fsp_infoheader.h | 0
This include file is only used for FSP v1. Avoid including it from
fdt_support.h so we can use the latter with FSP v2.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v3: None
Changes in v2: None
arch/x86/include/asm/fsp_arch.h | 1 +
1 file changed, 1 insertion(+)
diff --git
At present these options can be enabled when bloblist is not enabled for
SPL or TPL. This is incorrect as SPL handoff requires bloblist. Fix it.
Signed-off-by: Simon Glass
---
Changes in v2: None
common/spl/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/
The comments in the FSP code use a different style from the rest of the
x86 code. I am not sure it this is intentional.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/fsp/fsp_support.h | 42 -
arch/x86/include/asm/fsp1/fsp_support.h | 30 ++
Support a new BINMAN_VERBOSE option to the build, to allow passing the
-v flag to binman.
Signed-off-by: Simon Glass
---
Changes in v2: None
Makefile| 3 ++-
tools/binman/README | 6 ++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index c5ca
At present the name of the image comes first in the linker-list symbol
used. This means that the name of the function sets the sort order, which
is not the intention.
Update it to put the board device type first, then the priority. This
produces the expected behaviour.
Signed-off-by: Simon Glass
At present the bloblist is set up in spl_common_init() which can be called
from spl_early_init(), i.e. before SDRAM is ready. This prevents the
bloblist from being located in SDRAM, which is useful on some platforms
where SRAM is inaccessible after U-Boot relocates (e.g. x86 CAR region).
It doesn'
Many support functions are common between FSP1 and FSP2. Add a new header
to handle this.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/fsp/fsp_support.h | 128
arch/x86/include/asm/fsp1/fsp_support.h | 123 +--
drivers/pc
At present SPI-flash testing relies on a sandbox driver which emulates the
SPI bus and implements a flash chip behind that emulated bus.
This provides good coverage but can only implement features supported by
the SPI bus.
Add a new 'direct' SPI flash which is implemented directly by sandbox.
Thi
Update a few #ifdefs to if() to improve build coverage.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/fsp1/fsp_common.c | 9 -
arch/x86/lib/fsp1/fsp_dram.c | 8 ++--
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/arch/x86/lib/fsp1/fsp_common.c b
At present there is an arch-specific area in the SPL handoff area intended
for use by arch-specific code, but there is no explicit call to fill in
this data. Add a hook for this.
Also use the hook to remove the sandbox-specific test code from
write_spl_handoff().
Signed-off-by: Simon Glass
---
Most of the DRAM functionality can be shared between FSP1 and FSP2. Move
it into a shared file.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/fsp/fsp_support.h | 9 +++
arch/x86/lib/Makefile | 1 +
arch/x86/lib/fsp/Makefile | 5 ++
arc
Add cpu_intel_get_info() to find out the CPU info on modern Intel CPUs.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/broadwell/cpu_full.c| 9 +
arch/x86/cpu/intel_common/cpu.c | 13 +
arch/x86/cpu/ivybridge/model_206ax.c | 8 ++--
arch/x86/
Some of this file can be shared between FSP1 and FSP2. Move it into a
shared file.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/fsp/fsp_support.h | 17
arch/x86/include/asm/fsp1/fsp_support.h | 10 ---
arch/x86/lib/fsp/Makefile | 1 +
arch/x86
When TPL is running, broadwell needs to do different init from SPL. There
is no need for this code to be in the generic x86 SPL file, so move it to
arch_cpu_init().
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/broadwell/cpu.c | 5 +
arch/x86/cpu/broadwell/cpu_full.c
On x86 platforms the SPI flash can be mapped into memory so that the
contents can be read with normal memory accesses.
Add a new SPI flash method to find the location of the SPI flash in
memory. This differs from the existing device-tree "memory-map" mechanism
in that the location can be discovere
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.
Add a new Kconfig option to permit this. Default it to 'y' so that
existin
At present these two functions are defined in efi_loader.h but only if
CONFIG_EFI_LOADER is enabled. But these are functions that are useful to
other code, such as that which deals with Intel Handoff Blocks (HOBs).
Move these to the top of the function.
Possibly ascii2unicode() should not be an i
At present this driver uses the wrong condition for including the code and
drivers in SPL/TPL. Update it so that the code is only included if
DM_SERIAL is enabled for SPL/TPL.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/serial/ns16550.c | 6 +++---
1 file changed, 3 insertions(+
With FSP2 the non-volatile storage used by the FSP to init memory can be
split into a fixed piece (determined at compile time) and a variable piece
(determined at run time). Add support for reading the latter.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/fsp/fsp_hob.
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