Hi Michal,
On Fri, Jul 20, 2018 at 6:57 AM Michal Simek wrote:
> On 9.7.2018 07:00, Luis Araneda wrote:
> > [...]
> > --- a/arch/arm/dts/zynq-syzygy-hub.dts
> > +++ b/arch/arm/dts/zynq-syzygy-hub.dts
> > @@ -15,6 +15,7 @@
> > aliases {
> > ethernet0 = &gem0;
> >
Hi Michal,
On Fri, Jul 20, 2018 at 3:09 AM Michal Simek wrote:
> On 13.7.2018 17:44, Luis Araneda wrote:
> > [...]
> > +CONFIG_DM_I2C=y
> > +CONFIG_SYS_I2C_CADENCE=y
> > +CONFIG_MMC_SDHCI=y
> > +CONFIG_MMC_SDHCI_ZYNQ=y
> > +CONFIG_SPI_FLASH=y
> > +CONFIG_SPI_FLASH_BAR=y
> > +CONFIG_SPI_FLASH_SPAN
Hi!
I just wanted to let you know that I recently upgraded to U-Boot
2018.07 from Debian Experimental [0] and everything works now! Thanks
to everybody involved [1]!
Best regards
Alexander Kurtz
[0] https://tracker.debian.org/pkg/u-boot
[1] https://github.com/u-boot/u-boot/commits/v2018.07/incl
This patchset trys to add support for Allwinner H6 SoC to U-Boot.
Allwinner H6 is a quite new Allwinner SoC, with several parts changed a
lot (memory map, DRAM controller, CCU, so on). The position which SPL
will be loaded (SRAM A1) also changed to 0x2.
The Pine H64 board support comes with t
The Allwinner H6 SoC come with a totally new memory map.
Add basical definition of the new memory map into a header file, and let
the cpu.h header include it in the situation of H6.
Signed-off-by: Icenowy Zheng
Reviewed-by: Andre Przywara
---
Changes in v2:
- Change SRAM A1 address to CONFIG_SU
The new Allwinner H6 SoC has its SRAM A1 at neither 0x0 nor 0x1, but
it's at 0x2. Thus the SUNXI_HIGH_SRAM option needs to be refactored
to support this new configuration.
Change it to SUNXI_SRAM_ADDRESS, which holds the real address of SRAM
A1 in the memory map.
Signed-off-by: Icenowy Zh
H6 has different SRAM A2 address, so the ATF load address is also
different.
Add judgment code to sunxi 64-bit FIT generation script. It will judge
the SoC by the device tree's name.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Use CONFIG_MACH_SUN50I_H6 rather than DT prefix to judge H6.
Allwinner H6 has a different RVBAR address with A64/H5.
Add conditional RVBAR configuration into the code which does RMR switch.
Signed-off-by: Icenowy Zheng
Reviewed-by: Andre Przywara
---
Changes in v2:
- Added Andre's Reviewed-by tag.
arch/arm/include/asm/arch-sunxi/boot0.h | 4
arch/
The new Allwinner H6 SoC has a brand new CCU layout.
Add clock code for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Move the /4 divider in clk_get_pll6() to prevent possible overflow.
arch/arm/include/asm/arch-sunxi/clock.h | 2 +
.../include/asm/arch-sunxi/clock_sun50i_h6.h
On the new Allwinner H6 SoC, the SRAM A2 address (SPL load address) is
at 0x2, which is different with any old Allwinner SoCs.
Add SPL position and size configuration for this.
Signed-off-by: Icenowy Zheng
Reviewed-by: Andre Przywara
---
Changes in v2:
- Added Andre's Reviewed-by tag.
inc
As the Allwinner H6 chip has a new memory map, its GIC MMIO address is
thus different.
Change the address on H6.
Signed-off-by: Icenowy Zheng
Reviewed-by: Andre Przywara
---
Changes in v2:
- Added Andre's Reviewed-by tag.
include/configs/sun50i.h | 5 +
1 file changed, 5 insertions(+)
di
The H6 SoC has a sun6i-style watchdog in its timer part.
Enable the usage of it.
Signed-off-by: Icenowy Zheng
---
arch/arm/include/asm/arch-sunxi/timer.h | 2 +-
arch/arm/mach-sunxi/board.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/a
The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with
the MMC2 come with the capability to do crypto by EMCE.
Add MMC support for H6. EMCE support is not added yet.
Signed-off-by: Icenowy Zheng
---
arch/arm/include/asm/arch-sunxi/mmc.h | 2 +-
board/sunxi/board.c
The UART0 on H6 is available at PH bank (and PF bank, but the PF one is
muxed with SD card).
Add pinmux configuration.
Signed-off-by: Icenowy Zheng
Reviewed-by: Andre Przywara
---
Changes in v2:
- Added Andre's Reviewed-by tag.
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi
Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features
1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port
and a mPCIE slot.
Add support for it.
The device tree is from Linux next-20180720.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Sync device tree to
Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe
interfaces.
This patch adds support for it.
The corresponding DTSI file, from Linux next-20180720, is also
introduced.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Sync device tree to next-20180720.
arch/arm/dts/sun50i-h6.dt
The Allwinner H6 SoC comes with a set of new DRAM controller+PHY combo.
Both the controller and the PHY seem to be originate from DesignWare,
and are similar to the ones in ZynqMP SoCs.
This commit introduces an initial DRAM driver for H6, which contains
only LPDDR3 support. The currently known SB
On Sat, Jul 21, 2018 at 02:00:05AM +0200, Dr. Philipp Tomsich wrote:
> Tom,
>
> The first batch of changes for u-boot-rockchip/master in this iteration is
> ready for you to pull.
> The associated Travis report (prior to the rebase) is at
> https://travis-ci.org/ptomsich/u-boot-rockchip/bu
Ezequiel,
This series breaks the build (see
https://travis-ci.org/ptomsich/u-boot-rockchip/builds/406351695).
Did you test with Travis prior to submitting?
When you revise, I’d also prefer a ‘rockchip:’ and a ‘board:’ tag over the ARM
tag …
Thanks,
Philipp.
> On 20 Jul 2018, at 19:30, Philip
Symbol CONFIG_SPL_RELOC_STACK_SIZE is not used anywhere. So remove it.
Signed-off-by: Heinrich Schuchardt
---
successfully build on Travis CI
https://travis-ci.org/xypron2/u-boot/builds/406556618
---
include/configs/B4860QDS.h | 1 -
include/configs/C29XPCIE.h | 1 -
incl
The driver sets the weekday incorrectly when called by the
'date set' command.
Sunday is 1, Saturday is 7 unlike in U-Boot (see data sheet
https://www.nxp.com/docs/en/data-sheet/MC146818.pdf, table 3).
Signed-off-by: Heinrich Schuchardt
---
drivers/rtc/mc146818.c | 3 ++-
1 file changed, 2 inse
From: Martin Kaiser
The existing imx_watchdog driver is compatible with mx25 chipsets.
Add a WDOG1_BASE_ADDR define for the base address and enable the driver
in watchdog's Makefile.
To use the driver, a board must define CONFIG_IMX_WATCHDOG and
CONFIG_HW_WATCHDOG.
This fixes an issue when boot
With the pending requirement for CONFIG_BLK, this patch removes
the USB_STORAGE option which assumes that DM_USB is enabled, but isn't
yet available for the omap2340 musb glue among other issues. Once
the USB issues are resolved, a future patch can enable them again.
Signed-off-by: Adam Ford
di
On Sat, Jul 21, 2018 at 2:47 PM, Martin Kaiser wrote:
> From: Martin Kaiser
>
> The existing imx_watchdog driver is compatible with mx25 chipsets.
> Add a WDOG1_BASE_ADDR define for the base address and enable the driver
> in watchdog's Makefile.
>
> To use the driver, a board must define CONFIG_
On Sat, Mar 17, 2018 at 10:53:11PM +, Heinrich Schuchardt wrote:
> %s/remove/remote/
>
> Signed-off-by: Heinrich Schuchardt
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Jun 26, 2018 at 10:03:22AM -0700, York Sun wrote:
> Add Kconfig options SPL_ENV_* and TPL_ENV_* and simplify Makefile.
> This allows SPL/TPL image has different environment setting from
> full feature U-Boot.
>
> Signed-off-by: York Sun
Applied to u-boot/master, thanks!
--
Tom
signa
Add ability to set environment bootlimit from Kconfig
Signed-off-by: Alex Kiernan
---
Changes in v3: None
Changes in v2: None
drivers/bootcount/Kconfig | 8
include/env_default.h | 3 +++
2 files changed, 11 insertions(+)
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount
This patch series adds the bootlimit environment variable to Kconfig
and migrates users to it.
Changes in v3:
- Rebase
- Add Lukasz' Reviewed-by
Changes in v2:
- include display5 in the migration to Kconfig
Alex Kiernan (2):
Add BOOTCOUNT_BOOTLIMIT to set reboot limit
Migrate bootlimit to K
Migrate boards which set bootlimit in the environment to Kconfig.
We exclude gurnard_defconfig which includes a bootlimit=, but doesn't set
CONFIG_BOOTCOUNT_LIMIT, so we'd fail to include a bootlimit setting
if we migrated it.
display5_defconfig and display5_factory_defconfig share a SYS_CONFIG_N
The NAND offsets for the kernel and U-Boot were missing.
This patch sets up the offsets so the AM3517-EVM can boot from NAND
when DIP switches S7:1 and S7:4 are to the OFF position
Signed-off-by: Adam Ford
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 3b8e2900eb.
The previous e-mail pointing to Vaibhav Hiremath
is bouncing and has for some time. This updates it to myself and I
work for Logic PD the manufacturer of the AM3517-SOM and EVM
Signed-off-by: Adam Ford
diff --git a/board/logicpd/am3517evm/MAINTAINERS
b/board/logicpd/am3517evm/MAINTAINERS
inde
This reverts commit 5e5745465c94605720295fab942eacbdd215db90.
The reverted commit didn't support the scenario where there are less
DRAM banks in U-Boot than in Linux.
Also, it didn't introduce any new functionality, only limitaion.
User could just increase MEMORY_BANKS_MAX if it's too small.
---
The UEFI specification mandates that the create flag is only used in
conjunction with both the read and the write flag.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_selftest/efi_selftest_block_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_selftest/efi_sel
Hello Tom, hello Alex,
I have been testing the patches. They are working fine for ASCII file
names. To support Unicode file names extra work will be needed. But
probably we should postpone this to a later patch series.
There are some dependencies with my work for correcting errors in
Unicode hand
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