RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic
support for it, it does not support SPL/TPL now, and the sdram driver
only support get dram size from sysreg in U-Boot stage. Most of basic
driver like clock, pinctrl, sysreset have been implement, and more
drivers like mac and disp
Add dts binding header for rk3128, files origin from kernel.
Series-Changes: 2
- fix i2c address
- add saradc and usb phy node
- emmc using fifo mode for there is no dma support in rk3128 emmc
- add some clock id in cru.h
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp
Add rk3128 clock driver and cru structure definition.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3:
- remove soft reset driver bind
Changes in v2:
- add clock for saradc, vop, nandc, i2c
- update driver bind for sysreset driver and reset d
RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3: None
Changes in v2:
- update setup
Add rk3128 pinctrl driver and grf/iomux structure definition.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3: None
Changes in v2:
- remove debug info
- update GPIO2C4/C5 SHIFT
arch/arm/include/asm/arch-rockchip/grf_rk3128.h | 551 ++
evb-rk3128 is an evb from Rockchip based on rk3128 SoC:
- 2 USB2.0 Host port;
- 1 HDMI port;
- 2 10/100M eth port;
- 2GB ddr;
- 16GB eMMC;
- UART to USB debug port;
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3:
- remove empty evb_rk3128.c a
RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.
This patch is only used for U-Boot, but not for SPL which will
comes later, maybe after we merge all the common code into a common
file.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Cha
Enable board config for evb-rk3128.
Serial output and eMMC works in this version.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3: None
Changes in v2: None
configs/evb-rk3128_defconfig | 56
1 fil
RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic
support for it, it does not support SPL/TPL now, and the sdram driver
only support get dram size from sysreg in U-Boot stage. Most of basic
driver like clock, pinctrl, sysreset have been implement, and more
drivers like mac and disp
RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3: None
Changes in v2:
- update setup
Add dts binding header for rk3128, files origin from kernel.
Series-Changes: 2
- fix i2c address
- add saradc and usb phy node
- emmc using fifo mode for there is no dma support in rk3128 emmc
- add some clock id in cru.h
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp
Add rk3128 clock driver and cru structure definition.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3:
- remove soft reset driver bind
Changes in v2:
- add clock for saradc, vop, nandc, i2c
- update driver bind for sysreset driver and reset d
Add rk3128 pinctrl driver and grf/iomux structure definition.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3: None
Changes in v2:
- remove debug info
- update GPIO2C4/C5 SHIFT
arch/arm/include/asm/arch-rockchip/grf_rk3128.h | 551 ++
evb-rk3128 is an evb from Rockchip based on rk3128 SoC:
- 2 USB2.0 Host port;
- 1 HDMI port;
- 2 10/100M eth port;
- 2GB ddr;
- 16GB eMMC;
- UART to USB debug port;
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3:
- remove empty evb_rk3128.c
Enable board config for evb-rk3128.
Serial output and eMMC works in this version.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Changes in v3: None
Changes in v2: None
configs/evb-rk3128_defconfig | 56
1 fil
RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.
This patch is only used for U-Boot, but not for SPL which will
comes later, maybe after we merge all the common code into a common
file.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
---
Cha
Hi Madalin,
> -Original Message-
> From: Bhaskar Upadhaya
> Sent: Tuesday, November 28, 2017 12:57 PM
> To: Madalin-cristian Bucur ; Andrew Lunn
> ; f.faine...@gmail.com; net...@vger.kernel.org; Anji
> Jagarlmudi ; Calvin Johnson
> ; Prabhakar Kushwaha
> ; Poonam Aggrwal
>
> Cc: Shengzhou
Simon Goldschmidt wrote:
> Hi Simon,
>
> Simon Glass wrote:
> > I see that, although it is adding to the fpga header so presumably
> > making it harder for someone to move this over.
>
> Yes, I'm not happy with changing the header and even xilinx C file to add
> functionality for altera. However,
On 27/11/2017 18:13, Simon Glass wrote:
Hi Jean-Jacques,
On 27 November 2017 at 02:59, Jean-Jacques Hiblot wrote:
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags
Signed-off-by: Jean-Jacques Hiblot
-
On 27/11/2017 11:10, Jaehoon Chung wrote:
Hi JJ,
On 11/27/2017 06:59 PM, Jean-Jacques Hiblot wrote:
This is a useful information while debugging the initialization process or
performance issues.
Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Lukasz Majewski
---
no change since v1
driv
Hi Bin, Hi Simon,
On 20.11.2017 16:38, Simon Glass wrote:
On 20 November 2017 at 00:07, Bin Meng wrote:
Hi Stefan,
On Wed, Sep 27, 2017 at 1:03 AM, Stefan Roese wrote:
Hi,
I'm currently testing USB on my x86 platform. And noticed, that
the "usb storage" command does not work as expected:
> According to rk3036 TRM, should be set to '1' for the pll
> integer mode, while the '0' means the frac mode.
>
> Signed-off-by: Kever Yang
> ---
>
> arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp Tomsich
> From: Elaine Zhang
>
> Create driver to support all Rockchip SoCs soft reset.
> Example of usage:
> i2c driver:
> ret = reset_get_by_name(dev, "i2c", &reset_ctl);
> if (ret) {
> error("reset_get_by_name() failed: %d\n", ret);
> }
>
> reset_assert(&reset_ct
> There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy,
> so we need to double to pll output and then ddr can work
> in correct frequency.
>
> Signed-off-by: Kever Yang
> ---
>
> arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-
> After the MASK MACRO update, we need to update the driver at the same time.
> This is a fix to:
> 37943aa rockchip: rk3036: clean mask definition for cru reg
>
> Signed-off-by: Kever Yang
> ---
>
> arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 15 ++-
> 1 file changed, 6 insertio
> Most the current rockchip based boards use adc channel
> 1 detect the download key, but there are also some
> boards like rv1108 based plaform use adc channel 0.
> So we parse the adc channel from dts if we can get
> it, otherwise we use the channel 1 as default.
>
> Signed-off-by: Andy Yan
> -
> From: Elaine Zhang
>
> Bind rockchip reset to clock-controller with rockchip_reset_bind().
>
> Signed-off-by: Elaine Zhang
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2:
> - use rockchip_reset_bind() to bind reset driver.
>
> arch/arm/include/asm/arch-rockchip/clock.h | 10 +
> RV1108 EVB uses a adc-based recovery(VOL+) key, which
> connected to saradc channel 0.
> This patch add dt node for it.
>
> Signed-off-by: Andy Yan
> ---
>
> arch/arm/dts/rv1108-evb.dts | 21 +
> 1 file changed, 21 insertions(+)
>
Acked-by: Philipp Tomsich
_
> Call setup_boot_mode to check current boot mode.
>
> Signed-off-by: Andy Yan
> ---
>
> arch/arm/mach-rockchip/Kconfig | 1 +
> arch/arm/mach-rockchip/rv1108/rv1108.c | 6 ++
> 2 files changed, 7 insertions(+)
>
Acked-by: Philipp Tomsich
_
On Mon, 27 Nov 2017 10:13:09 -0700
Simon Glass wrote:
> (Tom - any thoughts about a more expansive cc list on this?)
>
> Hi Masahiro,
>
> On 26 November 2017 at 07:16, Masahiro Yamada
> wrote:
> > 2017-11-26 20:38 GMT+09:00 Simon Glass :
> >> Hi Philipp,
> >>
> >> On 25 November 2017 at 16:3
> According to rk3036 TRM, should be set to '1' for the pll
> integer mode, while the '0' means the frac mode.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> ---
>
> arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-b
> After the MASK MACRO update, we need to update the driver at the same time.
> This is a fix to:
> 37943aa rockchip: rk3036: clean mask definition for cru reg
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> ---
>
> arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 15 ++-
> From: Elaine Zhang
>
> Create driver to support all Rockchip SoCs soft reset.
> Example of usage:
> i2c driver:
> ret = reset_get_by_name(dev, "i2c", &reset_ctl);
> if (ret) {
> error("reset_get_by_name() failed: %d\n", ret);
> }
>
> reset_assert(&reset_ct
> From: Elaine Zhang
>
> Bind rockchip reset to clock-controller with rockchip_reset_bind().
>
> Signed-off-by: Elaine Zhang
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> ---
>
> Changes in v2:
> - use rockchip_reset_bind() to bind reset driver.
>
> arch/arm/include/asm/arch-ro
> Call setup_boot_mode to check current boot mode.
>
> Signed-off-by: Andy Yan
> Acked-by: Philipp Tomsich
> ---
>
> arch/arm/mach-rockchip/Kconfig | 1 +
> arch/arm/mach-rockchip/rv1108/rv1108.c | 6 ++
> 2 files changed, 7 insertions(+)
>
Reviewed-by: Philipp Tomsich
_
Hi,
Here is an attempt at transitioning away from the MMC raw environment to a
FAT-based one. Since the RFC was quite well received, I actually tested it
and fixed a few rough edges.
You'll find the first RFC here for reference:
https://lists.denx.de/pipermail/u-boot/2017-October/310111.html
And
Now that we have everything in place in the code, let's allow to build
multiple environments backend through Kconfig.
Reviewed-by: Lukasz Majewski
Signed-off-by: Maxime Ripard
---
env/Kconfig | 65 ++
1 file changed, 32 insertions(+), 33 delet
Since we want to have multiple environments, we will need to initialise
all the environments since we don't know at init time what drivers might
fail when calling load.
Let's init all of them, and only consider for further operations the ones
that have not reported any errors at init time.
Signed
The env_driver_lookup_default and env_get_default_location functions are
about to get refactored to support loading from multiple environment.
The name is therefore not really well suited anymore. Drop the default
part to be a bit more relevant.
Reviewed-by: Lukasz Majewski
Signed-off-by: Maxime
In preparation for the multiple environment support, let's introduce two
new parameters to the environment driver lookup function: the priority and
operation.
The operation parameter is meant to identify, obviously, the operation you
might want to perform on the environment.
The priority is a num
Now that we have everything in place to support multiple environment, let's
make sure the current code can use it.
The priority used between the various environment is the same one that was
used in the code previously.
At read / init times, the highest priority environment is going to be
detected
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make MMC play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.
Signed-off-by: Maxime Ripard
---
env/m
Since we'll soon have support for multiple environments, the environment
saving message might end up being printed multiple times if the higher
priority environment cannot be used.
That might confuse the user, so let's make it explicit if the operation
failed or not.
Reviewed-by: Lukasz Majewski
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make the common code play a little nicer by removing all the extra output
in the standard case.
Signed-off-by: Maxime Ripard
---
env/common.c | 2 +-
1 f
The nvedit command is the only user of env_driver_lookup_default outside of
the environment code itself, and it uses it only to print the environment
it's about to save to during env save.
As we're about to rework the environment to be able to handle multiple
environment sources, we might not have
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.
Make FAT play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.
Signed-off-by: Maxime Ripard
---
env/f
Since we can have multiple environments now, it's better to provide a
decent indication on what environments were tried and which were the one to
fail and succeed.
Signed-off-by: Maxime Ripard
---
env/env.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/env/env.c b/env/
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.
Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Lukasz Majewski
Reviewed-by: Simon Glass
---
no change since v1
drivers/mmc/mmc.c | 4 ++--
1 file changed, 2 inserti
Now that we have everything in place to implement the transition scheme,
let's enable it by default.
Reviewed-by: Lukasz Majewski
Signed-off-by: Maxime Ripard
---
env/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/env/Kconfig b/env/Kconfig
index bf6eab6b4ace..19524638e6e1 10064
Allow boards and architectures to override the default environment lookup
code by overriding env_get_location.
Reviewed-by: Lukasz Majewski
Signed-off-by: Maxime Ripard
---
env/env.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/env/env.c b/env/env.c
index b4d8886e7a69..9b
Make sure that those basic capabilities are advertised by the host.
Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Lukasz Majewski
Reviewed-by: Simon Glass
---
no change since v1
drivers/mmc/mmc.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/mm
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags
Signed-off-by: Jean-Jacques Hiblot
---
changes since v2:
* use the wrappers like dev_read_u32_default() to access the DTS instead of
using the livetree
This series applies on top of "[PATCH v2 00/26] mmc: Add support for HS200
and UHS modes"
It fixes a bug with old SD and MMC cards that support only the legacy mode.
It also addresses the comments made on the mailing list:
* dump card and host capabilities in debug mode
* use 1-bit if the DTS prop
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected
Signed-off-by: Jean-Jacques Hiblot
---
changes since v2:
* dump the capabilities during the initialization only when
The current environment has been hardcoded to an offset that starts to be
an issue given the current size of our main U-Boot binary.
By implementing a custom environment location routine, we can always favor
the FAT-based environment, and fallback to the MMC if we don't find
something in the FAT p
The partitions variable is especially useful to create a partition table
from U-Boot, either directly from the U-Boot shell, or through flashing
tools like fastboot and its oem format command.
This is especially useful on devices with an eMMC you can't take out to
flash from another system, and bo
The SPL must be located at 8kB (16 sectors) offset. That's right in the
middle of the GPT, so we need to define a smaller amount of partitions to
accomodate for that location.
Signed-off-by: Maxime Ripard
---
disk/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/disk/Kconfig b/disk/Kc
On some SoCs, the SPL needs to be located right in the middle of the GPT
partition entries.
One way to work around that is to create partition entries for a smaller
number of partitions to accomodate with where the SPL will be. Create a
Kconfig option to allow to do that.
Signed-off-by: Maxime Ri
On Tue, Nov 28, 2017 at 11:34:37AM +0100, Maxime Ripard wrote:
> Hi,
>
> Here is a set of patches that have been sitting in some variations for
> quite some time now.
>
> This is mostly to ease the eMMC (and MMC, to some extent) flashing
> using fastboot that in turn rely on GPT.
>
> The Allwinn
Hi,
Here is a set of patches that have been sitting in some variations for
quite some time now.
This is mostly to ease the eMMC (and MMC, to some extent) flashing
using fastboot that in turn rely on GPT.
The Allwinner SoCs need to have the SPL located right in the middle of
a traditional GPT, at
Now that more and more devices are built using eMMC, providing a way to
easily flash the system without too much hassle seems like a right thing to
do.
Since fastboot is the most deployed tool to do that these days, we can just
rely on it to provide a way to flash the various components in the sys
>> (Tom - any thoughts about a more expansive cc list on this?)
>>
>> Hi Masahiro,
>>
>> On 26 November 2017 at 07:16, Masahiro Yamada
>> wrote:
>> > 2017-11-26 20:38 GMT+09:00 Simon Glass :
>> >> Hi Philipp,
>> >>
>> >> On 25 November 2017 at 16:31, Dr. Philipp Tomsich
>> >> wrote:
>> >>> Hi,
>>
+ Anji, Calvin, Prabhakar, Poonam.
-Original Message-
From: Madalin-cristian Bucur
Sent: Tuesday, November 28, 2017 12:56 PM
To: Andrew Lunn ; f.faine...@gmail.com; net...@vger.kernel.org
Cc: Bhaskar Upadhaya ; Shengzhou Liu
; York Sun ; u-boot@lists.denx.de
Subject: [RFC] Support for SG
Duane,
On 28/11/17 10:07, Duane Leslie wrote:
> Roger,
>
> I’m not clear on the correct way to report bugs in U-Boot, but the change you
> signed off in
> https://github.com/u-boot/u-boot/commit/f411b5cca48f0eee9443b85e7b75a46356bd2327
> disabled the setting of the `ethaddr` environment variab
On Monday, November 27, 2017 1, Marek Vasut wrote:
> > wait_for_bit() wants you to pass a direct address of a 32-bit register.
> > The register I am waiting for is a 16-bit register and the hardware
> > manual doesn't say 32-bit is allowed.
> > When I do a 32-bit read on that address, I actually ge
On Tue, Nov 28, 2017 at 11:20:04AM +0900, Jaehoon Chung wrote:
> Dear Tom,
>
> Could you pull these patches to u-boot/master?
> After applied these patches, i will send the patches relevant to fixing
> patches.
> - I have tested the buildman, it's passed.
>
> Note:
> - When run "mmc rescan", it
These boards are on the boundary of "u-boot-nodtb.bin exceeds file
size limit" error.
Reduce the log-level to save memory footprint.
Signed-off-by: Masahiro Yamada
---
configs/openrd_base_defconfig | 2 +-
configs/openrd_client_defconfig | 2 +-
configs/openrd_ultimate_defconfig | 2 +-
No more users of assert() except host tools. Remove.
Signed-off-by: Masahiro Yamada
---
include/common.h | 15 ---
lib/tiny-printf.c | 9 -
lib/vsprintf.c| 9 -
3 files changed, 33 deletions(-)
diff --git a/include/common.h b/include/common.h
index e14e1da..
Calling panic() for these boards causes build error:
undefined reference to `do_reset'
They must compile do_reset(), or define CONFIG_PANIC_HANG.
Signed-off-by: Masahiro Yamada
---
configs/cl-som-imx7_defconfig | 1 +
configs/evb-rk3229_defconfig | 1 +
configs/mccmon6_sd_defconfig | 1 +
Hi Maxime,
On 28/11/2017 11:24, Maxime Ripard wrote:
> Since we want to have multiple environments, we will need to initialise
> all the environments since we don't know at init time what drivers might
> fail when calling load.
>
> Let's init all of them, and only consider for further operations
Freescale (NXP) boards have lots of defconfig files per board.
I used "imply PANIC_HANG" for them.
Signed-off-by: Masahiro Yamada
---
README| 10 -
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 3 +++
arch/powerpc/cpu/mpc85xx/Kconfig | 37
We do not need multiple ways to do the same thing. Instead of
assert(), use BUG_ON() from Linux. The logic is opposite, but
Coccinelle is of great help for such a conversion. We could
simply convert assert(x) to BUG_ON(!x) for all expressions "x",
but I did a bit better job by converting assert(
On Tue, Nov 28, 2017 at 01:24:45PM +0100, Quentin Schulz wrote:
> Hi Maxime,
>
> On 28/11/2017 11:24, Maxime Ripard wrote:
> > Since we want to have multiple environments, we will need to initialise
> > all the environments since we don't know at init time what drivers might
> > fail when calling
This patchset is to add i.MX8M and i.MX8MQ-EVK support
patch: "power: pmic.h: include dm/ofnode.h" and
"power: pmic/regulator allow dm be omited by SPL" is previously reviewed
in mailist to not merged. Pick it up.
The board support is a large patch because of the ddr related code.
If it is not go
Add i.MX8M into Kconfig, create a new folder mx8m
dedicated for i.MX8M.
Signed-off-by: Peng Fan
---
arch/arm/Kconfig | 8
arch/arm/Makefile | 4 ++--
arch/arm/mach-imx/mx8m/Kconfig | 10 ++
3 files changed, 20 insertions(+), 2 deletions(-)
create mo
Add register definition header file for i.MX8M
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx8m/imx-regs.h | 298 ++
1 file changed, 298 insertions(+)
create mode 100644 arch/arm/include/asm/arch-mx8m/imx-regs.h
diff --git a/arch/arm/include/asm/arch-mx8m/
Add pin header file for i.MX8M
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx8m/mx8mq_pins.h | 623
1 file changed, 623 insertions(+)
create mode 100755 arch/arm/include/asm/arch-mx8m/mx8mq_pins.h
diff --git a/arch/arm/include/asm/arch-mx8m/mx8mq_pins.h
Add USB_BOOT entry.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/boot_mode.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/mach-imx/boot_mode.h
b/arch/arm/include/asm/mach-imx/boot_mode.h
index a8239f2f7a..e3ed046b25 100644
--- a/arch/arm/include/asm/mach
Add SIP function to issue SMC call to Arm Trusted Firmware.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/sys_proto.h | 3 +++
arch/arm/mach-imx/Makefile| 2 ++
arch/arm/mach-imx/sip.c | 23 +++
3 files changed, 28 insertions(+)
Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 18205dc9
Implement spl_boot_device for i.MX8M.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index d0d1b73aa6..2dc23e6d34 100644
--- a/arch/arm/mach-imx/spl.
Add clock driver to support i.MX8M.
There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.
Signed-off-by: Peng Fan
---
arch/arm
Add SoC level initialization code
- arch_cpu_init
- mmu table
- detect cpu revision
- reset cpu and wdog settings
- M4 boot
- timer init
- wdog settings
- lowlevel init to save/restore registers
- a few dummy header file to avoid build failure
- ft_system_setup and ft_add_optee_node
- mm
Add ddr register memory map.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx8m/ddr_memory_map.h | 496
1 file changed, 496 insertions(+)
create mode 100644 arch/arm/include/asm/arch-mx8m/ddr_memory_map.h
diff --git a/arch/arm/include/asm/arch-mx8m/ddr_memory_m
Compile files for i.MX8M
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/Makefile | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index c807174363..efa2056e09 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/
i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.
Signed-off-by: Peng Fan
---
drivers/misc/mxc_ocotp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 8986bb4ad0..0cf24a4c88 100644
--- a/driver
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.
Signed-off-by: Peng Fan
Cc: Joe Hershberger
---
drivers/net/fec_mxc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/ne
Support i.MX8M in fsl esdhc driver.
Signed-off-by: Peng Fan
---
drivers/mmc/fsl_esdhc.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 499d622c6d..3a56f7c2bc 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drive
Add i.MX8MQ SoC Revision
Add is_mx8m helper
The 7ULP is a dummy number, so use 0xEx.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 6 --
arch/arm/include/asm/mach-imx/sys_proto.h | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
Cc: Joe Hershberger
---
drive
Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/regs-lcdif.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/mach-imx/re
Add i.MX8M GPIO support.
There are 4 GPIO banks on i.MX8M.
Signed-off-by: Peng Fan
---
drivers/gpio/mxc_gpio.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index c480eba940..1e9188af63 100644
--- a/d
Add pad settings bit definition for i.MX8M.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
b/arch/arm/include/asm/mach-imx/iomux-v3.h
index a
Allow the dm driver be omitted by SPL.
Signed-off-by: Peng Fan
Reviewed-by: Simon Glass
Cc: Jaehoon Chung
Cc: Stefano Babic
---
drivers/power/pmic/Makefile | 4 ++--
drivers/power/regulator/Makefile | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/power/pmic
> RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
> and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
> and device, HDMI/LVDS/MIPI display.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v3: None
> Changes
Include dm/ofnode.h.
Signed-off-by: Peng Fan
Reviewed-by: Simon Glass
Cc: Stefano Babic
---
include/power/pmic.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 4b34316427..f2fe537fb7 100644
--- a/include/power/pmic.h
+++ b/include/power/pm
> Add dts binding header for rk3128, files origin from kernel.
>
> Series-Changes: 2
> - fix i2c address
> - add saradc and usb phy node
> - emmc using fifo mode for there is no dma support in rk3128 emmc
> - add some clock id in cru.h
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
>
> Add rk3128 clock driver and cru structure definition.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v3:
> - remove soft reset driver bind
>
> Changes in v2:
> - add clock for saradc, vop, nandc, i2c
> - update driver bind for s
> Add rk3128 pinctrl driver and grf/iomux structure definition.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v3: None
> Changes in v2:
> - remove debug info
> - update GPIO2C4/C5 SHIFT
>
> arch/arm/include/asm/arch-rockchip/grf
> Enable board config for evb-rk3128.
> Serial output and eMMC works in this version.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> configs/evb-rk3128_defconfig | 56
>
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