> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Priyanka
> Jain
> Sent: Wednesday, April 12, 2017 1:53 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Suresh Gupta
> Subject: Re: [U-Boot] [PATCH] nxp/ls2088ardb: Add QSPI-boot support
>
>
>
> > ---
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit d5abcf94c7123167725fc22ace342f0d455093c1:
ti: boot: Register the MMC controllers in SPL in the same way as in
u-boot (2017-03-19 22:17:14 -0400)
are available in the git repository at:
git://www.denx.de/git/u-
Hi Tom,
Do you mean I should only support BLK?
Thank you!
Best regards,
Zhikang Zhang
-Original Message-
From: Tom Rini [mailto:tr...@konsulko.com]
Sent: Tuesday, April 11, 2017 9:18 PM
To: Z.K. Zhang
Cc: york sun ; u-boot@lists.denx.de; Wenbin Song
Subject: Re: [U-Boot] [RFC, 1/2]
Hi Simon,
On Wed, Mar 22, 2017 at 4:06 AM, Simon Glass wrote:
> Hi Bin,
>
> On 16 March 2017 at 08:26, Bin Meng wrote:
>> At the end of pre-relocation phase, save the new stack address
>> to CMOS and use it as the stack on next S3 boot for fsp_init()
>> continuation function.
>>
>> Signed-off-by
This is the 5th version of patchset to adds support for Intel Arria 10 SoC.
This version mainly resolved comments from Marek and Dinh in [v4].
The whole series is rebased on top of
http://git.denx.de/?p=u-boot/u-boot-socfpga.git
that already including 2 accepted patches from previous revision.
Th
Restructure clock manager driver in the preparation to support A10.
Move the Gen5 specific code to _gen5 files.
- Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
- Check return value from wait_for_bit(). So change return type to int for
cm_write_with_phase() and cm_basic
Restructure reset manager driver in the preparation to support A10.
Move the Gen5 specific code to gen5 files. Change socfpga_per_reset() return
type to int.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile | 2 +-
arch/arm/mach-socfpga/include/mach/reset_mana
Restructure system manager in the preparation to support A10.
No functional change.
Change uint32_t to u32.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile | 5 +-
.../arm/mach-socfpga/include/mach/system_manager.h | 128 ++---
.../{system_ma
Add reset driver support for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile | 2 +
arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 +
.../include/mach/reset_manager_arria10.h | 146
arch/ar
Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.
Change all uint32_t_to u32 and check return value from
socfpga_bridges_reset.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile| 2 +-
arch/arm/mach-socfpga/includ
Add i2c, timer and other A10 macros.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
b/arch/arm/mach-socfpga/include/mach/base_addr_a1
Add clock driver support for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile |3 +-
arch/arm/mach-socfpga/clock_manager.c | 10 +
arch/arm/mach-socfpga/clock_manager_arria10.c | 1096 +
Add system manager register struct and macros for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
.../arm/mach-socfpga/include/mach/system_manager.h | 74 +---
.../include/mach/system_manager_arria10.h | 81 ++
2 files changed
Add sdram header file for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 380 +
1 file changed, 380 insertions(+)
create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_arria10.h
diff --git
Add pinmux support for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile | 1 +
arch/arm/mach-socfpga/include/mach/pinmux.h | 17 +
arch/arm/mach-socfpga/pinmux_arria10.c | 96 +
3 files chan
Add misc support for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Makefile| 1 +
arch/arm/mach-socfpga/include/mach/misc.h | 6 +
arch/arm/mach-socfpga/misc_arria10.c | 259 ++
3 files changed, 266
Add support for the Arria10 SoCDK.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
board/altera/arria10-socdk/Kconfig | 18 ++
board/altera/arria10-socdk/Makefile | 7 +++
board/altera/arria10-socdk/socfpga.c | 7 +++
3 files changed, 32 insertions(+)
Add config and defconfig for the Arria10 and update socfpga_common.h.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
configs/socfpga_arria10_defconfig | 29 +++
include/configs/socfpga_arria10_socdk.h | 66 +
include/configs/socfp
Add SPL support for Arria 10.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/spl.c | 72 +
1 file changed, 67 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
in
Device tree files for Arria 10
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_arria10.dtsi | 869 +
arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 38 +
..
Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Kconfig | 10 +
arch/arm/mach-socfpga/Makefile | 46 ++
2 file
Signed-off-by: Patrick Delaunay
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
cmd/gpt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index 3e98821..d84b0a2 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@
export the needed functions for GPT over MTD
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
disk/part_efi.c | 32 +---
disk/part_efi_int.h | 36
inverse the order of my_lba and alternate_lba values switch value
=> alternate_lba can be used in partition entry computation
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
disk/part_efi.c | 6
uuid_guid_parse_str parses a string provided in commands line
to found a valid GUID as valid uuid string or as shortcut
(under CONFIG_PARTITION_TYPE_GUID).
Signed-off-by: Patrick Delaunay
---
Changes in v5:
- rebase of the top of latest u-boot master
Changes in v4:
- change RFC to PATCH
- updat
support gpt write for MTD device
> gpt write nand 0
> gpt write nor 0
And verify is not yet supported for MTD device
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
cmd/gpt.c | 71
Signed-off-by: Patrick Delaunay
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
cmd/mtdparts.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 112bf1f..796bb98 100644
--- a/cmd/mtdparts.c
+++ b/cmd/
support part list for MTD device
> part list nand 0
> part list nor 0
Signed-off-by: Patrick Delaunay
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
cmd/part.c | 49 +
1 file changed, 41 insertions(+), 8 delet
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5:
- solve warning and error
(dont' include linux/mtd/mtd.h in part.h)
Changes in v4: None
Changes in v3: None
Changes in v2: None
disk/Kconfig| 17 ++
disk/Makefile | 1 +
disk/part_efi_mtd.c |
io.h is only used for CONFIG_RANDOM_UUID
- for clrsetbits_be16
- for clrsetbits_8
available only for some target (but not for SANDBOX)
Signed-off-by: Patrick Delaunay
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
lib/uuid.c | 13 ++---
1 file chang
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
cmd/gpt.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index f685dc8..2363b
split part_print_efi : create sub-functions part_print_gpt()
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
disk/part_efi.c | 55 ++-
1 file
I have a request to support GPT over MTD to have the MTD informations
without U-Boot environment(CONFIG_ENV_IS_NOWHERE is a other requirement
of my project to manage several board configuration with
the same defconfig; boot from NAND or NOR or SDCARD).
The current idea is to use the GPT header fo
activate needed feature in sandbox to allow test GPT over MTD
- EFI_PARTITION_MTD
- SPI_FLASH_MTD
- CMD_MTDPARTS
- MTD_PARTITIONS
- MTD_DEVICE
activate 2 features usefull for test
- RANDOM_UUID
- PARTITION_TYPE_GUID
Signed-off-by: Patrick Delaunay
---
Changes in v5: None
Changes in v4: None
Cha
-1 => -ENOENT : "No partition list provided"
-2 => -EBADF : "Missing disk guid"
-3 => -EFAULT &
-4 => -EINVAL : "Partition list incomplete"
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
cmd/g
create sub-functions part_get_disk_info()
Signed-off-by: Patrick Delaunay
Reviewed-by: Christophe KERELLO
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
disk/part_efi.c | 49 +++--
1 file changed, 27 insertions(+
add new subcommand :
mtdparts gpt []
extract mtd partition from GPT header present in MTD device
> mtdparts gpt nand0
> mtdparts gpt nor0
extract mtd partitions only for some GUID
> mtdparts gpt nand0 data
> mtdparts gpt nor0 0FC63DAF-8483-4772-8E79-3D69D8477DE4
Signed-off-by: Patrick Delaunay
Hi Simon,
On Wed, Mar 22, 2017 at 4:07 AM, Simon Glass wrote:
> Hi,
>
> On 16 March 2017 at 08:26, Bin Meng wrote:
>> Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can
>> bypass executing VGA roms in S3.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/Kconfig | 12 ++
the value for partition_entry_lba of secondary GPT (last usable lba + 1)
is not correct with MTD support as last usable LBA need to be erase size
aligned
The correct location of partition entry is always recomputed with
the formula :
partition_entry_lba =
alternate_lba -
num_pte * sizeof_par
Signed-off-by: Santan Kumar
Signed-off-by: Priyanka Jain
---
Changes for v2:
Changed the subject
board/freescale/ls2080ardb/eth_ls2080rdb.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c
b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index
Hi Simon,
When I try to update
rk3399.dtsi(https://patchwork.ozlabs.org/patch/749901/), I get error
report like this:
spl/dts/dt-platdata.c:10:17: error: ‘dtv_clock_controller_at_ff76’
undeclared here (not in a function)
.clocks = {{&dtv_clock_controller_at_ff76, 78},
{&dtv_clo
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Wednesday, April 12, 2017 9:00 PM
> To: Ruchika Gupta ; u-boot@lists.denx.de
> Cc: Vini Pillai ; Sumit Garg
> Subject: Re: [PATCH 2/3][v3] arm: ls1043ardb: Add NAND secure boot target
>
> On 04/04/2017 10:37 AM, Ruchi
Earlier when MC is loaded but DPL is not deployed results in FDT fix-up
code execution hang.
For this case now print message on console and returns success instead of
return -ENODEV.
This update allows to continue fdt fixup execution.
Signed-off-by: Yogesh Gaur
Signed-off-by: Priyanka Jain
---
Hi Bin,
On 13 April 2017 at 04:00, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Mar 22, 2017 at 4:07 AM, Simon Glass wrote:
>> Hi,
>>
>> On 16 March 2017 at 08:26, Bin Meng wrote:
>>> Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can
>>> bypass executing VGA roms in S3.
>>>
>>> Signed-
Hi Bin,
On 13 April 2017 at 03:25, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Mar 22, 2017 at 4:06 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 16 March 2017 at 08:26, Bin Meng wrote:
>>> At the end of pre-relocation phase, save the new stack address
>>> to CMOS and use it as the stack on next S3 bo
Self-review.
2017-04-13 11:39 GMT+09:00 Masahiro Yamada :
> Adjust ARM SMC Calling Convention code for U-Boot:
> - Replace the license block with SPDX
> - Change path to asm-offsets.h
> - Define UNWIND() as no-op
> - Add Kconfig entry
> - Add asm-offsets
>
> Signed-off-by: Masahiro Yamad
On 09/04/2017 21:27, Simon Glass wrote:
Hi,
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_of
On 09/04/2017 03:13, Tom Rini wrote:
On Fri, Apr 07, 2017 at 01:42:04PM +0200, Jean-Jacques Hiblot wrote:
This is needed to probe devices under that bus such as the SATA PHY.
Signed-off-by: Jean-Jacques Hiblot
---
arch/arm/dts/dra7.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
This series adds support to the common socfpga header for distro boot and moves
the DE0/1, Socrates, C5/A5 SoCDK, and SoCKIT kits to use the common
environment.
Where available, the default devicetree is set to the devicetree for the board
available in the kernel source. If none is available in
This adds a common environment and support for distro boot
in the common socfpga header.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
Changes in v5:
- Per Frank, to support OpenSuse the ENV must be after the GPT
Changes in v4:
- Move env back to being right after the MBR
Changes
This removes the default environment from the de0 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
In addition to the above, add support to boot from the custom
a2 type partition
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
--
C
This removes the default environment from the A5 socdk headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Add support to boot from the custom a2 type partition.
Change default devicetree name to match devicetree name in
upstream kernel source.
This removes the default environment from the sr1500 header
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
This board has no upstream devicetree in the kernel source,
so set to socfpga_cyclone5_sr1500.dtb.
Signed-off-by: Dalon Westergreen
Acked-b
This removes the default environment from the SoCKit headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Change default devicetree name to match devicetree name in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasut
This removes the default environment from the socrates headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
Change default devicetree name to match devicetree name in
upstream kernel source.
Signed-off-by: Dalon Westergreen
Acked-by: Marek Vasu
This removes the default environment from the de1 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
This board does not have a devicetree in the upstream kernel
source so set devicetree to socfpga_cyclone5_de1_soc.dtb.
Signed-off-by: Dalon We
On Fri, Apr 14, 2017 at 01:41:09AM +0800, Ley Foon Tan wrote:
>
This is what the mail header says:
Received: by lists.denx.de (Postfix, from userid 105)
id CF30DC21C35; Thu, 13 Apr 2017 09:41:37 + (UTC)
Add 8h, and you're still on thursday the 13th, but at
This removes the default environment from the C5 SoCDK headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.
In addition to the above, add support to boot from the custom
a2 type partition.
Change default devicetree name to match devicetree name
On Thu, Apr 13, 2017 at 08:54:52AM +, Z.K. Zhang wrote:
> Hi Tom,
>
> Do you mean I should only support BLK?
Yes, thanks!
--
Tom
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On 04/13/2017 04:14 AM, Ruchika Gupta wrote:
-Original Message-
From: York Sun [mailto:york@nxp.com]
Sent: Wednesday, April 12, 2017 9:00 PM
To: Ruchika Gupta ; u-boot@lists.denx.de
Cc: Vini Pillai ; Sumit Garg
Subject: Re: [PATCH 2/3][v3] arm: ls1043ardb: Add NAND secure boot target
On 04/13/2017 12:29 AM, Priyanka Jain wrote:
/* Debug Server firmware */
#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR @@ -256,6 +268,7 @@
unsigned long get_board_sys_clk(void);
/*
* I2C
*/
+#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
LS2080ARDB current u-boot code is closely tied with qi
On 04/12/2017 11:18 PM, Santan Kumar wrote:
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +--
.../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +--
board/freescale/ls2080a/ls2080a.c | 6 +--
board/freescale/ls2080aqds/eth.c | 8 +---
boa
Use CONFIG_ARCH_LS1021A instead.
Signed-off-by: York Sun
Reviewed-by: Alison Wang
---
Change log
v2: Fix a typo in Makefile
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/dts/Makefile | 2 +-
arch/arm/include/asm/arch-ls102xa/config.h | 2 +-
arch/arm/incl
From: Stephen Warren
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren
---
arch/arm/dts/Makefil
This adds support for some of the xDSL Broadcom MIPS SoCs:
- BCM6358
- BCM6328
- BCM63268
However, support for other SoCs could be added in the future:
- Other BCM63xx
- BCM33xx
- BCM71xx
Álvaro Fernández Rojas (8):
cmd: cpu: fix NULL cpu feature prints
sysreset: add syscon-reboot driver
Commit 740d5d3 added two new features but only one feature name,
which results in NULL prints when device_id feature is selected.
Fix this by not printing features without a corresponding name.
Before:
HG556a # cpu detail
-1: cpu@0 BCM6358A1
ID = 0, freq = 300
Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c,
which provides a generic driver for platforms that only require writing a mask
to a regmap offset.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/sysreset/Kconfig | 8 +
drivers/sysreset/Makefile
Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS
Signed-off-by: Álvaro Fernández Rojas
---
arch/mips/cpu/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index 1b919ed..55e6498 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/m
CFE checks CPU Thread in a different way (using register $22):
mfc0t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnezt1, 2f # if we are running on thread 1, skip init
nop
Signed-off-by: Álvaro Fernández Rojas
---
arch/mips/cpu/start.S | 5 +
1 file c
This target supports some of the xDSL Broadcom MIPS SoCs for now.
However, support for other SoCs could be added in the future.
Signed-off-by: Álvaro Fernández Rojas
---
arch/mips/Kconfig | 10 ++
arch/mips/Makefile | 1 +
arch/mips/dts/Makefile
It is based on linux/drivers/tty/serial/bcm63xx_uart.c
Signed-off-by: Álvaro Fernández Rojas
---
drivers/serial/Kconfig | 14 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_bcm6345.c | 341
3 files changed, 356 insertions(+)
CFE supports loading .elf images instead of raw binaries.
Signed-off-by: Álvaro Fernández Rojas
---
Makefile | 22 ++
arch/mips/cpu/u-boot-elf.lds | 10 ++
2 files changed, 32 insertions(+)
create mode 100644 arch/mips/cpu/u-boot-elf.lds
diff --g
BCM6358 has its internal registers mapped to 0xfffe, which is changed to
0x1ffe when ioremap is called.
Signed-off-by: Álvaro Fernández Rojas
---
arch/mips/include/asm/mach-generic/ioremap.h | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/mips/inc
Hi Bin,
On 12 April 2017 at 02:14, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Mar 22, 2017 at 4:06 AM, Simon Glass wrote:
> > Hi Bin,
> >
> > On 16 March 2017 at 08:26, Bin Meng wrote:
> >> In an S3 resume path, U-Boot does everything like a cold boot except
> >> in the last_stage_init() it jump
On 31 March 2017 at 22:23, Simon Glass wrote:
> On 30 March 2017 at 08:44, George McCollister
> wrote:
>> os.read() returns a byte array in Python 3.5.2 and needs to be converted
>> into a string. Check if the returned value is an instance of bytes and
>> if it is decode it as a utf-8 string. If
On 31 March 2017 at 22:21, Simon Glass wrote:
> On 22 March 2017 at 22:55, Wenyou Yang wrote:
>> When the CONFIG_ATMEL_LEGACY is undefined, according to the following
>> defines, at91_set_gpio_value() references to at91_set_pio_value(x, y)
>> with two parameters.
>> #define at91_set_gpio_value(x
On 31 March 2017 at 22:23, Simon Glass wrote:
> On 27 March 2017 at 13:54, Alexandru Gagniuc wrote:
>> Do not condition the compilation of the U_BOOT_DRIVER by !OF_PLATDATA.
>> This is inconsistent with the majority of other drivers. This also
>> blocks OF_PLATDATA boards with an 16550-compatible
On 10 April 2017 at 02:08, Stefano Babic wrote:
> On 09/04/2017 21:27, Simon Glass wrote:
>> On 5 April 2017 at 09:46, Stefano Babic wrote:
>>> Not force to use python from PATH. Issue was noted when building with
>>> Yocto, because python from the distro is always taken instead of
>>> python-nat
On 31 March 2017 at 22:23, Simon Glass wrote:
> On 30 March 2017 at 08:44, George McCollister
> wrote:
>> With Python 3.5.2 encode will throw an exception if val is a byte array.
>> Decode it to a string first. This assumes it's utf-8, if it's not valid
>> utf-8 it will throw an exception.
>>
>>
On 23 March 2017 at 21:34, Wenyou Yang wrote:
> The MMC SPL locates the BSS section to a different memory region
> from text, then use "_image_binary_end" variable to point to the
> correct device tree location.
>
> Signed-off-by: Wenyou Yang
> ---
>
> Changes in v2:
> - Drop [PATCH] ARM: at91:
On 23 March 2017 at 21:34, Wenyou Yang wrote:
> Because the MMC SPL puts the bbs section in the ddr memory, move
> calling mem_init() before calling spl_init().
>
> Signed-off-by: Wenyou Yang
> ---
>
> Changes in v2: None
>
> arch/arm/mach-at91/spl_atmel.c | 3 ++-
> 1 file changed, 2 insertions
On 23 March 2017 at 19:18, Wenyou Yang wrote:
> Add the device tree file for sama5d3 Xplained board.
>
> The dts files are copied from the Linux-4.9, do changes as below.
> - add the "u-boot,dm-pre-reloc" property to determine which nodes
>which are needed by SPL and by the board_init_f stage
On 12 April 2017 at 20:31, Wenyou Yang wrote:
> Add #ifndef CONFIG_DM_GPIO for CONFIG_AT91_GPIO define to avoid
> the redefine compilation error.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Andreas Bießmann
> ---
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in
On 23 March 2017 at 19:18, Wenyou Yang wrote:
> Add the device tree files for sama5d4 Xplained board.
>
> The dts files are copied from Linux-4.4, do the following changes.
> - add reg property for pinctrl node.
> - move the gpio nodes(pioA, pioB, pioC ...) from the pinctrl child's
>nodes to
On 4 April 2017 at 13:00, Simon Glass wrote:
> There is a strange interaction with drivers which use DMA if the cache
> starts off in a dirty state. Buffer space which the driver reads (but has
> not previously written) can contain zero bytes from alloc_priv(). This can
> cause corruption of the m
On 22 March 2017 at 22:46, Wenyou Yang wrote:
> Add the clock support.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Simon Glass
> Reviewed-by: Andreas Bießmann
> ---
>
> Changes in v4:
> - Rebase on v2017.03.
>
> Changes in v3:
> - Rebase on the master branch on git://git.denx.de/u-boot-atme
On 12 April 2017 at 20:31, Wenyou Yang wrote:
> Due to the introduction of the pinctrl and clk driver, and using
> device tree files, remove the unneeded hardcoded pin configuration
> and clock enabling code from the board file.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Andreas Bießmann
> --
On 10 April 2017 at 09:33, Olliver Schinagl wrote:
> In the current net stack, we have a few functions to get and set
> the "ethaddr" and "ethNaddr" environment variables, which use magic
> values to get and set these environment variables. Remove the magicness
> of the buffer by defining it prope
On 23 March 2017 at 21:34, Wenyou Yang wrote:
> Before setting up the serial communications, bring in the serial
> device from the device tree file.
>
> Signed-off-by: Wenyou Yang
> ---
>
> Changes in v2: None
>
> arch/arm/mach-at91/spl_atmel.c | 8
> 1 file changed, 8 insertions(+)
Ap
On 2 April 2017 at 19:05, Simon Glass wrote:
> Hi Masahiro,
>
> On 2 April 2017 at 18:33, Masahiro Yamada
> wrote:
>> Hi Simon,
>>
>>
>> 2017-04-03 3:26 GMT+09:00 Simon Glass :
>>> With skeleton.dtsi being dropped it is more likely that the /aliases node
>>> will be last in the device tree. Upda
On 12 April 2017 at 18:52, Simon Glass wrote:
> One of these has crept in in this commit:
>
> 40a808f1 ARCv2: SLC: Make sure busy bit is set properly on SLC flushing
>
> Adjust buildman to handle it.
>
> Signed-off-by: Simon Glass
> ---
>
> tools/buildman/builder.py | 5 +++--
> 1 file changed,
On 23 March 2017 at 21:34, Wenyou Yang wrote:
> When OF_CONTROL is enabled, MMC boot device should not be detected
> automatically, it should be MMC1 fixedly only the status "enabled"
> is available.
>
> Add NAND Flash boot device as well.
>
> Signed-off-by: Wenyou Yang
> ---
>
> Changes in v2: N
On 22 March 2017 at 22:55, Wenyou Yang wrote:
> Because there isn't the implementation of gpio_set/get_value()
> and gpio_set/get_value() after the at91 gpio driver is converted
> to support the driver model, use at91_set_gpio_value() and
> at91_get_gpio_value()
>
> Signed-off-by: Wenyou Yang
> R
On 9 April 2017 at 13:27, Simon Glass wrote:
> On 4 April 2017 at 11:46, Alexandru Gagniuc wrote:
>> uclass_find_device_by_seq() prints seq and req_seq when debugging is
>> enabled, but this information is not very useful by itself. Add the
>> name of he driver to this information. This improves
On 12 April 2017 at 20:31, Wenyou Yang wrote:
> Enable the early debug UART to debug problems when an ICE or other
> debug mechanism is not available.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Andreas Bießmann
> ---
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Change
On 23 March 2017 at 19:18, Wenyou Yang wrote:
> Add the device tree file for sama5d4ek board.
>
> The dts file is copied from Linux-4.4, do the following changes.
> - add the "u-boot,dm-pre-reloc" property to determine which nodes
>which are needed by SPL and by the board_init_f stage.
> - f
On 23 March 2017 at 19:18, Wenyou Yang wrote:
> Add the device tree files for sama5d3xek board.
>
> The dts files are copied from Linux-4.9, do the changes as below.
> - add reg property for the pinctrl node.
> - move the gpio nodes (pioA, pioB, pioC ...) as the pinctrl's
>slibling nodes.
>
On 12 April 2017 at 20:31, Wenyou Yang wrote:
> Update the configuration files to support the device tree and
> driver model, so do SPL. The device clock and pins configuration
> are handled by the clock and the pinctrl drivers respectively.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Andreas B
On 22 March 2017 at 22:46, Wenyou Yang wrote:
> Add the device tree support.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Simon Glass
> Reviewed-by: Andreas Bießmann
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> drivers/gpio/at91_gpio.c | 15 +++
>
On 22 March 2017 at 22:44, Wenyou Yang wrote:
> AT91 PIO controller is a combined gpio-controller, pin-mux and
> pin-config module. The peripheral's pins are assigned through
> per-pin based muxing logic.
>
> Each SoC will have to describe the its limitation and pin
> configuration via device tree
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