Re: [U-Boot] [PATCH v3] Add single register pin controller driver

Hi Felix, Not 'hijacking' a patch, just following Linux Developer's Certificate of Origin 1.1 guidelines. As you know, I contacted you directly with this patch suggestion prior to posting to the mailing list (keeping strictly to rule c). I had hoped you would make a new version: > On 09.03.2017

[U-Boot] [PATCH 0/8] Allwinner DesignWare DRAM controller refactors and V3s SPL support

Allwinner H5/A64/V3s/R40 SoCs all feature a DRAM controller like the one in Allwinner H3, which seems from DesignWare. They do not have properly licensed official DRAM initialization code (some have even no public readable code), but they can be supported by slightly altering the H3 code (this can

[U-Boot] [PATCH 2/8] sunxi: Rename bus-width related macros in H3 DRAM code

The DesignWare DRAM controller used by H3 and newer SoCs use a bit to identify whether the DRAM is half-width. As H3 itself come with 32-bit DRAM, the two modes of the bit used to be named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with 16-bit DRAM they're really 8-bit and 16-bit. Rename t

[U-Boot] [PATCH 1/8] sunxi: makes an invisible option for H3-like DRAM controllers

Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initialization code, but can use modified dram_sun8i_h3.c. Add a invisible option for easier DRAM initialization code reuse. Signed-off-by: Icenowy Zheng Acked-by: Max

[U-Boot] [PATCH] omap3_overo: Reduce SPL size

Borrowing from omap3_logic, switch to SPL_SYS_MALLOC_SIMPLE and moving the stack to DDR as soon as we're able. Signed-off-by: Tom Rini --- configs/omap3_overo_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig index e84

Re: [U-Boot] [PATCH] omap3_overo: Reduce SPL size

On Sat, Mar 11, 2017 at 3:34 PM, Tom Rini wrote: > Borrowing from omap3_logic, switch to SPL_SYS_MALLOC_SIMPLE and moving > the stack to DDR as soon as we're able. Should we do that for all the omap3 devices? > Signed-off-by: Tom Rini > --- > configs/omap3_overo_defconfig | 4 > 1 file ch

[U-Boot] [PATCH 3/8] sunxi: add option for 16-bit DW DRAM controller

Some Allwinner SoCs features a DesignWare-like controller with only 16 bit bus width. Add support for them. Signed-off-by: Icenowy Zheng --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 34 +- board/sunxi/Kconfig | 16 2 files changed, 4

[U-Boot] [PATCH 4/8] sunxi: add bank detection code to H3 DRAM initialization code

Some DDR2 DRAM have only four banks, not eight. Add code to detect this situation. Signed-off-by: Icenowy Zheng --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-s

[U-Boot] [PATCH 5/8] sunxi: Add selective DRAM type and timing

DRAM chip varies, and one code cannot satisfy all DRAMs. Add options to select a timing set. Currently only DDR3-1333 (the original set) is added into it. Signed-off-by: Icenowy Zheng --- arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h | 30 ++ arch/arm/mach-sunxi/Makefile

[U-Boot] [PATCH 6/8] sunxi: add support for DDR2 DRAM for DesignWare-like DRAM controller

The DesignWare-like DRAM controllers in Allwinner chips have DDR2 DRAM support, add support for it in the driver. No real DDR2 chip info is added in this commit. Signed-off-by: Icenowy Zheng --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 2 ++ board/sunxi/Kconfig | 3 +++ 2 files cha

[U-Boot] [PATCH 7/8] sunxi: add timing info for the DDR2 in V3s SoC

Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its timing param. Add the timing info for it, and make this chip selectable. Signed-off-by: Icenowy Zheng --- arch/arm/mach-sunxi/dram_timings/Makefile | 1 + arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c | 84 +++

[U-Boot] [PATCH 8/8] sunxi: add support for V3s DRAM controller

Allwinner V3s features a DRAM controller like the on in H3, but with a DDR2 DRAM. Add support for it. Signed-off-by: Icenowy Zheng --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 3 +++ board/sunxi/Kconfig | 9 - 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/a

[U-Boot] [PATCH v2 0/2] add armv7m cache support

This patchset adds armv7m instruction/data caches support & enable it for stm32f7. Changed in v2: - changed strucures for memory mapped cache registers to MACROs - added lines better readability. - replaced magic numbers with MACROs. Vikas Manocha (2): armv7m: add instruction & data cache suppo

[U-Boot] [PATCH v2 2/2] stm32f7: enable instruction & data cache

It also enables commands for cache enable/disable/status. Signed-off-by: Vikas Manocha --- Changed in v2: None arch/arm/mach-stm32/stm32f7/soc.c | 2 ++ include/configs/stm32f746-disco.h | 4 +--- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-stm32/stm32f7/soc.c

[U-Boot] [PATCH v2 1/2] armv7m: add instruction & data cache support

This patch adds armv7m instruction & data cache support. Signed-off-by: Vikas Manocha --- Changed in v2: - changed strucures for memory mapped cache registers to MACROs - added lines better readability. - replaced magic numbers with MACROs. arch/arm/cpu/armv7m/Makefile | 2 +- arch/arm/cpu/

Re: [U-Boot] [PATCH v4 1/3] sunxi: add basic V3s support

11.03.2017, 10:09, "Icenowy Zheng" : > Basic U-Boot support is now present for V3s. > > Some memory addresses are changed specially for V3s, as the original > address map cannot fit into a so small DRAM. > > As the DRAM controller code needs a big refactor, the SPL support is > disabled in this v

Re: [U-Boot] [PATCH] omap3_overo: Reduce SPL size

On Sat, Mar 11, 2017 at 04:08:47PM +, Peter Robinson wrote: > On Sat, Mar 11, 2017 at 3:34 PM, Tom Rini wrote: > > Borrowing from omap3_logic, switch to SPL_SYS_MALLOC_SIMPLE and moving > > the stack to DDR as soon as we're able. > > Should we do that for all the omap3 devices? Yes. I'm pro

Re: [U-Boot] arm: omap-common: Fix typo in CONFIG_OMAP54XX guard

On Tue, Mar 07, 2017 at 03:42:24AM +0100, Matthijs van Duin wrote: > Some initialization was unintentionally being skipped on omap5. > > Fixes: f5af0827f276 ("arm: omap-common: Guard some parts of the code with > CONFIG_OMAP44XX/OMAP54XX") > Signed-off-by: Matthijs van Duin > Reviewed-by: Tom R

Re: [U-Boot] tools: binman: change shebang from python into python2

On Mon, Mar 06, 2017 at 09:07:11PM +0100, Jörg Krause wrote: > This tool does not work with Python 3. Change the shebang to make sure the > script is run by a Python 2 interpreter. > > Signed-off-by: Jörg Krause Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital sig

Re: [U-Boot] [U-Boot, v2] arm: OMAP2+: nandecc: propagate error to command return status

On Mon, Mar 06, 2017 at 01:54:30PM +0100, Ladislav Michl wrote: > Currently nandecc returns zero even if underlaying > omap_nand_switch_ecc function fails. Fix that by > propagating error returned to command return value. > > Signed-off-by: Ladislav Michl > Reviewed-by: Tom Rini Applied to u-b

Re: [U-Boot] [PATCH v2 1/2] armv7m: add instruction & data cache support

On 03/12/2017 01:13 AM, Vikas Manocha wrote: > This patch adds armv7m instruction & data cache support. > > Signed-off-by: Vikas Manocha > --- > > Changed in v2: > - changed strucures for memory mapped cache registers to MACROs Macro is written in lowercase, FYI ... > - added lines better read

[U-Boot] [PATCH] mmc: drop unnecessary send_status request

It's redundant to send cmd13 after cmd9 whose response is not R1b. The card devices will not be busy w/ cmd9. Signed-off-by: Ziyuan Xu --- drivers/mmc/mmc.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 3648950..72fc177 100644 --- a/drivers/m