Allwinner V3s features a DRAM controller like the on in H3, but with a
DDR2 DRAM.

Add support for it.

Signed-off-by: Icenowy Zheng <icen...@aosc.xyz>
---
 arch/arm/mach-sunxi/dram_sunxi_dw.c | 3 +++
 board/sunxi/Kconfig                 | 9 ++++++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c 
b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index e9dafb0527..a520fe3501 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -568,6 +568,9 @@ unsigned long sunxi_dram_init(void)
  */
 #if defined(CONFIG_MACH_SUN8I_H3)
        uint16_t socid = SOCID_H3;
+#elif defined(CONFIG_MACH_SUN8I_V3S)
+       /* TODO: set delays and mbus priority for V3s */
+       uint16_t socid = SOCID_H3;
 #elif defined(CONFIG_MACH_SUN50I)
        uint16_t socid = SOCID_A64;
 #endif
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index ddf720f50d..61d5dc69be 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -145,6 +145,10 @@ config MACH_SUN8I_V3S
        select CPU_V7_HAS_VIRT
        select ARCH_SUPPORT_PSCI
        select SUNXI_GEN_SUN6I
+       select SUPPORT_SPL
+       select SUNXI_DRAM_DW
+       select SUNXI_DRAM_DW_16BIT
+       select SUNXI_DRAM_DDR2_V3S
        select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 
 config MACH_SUN9I
@@ -201,11 +205,13 @@ config SUNXI_DRAM_DDR2
 
 choice
        prompt "DRAM Type and Timing"
-       default SUNXI_DRAM_DDR3_1333
+       default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S
+       default SUNXI_DRAM_DDR2_V3s if MACH_SUN8I_V3S
 
 config SUNXI_DRAM_DDR3_1333
        bool "DDR3 1333"
        select SUNXI_DRAM_DDR3
+       depends on !MACH_SUN8I_V3S
        ---help---
        This option is the original only supported memory type, which suits
        many H3/H5/A64 boards available now.
@@ -213,6 +219,7 @@ config SUNXI_DRAM_DDR3_1333
 config SUNXI_DRAM_DDR2_V3S
        bool "DDR2 found in V3s chip"
        select SUNXI_DRAM_DDR2
+       depends on MACH_SUN8I_V3S
        ---help---
        This option is only for the DDR2 memory chip which is co-packaged in
        Allwinner V3s SoC.
-- 
2.12.0

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