On 12.12.2016 08:13, Nathan Rossi wrote:
> On 12 December 2016 at 03:11, Igor Grinberg wrote:
>> dropping the list for this one as the question seems to me irrelevant to
>> your patch set.
>>
>> On 12/11/16 18:47, Nathan Rossi wrote:
>>> On 12 December 2016 at 01:08, Igor Grinberg wrote:
Hi
On 12.12.2016 09:05, Igor Grinberg wrote:
> On 12/12/16 09:13, Nathan Rossi wrote:
>> On 12 December 2016 at 03:11, Igor Grinberg wrote:
>>> dropping the list for this one as the question seems to me irrelevant to
>>> your patch set.
>>>
>>> On 12/11/16 18:47, Nathan Rossi wrote:
On 12 Decem
On 11/22/16 16:54, Mike Looijmans wrote:
> On 22-11-16 12:00, Michal Simek wrote:
>> On 21.11.2016 09:30, Mike Looijmans wrote:
>>> Miami boards can have memory sizes of 256M, 512M or 1GB. To
>>> prevent requiring separate bootloaders for each variant, just
>>> detect the RAM size at boot time inst
On 12/12/16 10:02, Michal Simek wrote:
> On 12.12.2016 08:13, Nathan Rossi wrote:
>> On 12 December 2016 at 03:11, Igor Grinberg wrote:
>>> dropping the list for this one as the question seems to me irrelevant to
>>> your patch set.
>>>
>>> On 12/11/16 18:47, Nathan Rossi wrote:
On 12 Decemb
On 12.12.2016 09:24, Igor Grinberg wrote:
> On 12/12/16 10:02, Michal Simek wrote:
>> On 12.12.2016 08:13, Nathan Rossi wrote:
>>> On 12 December 2016 at 03:11, Igor Grinberg wrote:
dropping the list for this one as the question seems to me irrelevant to
your patch set.
On 12/
On 12/11/16 22:27, Simon Glass wrote:
> Hi Igor,
>
> On 11 December 2016 at 10:37, Igor Grinberg wrote:
>> Hi Tomas, Simon,
>>
>> Sorry, to break in that late...
>> I have a quick question below.
>>
>> On 12/05/16 09:36, Tomas Melin wrote:
>>> Enable support for loading a splash image from within
On 12/12/16 10:18, Michal Simek wrote:
> On 12.12.2016 09:05, Igor Grinberg wrote:
>> On 12/12/16 09:13, Nathan Rossi wrote:
>>> On 12 December 2016 at 03:11, Igor Grinberg wrote:
dropping the list for this one as the question seems to me irrelevant to
your patch set.
On 12/11
On 12/12/16 10:27, Michal Simek wrote:
> On 12.12.2016 09:24, Igor Grinberg wrote:
>> On 12/12/16 10:02, Michal Simek wrote:
>>> On 12.12.2016 08:13, Nathan Rossi wrote:
On 12 December 2016 at 03:11, Igor Grinberg
wrote:
> dropping the list for this one as the question seems to me i
Using generic wait_for_bit() implementation instead of
using private wait function.
Signed-off-by: Michal Simek
---
drivers/net/zynq_gem.c | 32 +---
1 file changed, 9 insertions(+), 23 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index
The most of ethernet drivers are using this mdio registration sequence.
strcpy(priv->bus->name, "emac");
mdio_register(priv->bus);
Where driver can be used only with one MDIO bus because only unique
name should be used.
Other drivers are using unique device name for MDIO registration to
support mu
wait_for_bit() is missing reset watchdog in case watchdog
is configured.
Signed-off-by: Michal Simek
---
include/wait_bit.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/wait_bit.h b/include/wait_bit.h
index 066e30c118af..06ad43a122d6 100644
--- a/include/wait_bit.h
+++ b/includ
axi_emac, emaclite and gem have the same issue with registering
multiple instances with mdio busses. mdio bus name has to be uniq but
drivers are setting up only one name for all.
Use mdio_register_seq() and pass dev->seq number to allow multiple
mdio instances registration.
Reported-by: Phani Kir
On 12.12.2016 09:54, Igor Grinberg wrote:
> On 12/12/16 10:27, Michal Simek wrote:
>> On 12.12.2016 09:24, Igor Grinberg wrote:
>>> On 12/12/16 10:02, Michal Simek wrote:
On 12.12.2016 08:13, Nathan Rossi wrote:
> On 12 December 2016 at 03:11, Igor Grinberg
> wrote:
>> dropping t
Hi Joe,
On 09 December 2016 18:59, Joe Hershberger wrote:
> On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy
> wrote:
> > This has been tested with a Marvell 88E1512 PHY.
> >
> > Signed-off-by: Phil Edworthy
> > Reviewed-by: Stefan Roese
> > ---
> > v2:
> > Rebased on top of Joe's code to use mac
Hi Tom,
On Monday 28 November 2016 03:04 PM, Lokesh Vutla wrote:
> This series tries to add D-cache support in spl in order to reduce boot time
> either in 2stage boot or Falcon Boot.
I hope there are no further comments on this series. Do you want me to
re post this series or this is good to go?
Hi Joe,
On 12 December 2016 09:25, Phil Edworthy wrote:
> On 09 December 2016 18:59, Joe Hershberger wrote:
> > On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy
> > wrote:
> > > This has been tested with a Marvell 88E1512 PHY.
> > >
> > > Signed-off-by: Phil Edworthy
> > > Reviewed-by: Stefan Roese
On 04.12.2016 17:34, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Add missing L3 cache flush functionality which absence prevents
Linux kernel from normal boot in case the L3 cache is enabled
by ATF.
The L3 cache is named the "last level" cache in order to keep
the terminology similar
On 08.12.2016 11:22, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Align the Armada-8040-db and Armada-7040-db SPI and I2C
DTS settings with latest DB settings:
- 8040-db: disable i2c0 and spi0 on AP (MPPs are reserved for SDIO)
- 8040-db: disable cps_i2c0 on CP1
- 8040-db: enable spi1
Hi Tom,
please pull the patches from Kosta, fixing Linux booting for
Armada 7k/8k and introducing the pinctrl driver for this
platform.
Thanks,
Stefan
The following changes since commit 361a879902a3cbdb692149a1ac580e3199e771ba:
Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-mi
Sorry for the late reply.. had some days off.
>
>> The section header address is a VMA whereas the address found in
>> the program header is a physical one. With this change it is
>> possible to load and start a vx7 intel generic based image.
>>
>> $ readelf -l /tmp/vx7
>>
>> Elf file type is EXEC
On 12/12/16 11:03, Michal Simek wrote:
> On 12.12.2016 09:54, Igor Grinberg wrote:
>> On 12/12/16 10:27, Michal Simek wrote:
>>> On 12.12.2016 09:24, Igor Grinberg wrote:
On 12/12/16 10:02, Michal Simek wrote:
> On 12.12.2016 08:13, Nathan Rossi wrote:
>> On 12 December 2016 at 03:11,
On 12.12.2016 12:10, Igor Grinberg wrote:
> On 12/12/16 11:03, Michal Simek wrote:
>> On 12.12.2016 09:54, Igor Grinberg wrote:
>>> On 12/12/16 10:27, Michal Simek wrote:
On 12.12.2016 09:24, Igor Grinberg wrote:
> On 12/12/16 10:02, Michal Simek wrote:
>> On 12.12.2016 08:13, Nathan R
On 12-12-16 09:18, Michal Simek wrote:
On 12.12.2016 09:05, Igor Grinberg wrote:
On 12/12/16 09:13, Nathan Rossi wrote:
On 12 December 2016 at 03:11, Igor Grinberg wrote:
dropping the list for this one as the question seems to me irrelevant to your
patch set.
On 12/11/16 18:47, Nathan Ross
Hi Joe
On 12 December 2016 10:15, Phil Edworthy wrote:
> On 12 December 2016 09:25, Phil Edworthy wrote:
> > On 09 December 2016 18:59, Joe Hershberger wrote:
> > > On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy
> > > wrote:
> > > > This has been tested with a Marvell 88E1512 PHY.
> > > >
> > > >
These patches add support for the Marvell M88E1512 PHY.
It turns out that it behaves exactly the same as 88E1518, so it's
just a matter of fixing up the uid/mask.
Phil Edworthy (3):
net: phy: Fix mask so that we can identify Marvell 88E1518
net: phy: Add support for Marvell M88E1512
net: ph
The mask for the 88E1510 meant that the 88E1518 code would never be
used.
Signed-off-by: Phil Edworthy
Reviewed-by: Stefan Roese
Acked-by: Joe Hershberger
---
Note: This has only been tested on a board that uses a Marvell 88E1512
PHY, see subsequent patches.
v3:
No changes
v2:
No changes
---
This device also works with the 88E1518 code, so we just adjust
the UID mask accordingly.
Signed-off-by: Phil Edworthy
---
v3:
Correct the mask.
v2:
Don't add a new entry, just adjust the UID mask.
---
drivers/net/phy/marvell.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
di
Signed-off-by: Phil Edworthy
Reviewed-by: Stefan Roese
Acked-by: Joe Hershberger
---
v3:
No changes
v2:
No changes
---
drivers/net/phy/marvell.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 4ddb85d..00d0719
On 12-12-16 08:46, Michal Simek wrote:
Hi Mike,
On 22.11.2016 12:00, Michal Simek wrote:
On 21.11.2016 09:30, Mike Looijmans wrote:
Miami boards can have memory sizes of 256M, 512M or 1GB. To prevent requiring
separate bootloaders for each variant, just detect the RAM size at boot time
instea
On Fri, Dec 09, 2016 at 09:29:01AM -0500, Tom Rini wrote:
> Cover all of the boston and malta variations.
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
U-B
On Tue, Nov 22, 2016 at 05:31:33PM +0100, Patrick Delaunay wrote:
> From: Patrick Delaunay
>
> solve issue when bootstage is used with armV7 generic timer
> first call of timer_get_boot_us() use the function get_timer()
> before timer initialization (arch.timer_rate_hz = 0)
> => div by 0
>
> Co
On Wed, Nov 30, 2016 at 03:01:57PM +0530, Keerthy wrote:
> Enable Linear Physical Address Extension mode which is a
> prerequisite for hypervisor mode.
>
> Signed-off-by: Keerthy
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Wed, Nov 30, 2016 at 03:02:53PM +0530, Keerthy wrote:
> The GPIO7 pad mux should be programmed to POWERHOLD value
> as per board design. In cases where the PMIC is shut off the
> mux is set to GPIO7 mode. So during initialization to be on the
> safer side set the mode to POWERHOLD.
>
> Signed-
On Wed, Nov 30, 2016 at 03:30:49PM -0700, Simon Glass wrote:
> A double underscore is normally reserved for compiler predefines. Use a
> single underscore instead.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
__
On Wed, Nov 30, 2016 at 03:30:50PM -0700, Simon Glass wrote:
> It is useful to name each method so that we can print out this name when
> using the method. Currently this happens using a separate function. In
> preparation for unifying this, add a name to each method.
>
> The name is only availab
On Wed, Nov 30, 2016 at 03:30:51PM -0700, Simon Glass wrote:
> Create a boot_from_devices() function to handle trying each device. This
> helps to reduce the size of the already-large board_init_r() function.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.
On Wed, Nov 30, 2016 at 03:30:52PM -0700, Simon Glass wrote:
> Rather than have this function figure out the correct loader again, pass
> it in as a parameter.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
__
On Wed, Nov 30, 2016 at 03:30:54PM -0700, Simon Glass wrote:
> This function is not used anymore. Drop it.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
On Wed, Nov 30, 2016 at 03:30:53PM -0700, Simon Glass wrote:
> This task can be handled by inline code now. Drop this function.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
__
On Wed, Nov 30, 2016 at 03:30:55PM -0700, Simon Glass wrote:
> This function is not used anymore. Drop it.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
On Wed, Nov 30, 2016 at 03:30:56PM -0700, Simon Glass wrote:
> This function is not used anymore. Drop it.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
On Thu, Dec 01, 2016 at 05:14:18PM +0200, Yehuda Yitschak wrote:
> From: Yehuda Yitschak
>
> Currently the PCI command only allows to see the BAR register
> values but not the size and actual base address.
> This little extension parses the BAR registers and displays
> the base, size and type of
On Mon, Dec 05, 2016 at 07:15:20PM +0100, Fabien Parent wrote:
> A size of 0x200 seems way too short for u-boot. Increase the size
> to 512k.
>
> Signed-off-by: Fabien Parent
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
_
On Mon, Dec 05, 2016 at 07:15:21PM +0100, Fabien Parent wrote:
> The configuration used to error correction was not in line with what
> linux and the ROM code is using. Fix it by using the correct
> configuration. Now u-boot and the SPL are able to read correctly
> anything written by them.
>
> S
On Mon, Dec 05, 2016 at 04:21:25PM -0600, Andrew F. Davis wrote:
> Currently we let U-Boot find a spot at the end of DRAM at runtime, this
> forces us to build an OPTEE image based on the size of DRAM for an EVM.
> Add a default address that works across all current DRA7xx EVMs.
>
> Signed-off-by
On Mon, Dec 05, 2016 at 04:21:26PM -0600, Andrew F. Davis wrote:
> Currently we let U-Boot find a spot at the end of DRAM at runtime, this
> forces us to build an OPTEE image based on the size of DRAM for an EVM.
> Add a default address that works across all current AM57xx EVMs.
>
> Signed-off-by
On Tue, Dec 06, 2016 at 03:45:09PM +0100, Fabien Parent wrote:
> Stop booting legacy uImage and now boot zImage.
>
> Signed-off-by: Fabien Parent
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
__
On Tue, Dec 06, 2016 at 05:17:01PM +0100, Michal Simek wrote:
> The patch is fixing:
> "tools: mkimage: Check if file is regular file"
> (sha1: 56c7e8015509312240b1ee15f2ff74510939a45d)
> which contains two issues reported by Coverity
> Unchecked return value from stat and incorrect calling sequen
On Wed, Dec 07, 2016 at 11:20:40AM -0500, Tom Rini wrote:
> First, there are a number of features in newer QEMU that will allow us
> to test a wider range of platforms, so we want to use at least v2.8.0.
> Second, making use of a PPA for QEMU fails from time to time. So we
> change to checking ou
On Thu, Dec 08, 2016 at 04:48:07PM -0600, Andrew F. Davis wrote:
> When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
> not generated but generate an unsigned one anyway. When TI_SECURE_DEV_PKG
> is exported and the user re-builds, make will detect this file as
> unchangedand a
On Thu, Dec 08, 2016 at 11:56:37PM +0100, Christian Riesch wrote:
> Signed-off-by: Christian Riesch
> Cc: Manfred Rudigier
> Cc: Christoph Rüdisser
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot m
On Fri, Dec 09, 2016 at 12:29:13PM +0200, Jyri Sarha wrote:
> Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
> and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
> the default values LCDC suffers from DMA FIFO underflows and frame
> synchronization lost er
On Mon, Dec 12, 2016 at 11:50:31AM +0100, Christian Gmeiner wrote:
> Sorry for the late reply.. had some days off.
>
> >
> >> The section header address is a VMA whereas the address found in
> >> the program header is a physical one. With this change it is
> >> possible to load and start a vx7 int
On Mon, Dec 12, 2016 at 03:22:50PM +0530, Lokesh Vutla wrote:
> Hi Tom,
>
> On Monday 28 November 2016 03:04 PM, Lokesh Vutla wrote:
> > This series tries to add D-cache support in spl in order to reduce boot time
> > either in 2stage boot or Falcon Boot.
>
> I hope there are no further comments
On Tue, Dec 06, 2016 at 02:15:17PM +, Andre Przywara wrote:
> Hi,
>
> On 06/12/16 11:20, Maxime Ripard wrote:
> > On Mon, Dec 05, 2016 at 01:52:22AM +, Andre Przywara wrote:
> >> From: Jens Kuske
> >>
> >> The A64 DRAM controller is very similar to the H3 one,
> >> so the code can be reus
On Tue, Dec 06, 2016 at 11:21:26AM +, Andre Przywara wrote:
> Hi,
>
> On 06/12/16 10:56, Maxime Ripard wrote:
> > On Mon, Dec 05, 2016 at 01:52:19AM +, Andre Przywara wrote:
> >> To avoid enumerating the very same DRAM values in defconfig files
> >> for each and every Allwinner A64 board o
On Tue, Dec 06, 2016 at 12:22:59PM +, Andre Przywara wrote:
> Hi,
>
> On 06/12/16 11:28, Maxime Ripard wrote:
> > On Mon, Dec 05, 2016 at 01:52:30AM +, Andre Przywara wrote:
> >> When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
> >> use the more compact Thumb2 encodin
Since I leave Samsung by the end of the year, I will not have access to
OneNAND devices anymore.
Hence the custodian position has been marked as "Orphaned".
Signed-off-by: Lukasz Majewski
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINT
Commit 79e86ccb3786c8b20004db3fa10a70049456f580 "vitesse: remove duplicated
argument to ||" correctly removed a redundant check.
However, I believe that the original code was simply wrong, and should have
been checking against RGMII_ID.
To fix this and avoid similar problems in the future, use th
On Fri, Dec 09, 2016 at 03:39:34PM -0600, Andrew F. Davis wrote:
> On 12/09/2016 03:30 PM, Tom Rini wrote:
> > On Fri, Dec 09, 2016 at 02:24:32PM -0600, Andrew F. Davis wrote:
> >> On 12/09/2016 02:10 PM, Tom Rini wrote:
> >>> On Fri, Dec 09, 2016 at 02:05:29PM -0600, Andrew F. Davis wrote:
>
On Sun, Dec 11, 2016 at 07:25:21PM -0500, FrostyBytes wrote:
> I found that the latest U-Boot cannot handle filesystems generated by
> genext2fs. Attempts to list such a filesystem results in divide by zero.
>
> Using git bisect with a test script, I got:
>
> f798b1dda1c5de818b806189e523d1b75db
On Mon, Dec 12, 2016 at 09:58:23AM +0100, Michal Simek wrote:
> wait_for_bit() is missing reset watchdog in case watchdog
> is configured.
>
> Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
_
On Sun, Dec 11, 2016 at 06:04:19PM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
> Please pull some updates for v2017.01-rc2, thanks!
> - DT sync with Linux
> - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
> - Minor fixes
>
> The following changes since commit 361a879902a3cbdb692149a1ac580e3199e771ba:
On Mon, Dec 12, 2016 at 11:47:45AM +0100, Stefan Roese wrote:
> Hi Tom,
>
> please pull the patches from Kosta, fixing Linux booting for
> Armada 7k/8k and introducing the pinctrl driver for this
> platform.
>
> Thanks,
> Stefan
>
>
> The following changes since commit 361a879902a3cbdb692149a1
On Mon, Dec 12, 2016 at 04:18:30PM +0100, Lukasz Majewski wrote:
> Since I leave Samsung by the end of the year, I will not have access to
> OneNAND devices anymore.
>
> Hence the custodian position has been marked as "Orphaned".
>
> Signed-off-by: Lukasz Majewski
Best of luck and thanks for y
Hi,
On 12/12/16 15:13, Maxime Ripard wrote:
> On Tue, Dec 06, 2016 at 12:22:59PM +, Andre Przywara wrote:
>> Hi,
>>
>> On 06/12/16 11:28, Maxime Ripard wrote:
>>> On Mon, Dec 05, 2016 at 01:52:30AM +, Andre Przywara wrote:
When compiling the SPL for the Allwinner A64 in AArch64 mode,
Hi,
On 12/12/16 12:29, Maxime Ripard wrote:
> On Tue, Dec 06, 2016 at 02:15:17PM +, Andre Przywara wrote:
>> Hi,
>>
>> On 06/12/16 11:20, Maxime Ripard wrote:
>>> On Mon, Dec 05, 2016 at 01:52:22AM +, Andre Przywara wrote:
From: Jens Kuske
The A64 DRAM controller is very si
Despite I leave Samsung by the end of the year, I'm going to maintain DFU
in u-boot.
Signed-off-by: Lukasz Majewski
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 53603d1..c2085ca 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -
On Tue, Dec 13, 2016 at 12:04 AM, Andre Przywara wrote:
> Hi,
>
> On 12/12/16 15:13, Maxime Ripard wrote:
>> On Tue, Dec 06, 2016 at 12:22:59PM +, Andre Przywara wrote:
>>> Hi,
>>>
>>> On 06/12/16 11:28, Maxime Ripard wrote:
On Mon, Dec 05, 2016 at 01:52:30AM +, Andre Przywara wrote:
Hi,
On 12/12/16 16:18, Chen-Yu Tsai wrote:
> On Tue, Dec 13, 2016 at 12:04 AM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 12/12/16 15:13, Maxime Ripard wrote:
>>> On Tue, Dec 06, 2016 at 12:22:59PM +, Andre Przywara wrote:
Hi,
On 06/12/16 11:28, Maxime Ripard wrote:
> On Mon,
By adding labels to the cpu nodes in the dtsi, a dts that
includes it can change the OPPs by referencing the cpu0
through the label.
[Based on linux (400b6a0cbef55d1ae32808eaa1ef1c28820bf6ac)]
Signed-off-by: Moritz Fischer
Cc: Michal Simek
Cc: u-boot@lists.denx.de
---
Hi Michal,
I thought I've
By adding labels to the cpu nodes in the dtsi, a dts that
includes it can change the OPPs by referencing the cpu0
through the label.
[Based on linux (400b6a0cbef55d1ae32808eaa1ef1c28820bf6ac)]
Signed-off-by: Moritz Fischer
Cc: Michal Simek
Cc: u-boot@lists.denx.de
---
Ok, since I fatfingered v1
Hi Simon,
>
> On 9 December 2016 at 18:12, Rick Bronson wrote:
> > Hi All,
> >
> > How do I enable a particular regulator upon boot? I have two
> > identically set LDO entries:
> >
> > vccio_en: LDO_REG1 {
> > regulator-always-on;
> >
On 12/04/2016 05:52 PM, Stefan Brüns wrote:
The runner actually has no console dependency, only on the log provided
by the console. Accept both u_boot_console or a multiplexed_log.
Either this approach or updating all callers to always pass the log
object is fine by me. So if you need it,
Ac
On 12/11/2016 02:58 PM, Stefan Brüns wrote:
From: Stefan Brüns
The runner actually has no console dependency, only on the log provided
by the console.
Acked-by: Stephen Warren
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailm
On Mon, Dec 12, 2016 at 05:07:07PM +0100, Lukasz Majewski wrote:
> Despite I leave Samsung by the end of the year, I'm going to maintain DFU
> in u-boot.
>
> Signed-off-by: Lukasz Majewski
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
On 12/04/2016 05:52 PM, Stefan Brüns wrote:
From: Stefan Brüns
The following checks are currently implemented:
1. listing a directory
2. verifying size of a file
3. veryfying md5sum for a file region
4. reading the beginning of a file
General comments:
1) I don't see anywhere that limits th
On Sonntag, 11. Dezember 2016 19:25:21 CET FrostyBytes wrote:
> I found that the latest U-Boot cannot handle filesystems generated by
> genext2fs. Attempts to list such a filesystem results in divide by zero.
>
> Using git bisect with a test script, I got:
>
> f798b1dda1c5de818b806189e523d1b75db7
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
arch/arm/dts/fsl-ls1012a.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 024527e..c4ca9c1 100644
---
From: Minghuan Lian
There may be multiple PCIe controllers in a SoC.
It is not correct that always calling pci_bus_to_hose(0) to get
the first PCIe controller for the PCIe device connected other
controllers. We just remove this calling because hose always point
the correct PCIe controller.
Signe
From: Minghuan Lian
for the legacy PCI driver, the function pci_bus_to_hose() returns
the real PCIe controller. To keep consistency, this function is
changed to return the PCIe controller pointer of the root bus
instead of the current PCIe bus.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zh
From: Hou Zhiqiang
Enable DT to support Driver Model.
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
configs/ls1021aqds_nand_defconfig | 3 +++
configs/ls1021aqds_nor_SECURE_BOOT_defconfig| 2 ++
configs/ls1021atwr_nor_SECURE_BOOT_defconfig| 2 ++
configs/l
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
arch/arm/dts/ls1021a.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 37be169..c40d87c 100644
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
arch/arm/dts/fsl-ls1043a.dtsi | 46 +++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
arch/arm/dts/fsl-ls2080a.dtsi | 60 +++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
arch/arm/dts/fsl-ls1046a.dtsi | 49 +++
1 file changed, 49 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index
From: Hou Zhiqiang
To make the layerscape pcie driver clear, move the kernel DT fixup
code from pcie_layerscape.c to pcie_layerscape_fixup.c.
Signed-off-by: Hou Zhiqiang
---
V5:
- New patch
drivers/pci/Makefile| 1 +
drivers/pci/pcie_layerscape.c | 314 +--
From: Minghuan Lian
There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid too many macro definitions, the patch addes a new
implementation of PCIe driver based on DM. PCIe dts node is
used to describe the differe
From: Minghuan Lian
The patch enables PCIe and E1000 in ls1043a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
configs/ls1043aqds_defconfig | 7 ++-
configs/ls1043aqds_lpuart_defconfig
From: Minghuan Lian
The patch enables PCIe in ls1021a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
configs/ls1021aiot_qspi_defconfig | 4
configs/ls1021aiot_sdcard_defconfig
From: Minghuan Lian
The patch enables PCIe and E1000 in ls1012a defconfigs and
removes unused PCIe related macro defines
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
configs/ls1012afrdm_qspi_defconfig | 5 +
configs/ls1012aqds_qspi_defconfig | 5 -
From: Minghuan Lian
The patch enables PCIe and E1000 in ls1046a related defconfigs.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
configs/ls1046aqds_defconfig | 6 ++
configs/ls1046aqds_nand_defconfig| 6 ++
configs/ls1046aqds_qspi_
From: Minghuan Lian
The patch enables PCIe in ls2080a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 8
configs/ls2080aqds_SECURE_BOOT_defco
From: Minghuan Lian
All Layerscape SoCs have supported new PCIe driver based on DM.
The lagecy PCIe driver code is unused and can be removed.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
Reviewed-by: Simon Glass
---
V5:
- No change
drivers/pci/pcie_layerscape.c | 497
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V5:
- No change
arch/arm/cpu/armv7/ls102xa/Kconfig| 8
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 11 +++
drivers/pci/pcie_layerscape_fixup.c | 8
include/configs/ls1012aqds.h | 1 -
in
Isp-camera preview image will be broken when dual screen display mode.
This patch set isp/vop qos level higher to solve this problem.
We have verified this patch on rk3288-miniarm board.
Signed-off-by: Nickey Yang
---
arch/arm/include/asm/arch-rockchip/qos_rk3288.h | 26 +
On Tue, Dec 13, 2016 at 2:54 PM, Zhiqiang Hou wrote:
> From: Minghuan Lian
>
> for the legacy PCI driver, the function pci_bus_to_hose() returns
> the real PCIe controller. To keep consistency, this function is
> changed to return the PCIe controller pointer of the root bus
> instead of the curre
On Tue, Dec 13, 2016 at 2:54 PM, Zhiqiang Hou wrote:
> From: Minghuan Lian
>
> There may be multiple PCIe controllers in a SoC.
> It is not correct that always calling pci_bus_to_hose(0) to get
> the first PCIe controller for the PCIe device connected other
> controllers. We just remove this call
98 matches
Mail list logo
