On Mon, Dec 05, 2016 at 10:33:35PM +0100, Jagan Teki wrote:
> Hi Maxime,
>
> On Sun, Dec 4, 2016 at 8:19 AM, Jagan Teki wrote:
> > On Tue, Nov 22, 2016 at 6:08 PM, Maxime Ripard
> > wrote:
> >> The CHIP Pro is a SoM made by NextThing Co, and that embeds a GR8 SIP, an
> >> AXP209 PMIC, a WiFi BT
From: Hou Zhiqiang
This patch adds a simple pmic driver for the mc34vr500 pmic which
is used in conjunction with the fsl T1 and LS1 series SoC.
Signed-off-by: Hou Zhiqiang
---
drivers/power/pmic/Kconfig | 7 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/pmic_mc3
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
board/freescale/common/Makefile| 1 +
board/freescale/common/mc34vr500.c | 95 ++
include/power/mc34vr500_pmic.h | 9
3 files changed, 105 insertions(+)
create mode 100644 board/freescale/comm
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
board/freescale/ls1046ardb/cpld.c | 9 +
board/freescale/ls1046ardb/cpld.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/board/freescale/ls1046ardb/cpld.c
b/board/freescale/ls1046ardb/cpld.c
index 81a646e..c0500f4 100644
--- a
From: Hou Zhiqiang
Set up chip power supply voltage according to voltage ID.
The fuse status register provides the values from on-chip
voltage ID fuses programmed at the factory. These values
define the voltage requirements for the chip.
Main operations:
1. Set up the core voltage
2. Set up the
From: Hou Zhiqiang
Add the chip power supply voltage initialization on LS1046ARDB.
Add function power_init_board(), and it will initialize the
PMIC and call the chip power initialization function.
Signed-off-by: Hou Zhiqiang
---
arch/arm/Kconfig| 1 +
board/freescale/l
Hi Joe,
> -Original Message-
> From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
> Sent: Thursday, December 08, 2016 8:05 PM
> To: Alexey Brodkin
> Cc: john.haech...@microsemi.com; u-boot@lists.denx.de; joe.hershber...@ni.com
> Subject: Re: [U-Boot] [PATCH 1/1] Adding MSCC
> PHY-V
On Rab, 2016-12-07 at 14:54 +0100, Marek Vasut wrote:
> On 12/07/2016 11:57 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut wrote:
> > >
> > > On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > These cha
On Rab, 2016-12-07 at 14:57 +0100, Marek Vasut wrote:
> On 12/07/2016 12:21 PM, Chee, Tien Fong wrote:
> >
> > On Sel, 2016-12-06 at 13:51 +0100, Marek Vasut wrote:
> > >
> > > On 12/06/2016 09:07 AM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Signed-of
On Rab, 2016-12-07 at 14:58 +0100, Marek Vasut wrote:
> On 12/07/2016 12:58 PM, Chee, Tien Fong wrote:
> >
> > On Sel, 2016-12-06 at 13:55 +0100, Marek Vasut wrote:
> > >
> > > On 12/06/2016 09:08 AM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Drivers f
Hi, york
Because the other patch [patch v6 2/2 ] in this set depends on the format of
MSI node which is not yet ready to upstream.
I planed to send them together.
Do you have any idea?
Best Regards
Wenbin Song
> -Original Message-
> From: york sun
> Sent: Friday, December 09, 20
On 12/08/2016 07:51 PM, Rick Altherr wrote:
> In 35fc84f, bootm was refactored so plain 'bootm' and
> 'bootm ' shared a common implementation.
> The 'bootm ramdisk' command implementation is now part of the common
> implementation but not invoke by plain 'bootm' since the original
> implementation
The mask for the 88E1510 meant that the 88E1518 code would never be
used.
Signed-off-by: Phil Edworthy
---
Note: This has only been tested on a board that uses a Marvell 88E1512
PHY, see subsequent patches.
---
drivers/net/phy/marvell.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
These patches add support for the Marvell M88E1512 PHY.
Phil Edworthy (5):
net: phy: Fix mask so that we can identify Marvell 88E1518
net: phy: Add support for Marvell M88E1512
net: phy: Marvell 88E151x: Add support for RGMII
net: phy: Marvell 88E151x: Increase delay after init
net: phy:
Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
the default values LCDC suffers from DMA FIFO underflows and frame
synchronization lost errors. The initialization values are the highest
that work flawlessly
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 06029c0..a7ea435 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -560,6 +560,16 @@ stat
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 48ebb50..dc1d25f 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -177,10 +177,7
On Marvell 88E1512, the delay is not enough when connected
to some external switches (e.g. Netgear GS108E).
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 8
This has been tested with a Marvell 88E1512 PHY.
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index a7ea435..8214760 100644
--- a/drivers/net/ph
There is code that is specifically for RGMII_TXID interface, but this
will never get used because the code checks that the RGMII interface
is RGMII_ID to RGMII_RXID; RGMII_TXID is after this.
To fix this and avoid similar problems in the future, use the
phy_interface_is_rgmii helper function.
Sig
On Fri, Dec 09, 2016 at 07:34:05AM +0100, Michal Simek wrote:
> Hi Tom,
>
> On 8.12.2016 17:04, Tom Rini wrote:
> > On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
> >
> >> Hi Tom,
> >>
> >> here are some patches I have collected for Xilinx devices, one miiphy
> >> patch and SCSI ch
On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
> Hi Tom,
>
> here are some patches I have collected for Xilinx devices, one miiphy
> patch and SCSI changes I have made.
>
> Simon: I have sent v4 of DM_SCSI + ceva sata driver moved to DM which
> should go through your tree because y
On Thu, Dec 08, 2016 at 10:37:26AM -0600, Joe Hershberger wrote:
> Hi Tom,
>
> The following changes since commit 388019f1e2166638453bc4e0cc5d138c2a19e0c9:
>
> Merge branch 'master' of git://git.denx.de/u-boot-usb (2016-12-06 08:07:20
> -0500)
>
> are available in the git repository at:
>
>
>
On Fri, Dec 09, 2016 at 12:29:13PM +0200, Jyri Sarha wrote:
> Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
> and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
> the default values LCDC suffers from DMA FIFO underflows and frame
> synchronization lost er
On 09.12.2016 11:40, Phil Edworthy wrote:
The mask for the 88E1510 meant that the 88E1518 code would never be
used.
Signed-off-by: Phil Edworthy
---
Note: This has only been tested on a board that uses a Marvell 88E1512
PHY, see subsequent patches.
---
drivers/net/phy/marvell.c | 4 ++--
1 fil
On 09.12.2016 11:40, Phil Edworthy wrote:
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 06029c0..a7ea435 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers
On 09.12.2016 11:41, Phil Edworthy wrote:
This has been tested with a Marvell 88E1512 PHY.
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index
On 09.12.2016 11:41, Phil Edworthy wrote:
On Marvell 88E1512, the delay is not enough when connected
to some external switches (e.g. Netgear GS108E).
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/m
On 09.12.2016 11:41, Phil Edworthy wrote:
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 48ebb50..dc1d25f 100644
--- a/drivers/net/phy/marvell.c
+++ b/
On Thu, Dec 08, 2016 at 04:04:28PM -0600, Andrew F. Davis wrote:
> Signed-off-by: Andrew F. Davis
> ---
> Kconfig | 2 ++
> disk/Kconfig | 11 +++
> include/config_defaults.h | 1 -
> 3 files changed, 13 insertions(+), 1 deletion(-)
> create mode 100644
2016-12-09 8:29 GMT+09:00 Jaehoon Chung :
> On 12/07/2016 10:10 PM, Masahiro Yamada wrote:
>> Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created
>> a Kconfig entry for this option without any actual moves, then
>> commit 44c798799f66 ("sunxi: Use Kconfig CONFIG_MMC") moved
>> instances
Hi Stefan,
On 09 December 2016 12:16, Stefan Roese wrote:
> On 09.12.2016 11:40, Phil Edworthy wrote:
> > Signed-off-by: Phil Edworthy
> > ---
> > drivers/net/phy/marvell.c | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/mar
Hi Stefan,
On 09 December 2016 12:19, Stefan Roese wrote:
> On 09.12.2016 11:41, Phil Edworthy wrote:
> > This has been tested with a Marvell 88E1512 PHY.
> >
> > Signed-off-by: Phil Edworthy
> > ---
> > drivers/net/phy/marvell.c | 14 ++
> > 1 file changed, 10 insertions(+), 4 delet
Hi Phil,
On 09.12.2016 13:38, Phil Edworthy wrote:
On 09 December 2016 12:16, Stefan Roese wrote:
On 09.12.2016 11:40, Phil Edworthy wrote:
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/
Hi Tom,
On 9.12.2016 13:11, Tom Rini wrote:
> On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
>> Hi Tom,
>>
>> here are some patches I have collected for Xilinx devices, one miiphy
>> patch and SCSI changes I have made.
>>
>> Simon: I have sent v4 of DM_SCSI + ceva sata driver moved
On Fri, Dec 09, 2016 at 01:54:30PM +0100, Michal Simek wrote:
> Hi Tom,
>
> On 9.12.2016 13:11, Tom Rini wrote:
> > On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
> >> Hi Tom,
> >>
> >> here are some patches I have collected for Xilinx devices, one miiphy
> >> patch and SCSI changes
On 12/09/2016 11:04 AM, Chee, Tien Fong wrote:
> On Rab, 2016-12-07 at 14:58 +0100, Marek Vasut wrote:
>> On 12/07/2016 12:58 PM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2016-12-06 at 13:55 +0100, Marek Vasut wrote:
On 12/06/2016 09:08 AM, Chee Tien Fong wrote:
>
>
> From: Tien
On 12/09/2016 10:55 AM, Chee, Tien Fong wrote:
> On Rab, 2016-12-07 at 14:57 +0100, Marek Vasut wrote:
>> On 12/07/2016 12:21 PM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2016-12-06 at 13:51 +0100, Marek Vasut wrote:
On 12/06/2016 09:07 AM, Chee Tien Fong wrote:
>
>
> From: Tien
On 12/09/2016 10:46 AM, Chee, Tien Fong wrote:
> On Rab, 2016-12-07 at 14:54 +0100, Marek Vasut wrote:
>> On 12/07/2016 11:57 AM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut wrote:
On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
>
>
> From: Tien
Hi Joe,
On 02 December 2016 05:50, Joe Hershberger wrote:
> On 01.12.2016 18:08, Joe Hershberger wrote:
> > Use some constants for the phy configuration instead of so many magic
> > numbers.
> >
> > Signed-off-by: Joe Hershberger
> > ---
> >
> > drivers/net/phy/marvell.c | 47 +++
These patches add support for the Marvell M88E1512 PHY.
Phil Edworthy (5):
net: phy: Fix mask so that we can identify Marvell 88E1518
net: phy: Add support for Marvell M88E1512
net: phy: Marvell 88E151x: Add support for RGMII
net: phy: Marvell 88E151x: Increase delay after init
net: phy:
The mask for the 88E1510 meant that the 88E1518 code would never be
used.
Signed-off-by: Phil Edworthy
Reviewed-by: Stefan Roese
---
Note: This has only been tested on a board that uses a Marvell 88E1512
PHY, see subsequent patches.
v2:
No changes
---
drivers/net/phy/marvell.c | 4 ++--
1 fil
This device also works with the 88E1518 code, so we just adjust
the UID mask accordingly.
Signed-off-by: Phil Edworthy
---
v2:
Don't add a new entry, just adjust the UID mask.
---
drivers/net/phy/marvell.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/
On Marvell 88E1512, the delay is not enough when connected
to some external switches (e.g. Netgear GS108E).
Signed-off-by: Phil Edworthy
Reviewed-by: Stefan Roese
---
v2:
No changes
---
drivers/net/phy/marvell.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ph
This has been tested with a Marvell 88E1512 PHY.
Signed-off-by: Phil Edworthy
Reviewed-by: Stefan Roese
---
v2:
Rebased on top of Joe's code to use macros
---
drivers/net/phy/marvell.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvel
Signed-off-by: Phil Edworthy
Reviewed-by: Stefan Roese
---
v2:
No changes
---
drivers/net/phy/marvell.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index b6c005f..f640a81 100644
--- a/drivers/net/phy/marvell.c
+++
On 09.12.2016 14:38, Phil Edworthy wrote:
This device also works with the 88E1518 code, so we just adjust
the UID mask accordingly.
Signed-off-by: Phil Edworthy
---
v2:
Don't add a new entry, just adjust the UID mask.
---
drivers/net/phy/marvell.c | 6 +-
1 file changed, 5 insertions(+),
Earlier timer driver needed a clock-frequency property in compatible
device-tree nodes. Another way is to reference a clock via a phandle.
So now timer_pre_probe tries to get clock by reference through device
tree. In case it is impossible to get clock device through the
reference, clock-frequency
On Thu, Dec 08, 2016 at 02:22:51PM +1100, Joel Stanley wrote:
> Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set
> CONFIG_SYS_TEXT_BASE=0 with the following error:
>
> LD u-boot
> arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try
> linking with
Cover all of the boston and malta variations.
Signed-off-by: Tom Rini
---
board/imgtec/boston/MAINTAINERS | 5 -
board/imgtec/malta/MAINTAINERS | 2 ++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
index 30dd4
On Wed, Dec 07, 2016 at 05:46:14PM +0100, Daniel Schwierzeck wrote:
>
>
> Am 07.12.2016 um 17:20 schrieb Tom Rini:
> > First, there are a number of features in newer QEMU that will allow us
> > to test a wider range of platforms, so we want to use at least v2.8.0.
> > Second, making use of a PPA
As long as the memory mapped size specifeid in the DT is the same or
bigger than the device size, it will work. So do not force the sizes
to be identical.
Signed-off-by: Phil Edworthy
---
drivers/mtd/spi/spi_flash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/
On 12/09/2016 06:27 AM, Tom Rini wrote:
> On Thu, Dec 08, 2016 at 04:04:28PM -0600, Andrew F. Davis wrote:
>
>> Signed-off-by: Andrew F. Davis
>> ---
>> Kconfig | 2 ++
>> disk/Kconfig | 11 +++
>> include/config_defaults.h | 1 -
>> 3 files changed, 13 i
On 12/09/2016 01:58 AM, Wenbin Song wrote:
> Hi, york
>
> Because the other patch [patch v6 2/2 ] in this set depends on the format of
> MSI node which is not yet ready to upstream.
> I planed to send them together.
OK.
York
___
U-Boot mailing list
Hi Tom,
On Fri, Dec 9, 2016 at 6:12 AM, Tom Rini wrote:
> On Thu, Dec 08, 2016 at 10:37:26AM -0600, Joe Hershberger wrote:
>
>> Hi Tom,
>>
>> The following changes since commit 388019f1e2166638453bc4e0cc5d138c2a19e0c9:
>>
>> Merge branch 'master' of git://git.denx.de/u-boot-usb (2016-12-06 08:0
Hi Alexey,
On Fri, Dec 9, 2016 at 3:06 AM, Alexey Brodkin
wrote:
> Hi Joe,
>
>> -Original Message-
>> From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
>> Sent: Thursday, December 08, 2016 8:05 PM
>> To: Alexey Brodkin
>> Cc: john.haech...@microsemi.com; u-boot@lists.denx.de; joe.
Hello,
I'm seeking advice on debugging on what is happening when I use the PL330
DMA controller to transfer zero's to the SDRAM and the effect of memory
barriers.
Here are my current observations:
1) With commit "a78cd8613204 ARM: Rework and correct barrier definitions",
the correct memory ba
From: Dinh Nguyen
Adopted from the Linux kernel PL330 DMA driver.
Signed-off-by: Dinh Nguyen
---
v2: Add Kconfig CONFIG_PL330_DMA entry
---
arch/arm/include/asm/pl330.h | 105 +
drivers/dma/Kconfig | 4 +
drivers/dma/Makefile | 1 +
drivers/dma/pl330.c | 942 +
In order for SDRAM ECC to work correctly, the SDRAM needs to get zero'd which
enables the ECC bit. By using the PL330 DMA to fill the SDRAM with zeroes,
the operation is completed in ~1.2 seconds, versus ~14 seconds with a memset.
Signed-off-by: Dinh Nguyen
---
v2: explanation for size of pl330_b
Add additional defines for the reset manager for different reset status bits.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
b/arch/ar
Hi Joe,
2016-12-09 17:22 GMT+01:00 Joe Hershberger :
> Hi Tom,
>
> On Fri, Dec 9, 2016 at 6:12 AM, Tom Rini wrote:
> > On Thu, Dec 08, 2016 at 10:37:26AM -0600, Joe Hershberger wrote:
> >
> >> Hi Tom,
> >>
> >> The following changes since commit 388019f1e2166638453bc4e0cc5d13
> 8c2a19e0c9:
> >>
Use some constants for the phy configuration instead of so many magic
numbers.
Signed-off-by: Joe Hershberger
---
Changes in v2:
-Fixed changed name from last-minute checkpatch line-length change
drivers/net/phy/marvell.c | 47 ---
1 file changed, 36
On Fri, Dec 2, 2016 at 4:12 AM, Olliver Schinagl wrote:
> Hey Joe,
>
>
>
> On 30-11-16 21:00, Joe Hershberger wrote:
>>
>> On Fri, Nov 25, 2016 at 9:30 AM, Olliver Schinagl
>> wrote:
>>>
>>> This patch allows Kconfig to enable and set parameters to make it
>>> possible to read the MAC address fro
Hi Jagan,
On Mon, Dec 5, 2016 at 5:00 PM, Jagan Teki wrote:
> From: Jagan Teki
>
> This patch add driver model support for fec_mxc driver.
>
> Cc: Simon Glass
> Cc: Joe Hershberger
> Cc: Peng Fan
> Cc: Stefano Babic
> Cc: Michael Trimarchi
> Signed-off-by: Jagan Teki
> ---
> Changes for v3
Hi Phil,
On Fri, Dec 9, 2016 at 4:46 AM, Phil Edworthy wrote:
> There is code that is specifically for RGMII_TXID interface, but this
> will never get used because the code checks that the RGMII interface
> is RGMII_ID to RGMII_RXID; RGMII_TXID is after this.
>
> To fix this and avoid similar pro
On Fri, Dec 9, 2016 at 11:43 AM, Michal Simek wrote:
> Hi Joe,
>
> 2016-12-09 17:22 GMT+01:00 Joe Hershberger :
>>
>> Hi Tom,
>>
>> On Fri, Dec 9, 2016 at 6:12 AM, Tom Rini wrote:
>> > On Thu, Dec 08, 2016 at 10:37:26AM -0600, Joe Hershberger wrote:
>> >
>> >> Hi Tom,
>> >>
>> >> The following ch
On Fri, Dec 9, 2016 at 12:39 AM, Michal Simek wrote:
> The most of ethernet drivers are using this mdio registration sequence.
> strcpy(priv->bus->name, "emac");
> mdio_register(priv->bus);
> Where driver can be used only with one MDIO bus because only unique
> name should be used.
>
> Other drive
On Fri, Dec 9, 2016 at 12:39 AM, Michal Simek wrote:
> axi_emac, emaclite and gem have the same issue with registering
> multiple instances with mdio busses. mdio bus name has to be uniq but
> drivers are setting up only one name for all.
> Use mdio_register_seq() and pass dev->seq number to allow
On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy wrote:
> On Marvell 88E1512, the delay is not enough when connected
> to some external switches (e.g. Netgear GS108E).
>
> Signed-off-by: Phil Edworthy
> Reviewed-by: Stefan Roese
Acked-by: Joe Hershberger
__
On Fri, Dec 09, 2016 at 12:35:59PM -0600, Joe Hershberger wrote:
> On Fri, Dec 9, 2016 at 11:43 AM, Michal Simek wrote:
> > Hi Joe,
> >
> > 2016-12-09 17:22 GMT+01:00 Joe Hershberger :
> >>
> >> Hi Tom,
> >>
> >> On Fri, Dec 9, 2016 at 6:12 AM, Tom Rini wrote:
> >> > On Thu, Dec 08, 2016 at 10:37
On Fri, Dec 9, 2016 at 12:54 PM, Joe Hershberger
wrote:
> On Fri, Dec 9, 2016 at 6:41 AM, Stefan Roese wrote:
>> Hi Phil,
>>
>>
>> On 09.12.2016 13:38, Phil Edworthy wrote:
>>>
>>> On 09 December 2016 12:16, Stefan Roese wrote:
On 09.12.2016 11:40, Phil Edworthy wrote:
>
> Signe
On Fri, Dec 9, 2016 at 7:43 AM, Stefan Roese wrote:
> On 09.12.2016 14:38, Phil Edworthy wrote:
>>
>> This device also works with the 88E1518 code, so we just adjust
>> the UID mask accordingly.
>>
>> Signed-off-by: Phil Edworthy
>> ---
>> v2:
>> Don't add a new entry, just adjust the UID mask.
On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy wrote:
> Signed-off-by: Phil Edworthy
> Reviewed-by: Stefan Roese
Acked-by: Joe Hershberger
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On Fri, Dec 9, 2016 at 4:41 AM, Phil Edworthy wrote:
> Signed-off-by: Phil Edworthy
Acked-by: Joe Hershberger
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On Thu, Dec 08, 2016 at 04:48:07PM -0600, Andrew F. Davis wrote:
> When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
> not generated but generate an unsigned one anyway. When TI_SECURE_DEV_PKG
> is exported and the user re-builds, make will detect this file as
> unchangedand a
On 12/09/2016 01:59 PM, Tom Rini wrote:
> On Thu, Dec 08, 2016 at 04:48:07PM -0600, Andrew F. Davis wrote:
>
>> When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
>> not generated but generate an unsigned one anyway. When TI_SECURE_DEV_PKG
>> is exported and the user re-builds,
On Fri, Dec 9, 2016 at 4:41 AM, Phil Edworthy wrote:
> On Marvell 88E1512, the delay is not enough when connected
> to some external switches (e.g. Netgear GS108E).
>
> Signed-off-by: Phil Edworthy
Acked-by: Joe Hershberger
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Hi Phil,
On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy wrote:
> This has been tested with a Marvell 88E1512 PHY.
>
> Signed-off-by: Phil Edworthy
> Reviewed-by: Stefan Roese
> ---
> v2:
> Rebased on top of Joe's code to use macros
> ---
> drivers/net/phy/marvell.c | 17 +
> 1
Hi Joe,
2016-12-09 19:35 GMT+01:00 Joe Hershberger :
> On Fri, Dec 9, 2016 at 11:43 AM, Michal Simek wrote:
> > Hi Joe,
> >
> > 2016-12-09 17:22 GMT+01:00 Joe Hershberger :
> >>
> >> Hi Tom,
> >>
> >> On Fri, Dec 9, 2016 at 6:12 AM, Tom Rini wrote:
> >> > On Thu, Dec 08, 2016 at 10:37:26AM -060
On Fri, Dec 9, 2016 at 7:38 AM, Phil Edworthy wrote:
> The mask for the 88E1510 meant that the 88E1518 code would never be
> used.
>
> Signed-off-by: Phil Edworthy
> Reviewed-by: Stefan Roese
Acked-by: Joe Hershberger
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On Fri, Dec 09, 2016 at 02:05:29PM -0600, Andrew F. Davis wrote:
> On 12/09/2016 01:59 PM, Tom Rini wrote:
> > On Thu, Dec 08, 2016 at 04:48:07PM -0600, Andrew F. Davis wrote:
> >
> >> When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
> >> not generated but generate an unsigne
On 12/09/2016 02:10 PM, Tom Rini wrote:
> On Fri, Dec 09, 2016 at 02:05:29PM -0600, Andrew F. Davis wrote:
>> On 12/09/2016 01:59 PM, Tom Rini wrote:
>>> On Thu, Dec 08, 2016 at 04:48:07PM -0600, Andrew F. Davis wrote:
>>>
When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
On Fri, Dec 9, 2016 at 6:13 AM, Stefan Roese wrote:
> On 09.12.2016 11:40, Phil Edworthy wrote:
>>
>> The mask for the 88E1510 meant that the 88E1518 code would never be
>> used.
>>
>> Signed-off-by: Phil Edworthy
Acked-by: Joe Hershberger
___
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On Fri, Dec 9, 2016 at 6:41 AM, Stefan Roese wrote:
> Hi Phil,
>
>
> On 09.12.2016 13:38, Phil Edworthy wrote:
>>
>> On 09 December 2016 12:16, Stefan Roese wrote:
>>>
>>> On 09.12.2016 11:40, Phil Edworthy wrote:
Signed-off-by: Phil Edworthy
---
drivers/net/phy/marvell.c | 1
On Fri, Dec 09, 2016 at 02:24:32PM -0600, Andrew F. Davis wrote:
> On 12/09/2016 02:10 PM, Tom Rini wrote:
> > On Fri, Dec 09, 2016 at 02:05:29PM -0600, Andrew F. Davis wrote:
> >> On 12/09/2016 01:59 PM, Tom Rini wrote:
> >>> On Thu, Dec 08, 2016 at 04:48:07PM -0600, Andrew F. Davis wrote:
> >>>
>
On 12/09/2016 03:30 PM, Tom Rini wrote:
> On Fri, Dec 09, 2016 at 02:24:32PM -0600, Andrew F. Davis wrote:
>> On 12/09/2016 02:10 PM, Tom Rini wrote:
>>> On Fri, Dec 09, 2016 at 02:05:29PM -0600, Andrew F. Davis wrote:
On 12/09/2016 01:59 PM, Tom Rini wrote:
> On Thu, Dec 08, 2016 at 04:48
On Dec 9, 2016 7:22 PM, "Joe Hershberger" wrote:
Hi Jagan,
On Mon, Dec 5, 2016 at 5:00 PM, Jagan Teki wrote:
> From: Jagan Teki
>
> This patch add driver model support for fec_mxc driver.
>
> Cc: Simon Glass
> Cc: Joe Hershberger
> Cc: Peng Fan
> Cc: Stefano Babic
> Cc: Michael Trimarchi
net:phy:MSCC Add Support for VSC8530-VSC8531-VSC8540-VSC8541
Signed-off-by: John Haechten
---
drivers/net/phy/Makefile| 1 +
drivers/net/phy/mscc.c | 509
drivers/net/phy/phy.c | 3 +
include/config_phylib_all_drive
Hi All,
How do I enable a particular regulator upon boot? I have two
identically set LDO entries:
vccio_en: LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-m
Hello All,
I am currently deciphering post_code ouput on a machine running Yocto with a
bios of coreboot with a payload of SeaBIOS and another (i think) u-boot, in
searching online for one of the post_code values I stumbled on a post
(http://lists.denx.de/pipermail/u-boot/2016-January/241577.h
net:phy:MSCC Add Support for VSC8530-VSC8531-VSC8540-VSC8541
Signed-off-by: John Haechten
---
drivers/net/phy/Makefile| 1 +
drivers/net/phy/mscc.c | 509
drivers/net/phy/phy.c | 3 +
include/config_phylib_all_drive
This is a user configurable option, but "select BLK" forces users to
enable it.
Even with this commit, BLK is still enabled by "default y if DM_MMC"
for UniPhier SoCs; the difference is users can disable it if they
do not need it.
Signed-off-by: Masahiro Yamada
---
arch/arm/Kconfig | 1 -
1 fi
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