Hi Jagan,
When using Micron devices, SPI flash with quad mode does not work since commit
c56ae7519f141523ba1248b22b5b5169b21772fe "sf: Fix quad bit set for micron
devices".
This has been pointed out before, details about why the patch does work are
here:
http://lists.denx.de/pipermail/u-boot/20
Hello, Simon,
Thank you very much for your review.
Yes, this patch was only adding some help to Kconfig (as you requested), no
other changes from the previous version.
I have to re-send the entire series one more time for moving the change log
from commit messages to comment sections.
Some chang
Hi Simon,
Thanks a lot for your review!
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年12月7日 11:48
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Huan Wang-B18965
> ; Sumit Garg ; Ruchika
>
Hi Simon,
Thanks a lot for your review!
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年12月7日 11:48
> To: Z.Q. Hou
> Cc: U-Boot Mailing List ; Albert ARIBAUD
> ; Prabhakar Kushwaha
> ; Huan Wang-B18965
> ; Sumit Garg ; Ruchika
>
On Wed, Nov 30, 2016 at 4:49 AM, york sun wrote:
> On 11/25/2016 02:48 AM, Hongbo Zhang wrote:
>> This patch adds secure_text, secure_data and secure_stack sections for ARMv8
>> to
>> hold PSCI text and data, and it is based on the legacy implementation of
>> ARMv7.
>>
>> Signed-off-by: Hongbo Z
Move fdt fixup of 'status' property into a weak function. This allows
board to define 'status' fdt fixup by themselves.
Signed-off-by: Yangbo Lu
---
drivers/mmc/fsl_esdhc.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/driver
Hi Tom
2016-12-06 4:10 GMT+09:00 Tom Rini :
> On Sun, Dec 04, 2016 at 10:23:13PM +0900, Masahiro Yamada wrote:
>
>> While I moved the options, I also renamed them so that they are all
>> prefixed with MMC_SDHCI_.
> [snip]
>> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
>> index 8e9fa2d..
The LS1012AQDS board has a hardware issue. When there is no eMMC
adapter card inserted, the command inhibit bits of eSDHC_PRSSTAT
register will never release. This would cause below continious
error messages in linux since it uses polling mode to detect card.
"mmc1: Controller never released inhibi
Dear Michal,
On 12/06/2016 09:59 PM, Michal Simek wrote:
> On 5.12.2016 23:22, Jaehoon Chung wrote:
>> On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
>>> From: Stefan Herbrechtsmeier
>>>
>>> The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
>>> clock fr
On 12/07/2016 06:04 PM, Masahiro Yamada wrote:
> Hi Tom
>
> 2016-12-06 4:10 GMT+09:00 Tom Rini :
>> On Sun, Dec 04, 2016 at 10:23:13PM +0900, Masahiro Yamada wrote:
>>
>>> While I moved the options, I also renamed them so that they are all
>>> prefixed with MMC_SDHCI_.
>> [snip]
>>> diff --git a/d
On Sel, 2016-12-06 at 13:44 +0100, Marek Vasut wrote:
> On 12/06/2016 08:50 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > This is initial version of device tree for the Intel socfpga
> > arria10
> > development kit with sdmmc.
> >
> > Signed-off-by: Tien Fong Chee
> > Cc: Mare
On Sel, 2016-12-06 at 13:48 +0100, Marek Vasut wrote:
> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > Enhanced defconfig file for Arria10 to enable SPL build and
> > supporting
> > device tree build for SDMMC.
> >
> > Signed-off-by: Tien Fong Chee
> > Cc: M
On Sel, 2016-12-06 at 13:49 +0100, Marek Vasut wrote:
> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > These compat macros would be used by clock manager and pin mux
> > drivers
> > to look the required HW info from DTS for hardware initialization.
> >
> > Si
On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut wrote:
> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > These changes to ensure Arria10 SPL build success.
> Please reword the commit message, mention you're removing the Arria10
> bits. Still, this does not even
Hi,
On 2.12.2016 15:46, Michal Simek wrote:
> Hi,
>
> On 2.12.2016 15:12, Tom Rini wrote:
>> On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
>>
>>> Hi Tom,
>>>
>>> here are some patches I have collected for Xilinx devices, one miiphy
>>> patch and SCSI changes I have made.
>>>
>>> S
On Sel, 2016-12-06 at 13:51 +0100, Marek Vasut wrote:
> On 12/06/2016 09:07 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > Signed-off-by: Tien Fong Chee
> > Cc: Marek Vasut
> > Cc: Dinh Nguyen
> > Cc: Chin Liang See
> > Cc: Tien Fong
> > ---
> > arch/arm/mach-socfpga/includ
Add support to handle enable-active-high DT property. This property is
used to drive the gpio controlling fixed regulator as active high when
claiming gpio line.
Signed-off-by: Vignesh R
---
doc/device-tree-bindings/regulator/fixed.txt | 4
drivers/power/regulator/fixed.c | 7 +
Hi,
> -Ursprüngliche Nachricht-
> Von: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
>
> On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> > From: Stefan Herbrechtsmeier
> >
> >
> > The sdhci controller assumes that the base clock frequency is fully
> > supported by
On Sel, 2016-12-06 at 13:55 +0100, Marek Vasut wrote:
> On 12/06/2016 09:08 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > Drivers for reset manager is restructured such that common
> > functions,
> > gen5 drivers and Arria10 drivers are moved to reset_manager.c,
> > reset_manage
On Sel, 2016-12-06 at 16:26 -0600, dinguyen wrote:
> On Tue, 6 Dec 2016, Chee Tien Fong wrote:
>
> >
> > From: Tien Fong Chee
> >
> > The drivers is restructured such common functions, gen5 functions,
> > and arria10 functions are moved to misc.c, misc_gen5 and
> > misc_arria10
> > respectively
On Wed, Dec 07, 2016 at 06:04:21PM +0900, Masahiro Yamada wrote:
> Hi Tom
>
> 2016-12-06 4:10 GMT+09:00 Tom Rini :
> > On Sun, Dec 04, 2016 at 10:23:13PM +0900, Masahiro Yamada wrote:
> >
> >> While I moved the options, I also renamed them so that they are all
> >> prefixed with MMC_SDHCI_.
> > [s
On Wed, Dec 07, 2016 at 12:21:29PM +0100, Michal Simek wrote:
> Hi,
>
> On 2.12.2016 15:46, Michal Simek wrote:
> > Hi,
> >
> > On 2.12.2016 15:12, Tom Rini wrote:
> >> On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
> >>
> >>> Hi Tom,
> >>>
> >>> here are some patches I have collec
Currently, CONFIG_MMC is not related to any other options by
"depends on" or "select". One of big advantages of using Kconfig
is automatic dependency tracking, but the current state is lacking
it. As the first step, make the existing MMC driver entries depend
on MMC.
This commit was created by t
This is a user-unconfigurable option that is selected by the
drivers that need to overwrite SDHCI IO memory accessors.
(BCM2835 SDHCI seems the only driver that needs to do so.)
Signed-off-by: Masahiro Yamada
Reviewed-by: Tom Rini
---
Changes in v2: None
drivers/mmc/Kconfig | 8
in
Generated by "tools/moveconfig -s".
This will make config moves easier.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Regenerate based on v2017.01-rc1
configs/A10-OLinuXino-Lime_defconfig | 2 +-
configs/A20-OLinuXino-Lime2_defconfig | 2 +-
configs/A20-OL
Move CONFIG_SDHCI to Kconfig and rename it to CONFIG_MMC_SDHCI.
My motivation for the rename is, ultimately, to make all the MMC
options prefixed with MMC_ and SDHCI options with MMC_SDHCI_,
like Linux.
This commit was created as follows:
[1] Rename the config option with the following command:
f
I wrote a new SDHCI driver for my new SoCs, but before posting it,
I just want to make a clean base for my driver entry.
Of course, I could enable some needed options in my header file
(for options in the "white-list"), but I just thought it is a good
habit to contribute to Kconfig moves in the a
While I moved the options, I also renamed them so that they are all
prefixed with MMC_SDHCI_.
This commit was created in the following steps.
[1] Rename with the following command
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_MMC_
isp-camera image will be broken when enter dual screen display mode.
We set isp qos high to solve this problem.
Signed-off-by: Nickey Yang
---
board/rockchip/miniarm_rk3288/miniarm-rk3288.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/board/rockchip/miniarm_rk328
isp-camera image will be broken when enter dual screen display mode.
We set isp qos high to solve this problem.
Signed-off-by: Nickey Yang
---
board/rockchip/miniarm_rk3288/miniarm-rk3288.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/board/rockchip/miniarm_rk328
On Sel, 2016-12-06 at 10:54 +0530, Vignesh R wrote:
>
> Hi,
>
> On Thursday 01 December 2016 09:41 AM, Vignesh R wrote:
> [...]
> >
> >
> > >
> > >
> > > >
> > > >
> > > > Data slave port does accept byte, half-word and word access,
> > > > there
> > > > are
> > > > no data aborts. But indi
On 7.12.2016 14:10, Tom Rini wrote:
> On Wed, Dec 07, 2016 at 12:21:29PM +0100, Michal Simek wrote:
>> Hi,
>>
>> On 2.12.2016 15:46, Michal Simek wrote:
>>> Hi,
>>>
>>> On 2.12.2016 15:12, Tom Rini wrote:
On Fri, Dec 02, 2016 at 02:55:00PM +0100, Michal Simek wrote:
> Hi Tom,
>
>>
On 12/07/2016 11:30 AM, Chee, Tien Fong wrote:
> On Sel, 2016-12-06 at 13:44 +0100, Marek Vasut wrote:
>> On 12/06/2016 08:50 AM, Chee Tien Fong wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> This is initial version of device tree for the Intel socfpga
>>> arria10
>>> development kit with sdmmc.
>>>
On 12/07/2016 11:48 AM, Chee, Tien Fong wrote:
> On Sel, 2016-12-06 at 13:49 +0100, Marek Vasut wrote:
>> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> These compat macros would be used by clock manager and pin mux
>>> drivers
>>> to look the required HW info f
On 12/07/2016 11:57 AM, Chee, Tien Fong wrote:
> On Sel, 2016-12-06 at 13:47 +0100, Marek Vasut wrote:
>> On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> These changes to ensure Arria10 SPL build success.
>> Please reword the commit message, mention you're removi
On 12/07/2016 12:21 PM, Chee, Tien Fong wrote:
> On Sel, 2016-12-06 at 13:51 +0100, Marek Vasut wrote:
>> On 12/06/2016 09:07 AM, Chee Tien Fong wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Signed-off-by: Tien Fong Chee
>>> Cc: Marek Vasut
>>> Cc: Dinh Nguyen
>>> Cc: Chin Liang See
>>> Cc: Tien
On 12/07/2016 12:58 PM, Chee, Tien Fong wrote:
> On Sel, 2016-12-06 at 13:55 +0100, Marek Vasut wrote:
>> On 12/06/2016 09:08 AM, Chee Tien Fong wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Drivers for reset manager is restructured such that common
>>> functions,
>>> gen5 drivers and Arria10 driver
On 12/06/2016 05:41 PM, Marek Vasut wrote:
>> The previous patches in this series applied to Marek's 01-arria10 branch,
>> but this patch does not apply at all:
>>
>> error: patch failed: arch/arm/mach-socfpga/misc.c:361
>> error: arch/arm/mach-socfpga/misc.c: patch does not apply
>>
>> Also, on
On 12/07/2016 06:04 AM, Chee, Tien Fong wrote:
>> The previous patches in this series applied to Marek's 01-arria10
>> branch,
>> but this patch does not apply at all:
>>
>> error: patch failed: arch/arm/mach-socfpga/misc.c:361
>> error: arch/arm/mach-socfpga/misc.c: patch does not apply
>>
>> Al
Hi,
did somebody already did some effort to support the intel 82579 Gigabit
Ethernet PHY with the e1000 driver?
In my naive try to add it i had no success yet.
Regards
Markus
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Hi Maxime,
On Mon, Dec 5, 2016 at 10:33 PM, Jagan Teki wrote:
> Hi Maxime,
>
> On Sun, Dec 4, 2016 at 8:19 AM, Jagan Teki wrote:
>> On Tue, Nov 22, 2016 at 6:08 PM, Maxime Ripard
>> wrote:
>>> The CHIP Pro is a SoM made by NextThing Co, and that embeds a GR8 SIP, an
>>> AXP209 PMIC, a WiFi BT c
On 12/07/2016 04:05 PM, Dinh Nguyen wrote:
>
>
> On 12/06/2016 05:41 PM, Marek Vasut wrote:
>>> The previous patches in this series applied to Marek's 01-arria10 branch,
>>> but this patch does not apply at all:
>>>
>>> error: patch failed: arch/arm/mach-socfpga/misc.c:361
>>> error: arch/arm/mac
Hi,
These patches add support for liteSOM (http://grinn-global.com/litesom/),
and liteBoard (which uses liteSOM as it's base).
liteSOM consists of processor (NXP i.MX6UL), RAM memory (up to 512M DDR3)
and flash (eMMC card). The idea is that every board vendor can use liteSOM
as it's base for desi
liteBoard is a development board which uses liteSOM as its base.
Hardware specification:
* liteSOM (i.MX6UL, DRAM, eMMC)
* Ethernet PHY (id 0)
* USB host (usb_otg1)
* MicroSD slot (uSDHC1)
Signed-off-by: Marcin Niestroj
---
Changes v1 -> v2:
* fix boot_mode values for proper bmode command u
liteSOM is a System On Module (http://grinn-global.com/litesom/). It
can't exists on its own, but will be used as part of other boards.
Hardware specification:
* NXP i.MX6UL processor
* 256M or 512M DDR3 memory
* optional eMMC (uSDHC2)
Here we treat SOM similar to SOC, so we place it inside ar
Hi,
On 29.11.2016 17:31, Stefano Babic wrote:
On 16/09/2016 15:45, Marcin Niestroj wrote:
Hi,
These patches add support for liteSOM (http://grinn-global.com/litesom/),
and liteBoard (which uses liteSOM as it's base).
liteSOM consists of processor (NXP i.MX6UL), RAM memory (up to 512M DDR3)
an
Hi Stefano,
On Tue, Dec 6, 2016 at 12:00 AM, Jagan Teki wrote:
> From: Jagan Teki
>
> This series support framebuffer and I2C on top of u-boot-imx.git with
> latest u-boot.git merge.
>
> fec_mxc dm driver on previous version series trigger an issues with
> when DM_ETH not-defined so, this series
First, there are a number of features in newer QEMU that will allow us
to test a wider range of platforms, so we want to use at least v2.8.0.
Second, making use of a PPA for QEMU fails from time to time. So we
change to checking out and building a copy of QEMU when we know that we
are going to use
Am 07.12.2016 um 17:20 schrieb Tom Rini:
> First, there are a number of features in newer QEMU that will allow us
> to test a wider range of platforms, so we want to use at least v2.8.0.
> Second, making use of a PPA for QEMU fails from time to time. So we
> change to checking out and building a
>From 127c5fb9ef390cad5cf58e446110a696cf111345 Mon Sep 17 00:00:00 2001
From: John Haechten
Date: Wed, 7 Dec 2016 08:42:51 -0800
Subject: [PATCH 0/1] Adding MSCC PHY-VSC8530-VSC8531-VSC8540-VSC8541
Tested using BeagleBoneBlack,bb.org-overlays, v2016.11-rc3, with
0001-am335x_evm-uEnv.txt-bootz-
On 12/07/2016 12:34 AM, Yangbo Lu wrote:
> The LS1012AQDS board has a hardware issue. When there is no eMMC
> adapter card inserted, the command inhibit bits of eSDHC_PRSSTAT
> register will never release. This would cause below continious
> error messages in linux since it uses polling mode to det
>From 127c5fb9ef390cad5cf58e446110a696cf111345 Mon Sep 17 00:00:00 2001
From: John Haechten
Date: Wed, 7 Dec 2016 07:51:37 -0800
Subject: [PATCH] Adding MSCC PHY-VSC8530-VSC8531-VSC8540-VSC8541
(C) Copyright 2016 Microsemi Corporation, MIT License (MIT)
Author:John Haechten
Reviewed-by:Howard Hi
Haris Papadopoulos writes:
> Hi,
>
> I type fw_printenv variable_name to take the name of a uboot variable from
> linux.
>
> I get variable_name=10 for example
>
> How can I use the value 10 in the continuation of my script?
>
> I have tried
>
> string = fw_printenv flag_boot_error
> IFS="=" re
On 12/07/2016 08:47 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> Hi,
>
>> -Ursprüngliche Nachricht-
>> Von: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
>>
>> On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
>>> From: Stefan Herbrechtsmeier
>>>
>>>
>>> The sdhci
Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set
CONFIG_SYS_TEXT_BASE=0 with the following error:
LD u-boot
arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try
linking with -N
arm-linux-gnueabi-ld.bfd: final link failed: Bad value
The issue can r
On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2
signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select
eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command
inhibit bits of eSDHC2_PRSSTAT register will never release. This would
cause below contin
The LS1012AQDS board has a hardware issue. When there is no eMMC
adapter card inserted in SDHC2 adapter slot, the command inhibit
bits of eSDHC2_PRSSTAT register will never release. This would cause
below continious error messages in linux since it uses polling mode
to detect card.
"mmc1: Controlle
The LS1012AQDS board has a hardware issue. When there is no eMMC
adapter card inserted in SDHC2 adapter slot, the command inhibit
bits of eSDHC2_PRSSTAT register will never release. This would cause
below continious error messages in linux since it uses polling mode
to detect card.
"mmc1: Controlle
v4-v5 changes:
- rebased to latest u-boot version to ease conflict.
- added mutually exclusive from FSL_PPA.
v3-v4 changes:
- Re-added the 1/6 from v2, and move the newly re-named macro into Kconfig
- Add "Reviewed-by: Tom Rini " for patch 4/6 ~ 6/6.
v2-v3 changes:
- Drop the previous 1/6, s
NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI
implementation in PPA firmware, but this macro naming too generic, so this
patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI.
And this macro CONFIG_ARMV8_PSCI will be used for a generic PSCI for ARMv8
which will be
PSCI implementation needs the SMC instruction to be enabled.
Signed-off-by: Hongbo Zhang
Reviewed-by: Tom Rini
---
arch/arm/include/asm/macro.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 2553e3e..e
This patch introduces a generic ARMv8 PSCI framework, with all functions
returning a dummy ARM_PSCI_RET_NI (Not Implemented), then it is up to each
platform to implement their own functions based on this framework.
Signed-off-by: Hongbo Zhang
Reviewed-by: Tom Rini
---
arch/arm/cpu/armv8/Kconfig
Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right
place, this patch does all the setup steps.
Signed-off-by: Hongbo Zhang
Reviewed-by: Tom Rini
---
arch/arm/cpu/armv8/cpu-dt.c | 11 ++-
arch/arm/cpu/armv8/cpu.c | 22 ++
arch/arm/incl
This patch adds secure_text, secure_data and secure_stack sections for ARMv8 to
hold PSCI text and data, and it is based on the legacy implementation of ARMv7.
ARMV8_SECURE_BASE defines the address for PSCI secure sections, ARMV8_PSCI and
ARMV8_PSCI_NR_CPUS are firstly used in this patch, so they
A most basic PSCI implementation with only one psci_version is added for
LS1043A, this can verify the generic PSCI framework, and more platform specific
implementation will be added later.
Signed-off-by: Hongbo Zhang
Reviewed-by: Tom Rini
---
arch/arm/cpu/armv8/fsl-layerscape/Makefile |
Move fdt fixup of 'status' property into a weak function. This allows
board to define 'status' fdt fixup by themselves.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None
---
drivers/mmc/fsl_esdhc.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git
Move fdt fixup of 'status' property into a weak function. This allows
board to define 'status' fdt fixup by themselves.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None
Changes for v3:
- None
---
drivers/mmc/fsl_esdhc.c | 21 ++---
1 file changed, 14 insertions
On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2
signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select
eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command
inhibit bits of eSDHC2_PRSSTAT register will never release. This would
cause below contin
[...]
>> Did you get a chance to test this patch? There is also a similar
>> patch
>> for indirect read as well[1], it would be great if you could give
>> your
>> Tested-by for both the patches. Thanks!
>>
>> [1]https://patchwork.ozlabs.org/patch/700990/
>
> Actually I was bumping into sf p
> -Original Message-
> From: york sun
> Sent: Thursday, December 08, 2016 12:03 AM
> To: Y.B. Lu; u-boot@lists.denx.de
> Subject: Re: [PATCH 2/2] armv8: ls1012a: define esdhc_status_fixup for
> QDS board
>
> On 12/07/2016 12:34 AM, Yangbo Lu wrote:
> > The LS1012AQDS board has a hardware i
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