On 08/03/2016 05:24 AM, Chin Liang See wrote:
> Enable a simple malloc implementation which will minimize
> memory usage prior relocation. This is essential as memory
> available prior location is internal memory and limited in
> size.
>
> This implementation will stored last 2 usage of malloc. Wh
On 08/03/2016 07:32 AM, Alban Bedel wrote:
> Commit 147271209a9d ("net: asix: fix operation without eeprom")
> added a special handling for ASIX 88772B that enable another
> type of header. This break the driver in DM mode as the extra handling
> needed in the receive path is missing.
So add the e
On 08/03/2016 08:14 AM, Alban Bedel wrote:
> Added support for the Cypress GX3 SuperSpeed to Gigabit Ethernet
> Bridge Controller (VID_04b4/PID_3610).
>
> Signed-off-by: Alban Bedel
Applied, thanks
> ---
> drivers/usb/eth/asix88179.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/
On 08/03/2016 08:14 AM, Alban Bedel wrote:
> In asix_recv() the call to convert the endianess of the receive header
> was applied on the wrong variable. Instead of converting rx_hdr it
> converted pkt_hdr which is a pointer, and not yet initialiazed at this
> point.
>
> Signed-off-by: Alban Bedel
On 08/03/2016 08:14 AM, Alban Bedel wrote:
> Change the prototype of a few functions to allow resuing the code for
> the driver model.
>
> Signed-off-by: Alban Bedel
Applied, thanks
--
Best regards,
Marek Vasut
___
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U-Boot@lists.de
On 08/03/2016 08:14 AM, Alban Bedel wrote:
> Signed-off-by: Alban Bedel
> ---
Please add a commit message and repost just this one patch.
--
Best regards,
Marek Vasut
___
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U-Boot@lists.denx.de
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Hi Marek,
On Wed, 2016-08-03 at 08:58 +0200, Marek Vasut wrote:
> On 08/03/2016 05:24 AM, Chin Liang See wrote:
> > Enable a simple malloc implementation which will minimize
> > memory usage prior relocation. This is essential as memory
> > available prior location is internal memory and limited i
Hi Fabien,
On 02/08/2016 09:31, Fabien Lahoudere wrote:
> In order to simplify the use of various images on various media
> for nitrogen6x, the configuration of the board must follow the
> generic distro configuration (doc/README.distro).
>
> In order to boot your old rootfs, move your kernel an
On 02/08/2016 08:55, Stefan Agner wrote:
> From: Stefan Agner
>
> Currently the command buffer gets allocated with a size of 32 bytes.
> This causes warning messages on systems with cache lines bigger than
> 32 bytes:
> CACHE: Misaligned operation at range [9df17a00, 9df17a20]
>
> Define command
On 29/07/2016 01:49, Fabio Estevam wrote:
> From: Fabio Estevam
>
> mx7dsabresd has two targets:
>
> - mx7dsabresd_defconfig: boots in non-secure mode
> - mx7dsabresd_secure_defconfig: boots in secure mode
>
> Print the mode that is being used to help users to easily identify
> which target is
On 08/03/2016 09:30 AM, Chin Liang See wrote:
> Hi Marek,
Hi,
> On Wed, 2016-08-03 at 08:58 +0200, Marek Vasut wrote:
>> On 08/03/2016 05:24 AM, Chin Liang See wrote:
>>> Enable a simple malloc implementation which will minimize
>>> memory usage prior relocation. This is essential as memory
>>> a
When adding support for the driver model the SPI EEPROM feature had
been ignored. Fix the build with both CONFIG_DM_ETH and
CONFIG_E1000_SPI enabled.
Signed-off-by: Alban Bedel
---
drivers/net/e1000.c | 6 +-
drivers/net/e1000_spi.c | 57 +
For simplicity and backward compatibility automatically run 'pci enum'
via preboot when PCI is enabled. As preboot is already used for the
USB keyboard support this rework how CONFIG_PREBOOT is set to allow
combining several commands.
Signed-off-by: Alban Bedel
---
include/configs/tegra-common-p
On Wed, 3 Aug 2016 09:00:42 +0200
Marek Vasut wrote:
> On 08/03/2016 07:32 AM, Alban Bedel wrote:
> > Commit 147271209a9d ("net: asix: fix operation without eeprom")
> > added a special handling for ASIX 88772B that enable another
> > type of header. This break the driver in DM mode as the extra
Adjust this driver to support driver model for Ethernet.
Signed-off-by: Alban Bedel
---
drivers/usb/eth/asix88179.c | 184
1 file changed, 184 insertions(+)
diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c
index 45106ce5ef59..cc
On Wed, Aug 03, 2016 at 12:49:09PM +0900, Masahiro Yamada wrote:
> Hi Fabio,
>
>
> 2016-08-03 12:34 GMT+09:00 Fabio Estevam :
> > On Wed, Aug 3, 2016 at 12:31 AM, Masahiro Yamada
> > wrote:
> >> Hi.
> >>
> >>
> >> I am looking for a command
> >> that discards the saved environments,
> >
> > Does
Enable USB device tree node for Toradex Colibri Vybrid module.
Signed-off-by: Sanchayan Maity
---
arch/arm/dts/vf-colibri.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/vf-colibri.dtsi b/arch/arm/dts/vf-colibri.dtsi
index dc52748..e7d4c01 100644
--- a/arch/arm/
Add driver model support for Vybrid USB driver.
Signed-off-by: Sanchayan Maity
---
Hello,
I am trying to migrate the Vybrid USB driver to driver model.
Patches are based on top of uboot master branch. With this
implementation, host works perfectly fine on both USB ports
but I have problems using
Enable USB driver model for Toradex Colibri Vybrid modules.
Signed-off-by: Sanchayan Maity
---
configs/colibri_vf_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 986cec4..5017c7d 100644
--- a/configs/colibri_vf_defco
Add device tree node for USB peripheral on Vybrid.
Signed-off-by: Sanchayan Maity
---
arch/arm/dts/vf.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/vf.dtsi b/arch/arm/dts/vf.dtsi
index 1530d2f..951d321 100644
--- a/arch/arm/dts/vf.dtsi
+++ b/arch/arm/dts/vf
On Tue, Aug 02, 2016 at 11:42:46PM +, york sun wrote:
> Tom,
>
> The following changes since commit 26fb8db0f4d1e7c118b5e8f3a8849f359b91c166:
>
>Merge git://git.denx.de/u-boot-rockchip (2016-07-31 20:31:13 -0400)
>
> are available in the git repository at:
>
>git://git.denx.de/u-bo
Dear Petr,
In message <201343a2-69c2-6c3e-442b-a228190a8...@elnico.cz> you wrote:
>
> > attacker? How could you perform such a "switch" between modes? By
> > setting some bit somewhere. And it has to be in some persistent
> > storage. And the source code of your image is available to the
> >
On Wed, 2016-08-03 at 09:53 +0200, Marek Vasut wrote:
> On 08/03/2016 09:30 AM, Chin Liang See wrote:
> > Hi Marek,
>
> Hi,
>
> > On Wed, 2016-08-03 at 08:58 +0200, Marek Vasut wrote:
> > > On 08/03/2016 05:24 AM, Chin Liang See wrote:
> > > > Enable a simple malloc implementation which will mini
Hi Stefan,
On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner wrote:
> From: Stefan Agner
>
> The page table is maintained by the CPU, hence it is safe to always
> align cache flush to a whole cache line size. This allows to use
> mmu_page_table_flush for a single page table, e.g. when configure
> onl
On Tue, Aug 2, 2016 at 3:55 AM, Stefan Agner wrote:
> From: Stefan Agner
>
> Currently the command buffer gets allocated with a size of 32 bytes.
> This causes warning messages on systems with cache lines bigger than
> 32 bytes:
> CACHE: Misaligned operation at range [9df17a00, 9df17a20]
>
> Defi
On 08/03/2016 03:41 PM, Chin Liang See wrote:
> On Wed, 2016-08-03 at 09:53 +0200, Marek Vasut wrote:
>> On 08/03/2016 09:30 AM, Chin Liang See wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> On Wed, 2016-08-03 at 08:58 +0200, Marek Vasut wrote:
On 08/03/2016 05:24 AM, Chin Liang See wrote:
> Enable
On 08/03/2016 11:46 AM, Alban Bedel wrote:
> On Wed, 3 Aug 2016 09:00:42 +0200
> Marek Vasut wrote:
>
>> On 08/03/2016 07:32 AM, Alban Bedel wrote:
>>> Commit 147271209a9d ("net: asix: fix operation without eeprom")
>>> added a special handling for ASIX 88772B that enable another
>>> type of head
I know my non-volatile copy of the environment is in NOR flash so I use
the command
protect all off;erase +1
But, of course this is specific to NOR flash.
I'm not aware of a way to do this in the general case, independent of NV
environment storage media and redundancy.
I'd be supportive of
On 08/03/2016 01:58 PM, Sanchayan Maity wrote:
> Add driver model support for Vybrid USB driver.
>
> Signed-off-by: Sanchayan Maity
CCing Lukasz.
> ---
> Hello,
>
> I am trying to migrate the Vybrid USB driver to driver model.
> Patches are based on top of uboot master branch. With this
> impl
On 08/03/2016 03:35 AM, Alban Bedel wrote:
For simplicity and backward compatibility automatically run 'pci enum'
via preboot when PCI is enabled. As preboot is already used for the
USB keyboard support this rework how CONFIG_PREBOOT is set to allow
combining several commands.
For better or wor
On Wed, 2016-08-03 at 15:57 +0200, Marek Vasut wrote:
> On 08/03/2016 03:41 PM, Chin Liang See wrote:
> > On Wed, 2016-08-03 at 09:53 +0200, Marek Vasut wrote:
> > > On 08/03/2016 09:30 AM, Chin Liang See wrote:
> > > > Hi Marek,
> > >
> > > Hi,
> > >
> > > > On Wed, 2016-08-03 at 08:58 +0200, Ma
On Tue, Aug 2, 2016 at 4:31 AM, Fabien Lahoudere
wrote:
> #define CONFIG_SYS_I2C
> #define CONFIG_SYS_I2C_MXC
> -#define CONFIG_SYS_I2C_MXC_I2C1/* enable I2C bus 1 */
> -#define CONFIG_SYS_I2C_MXC_I2C2/* enable I2C bus 2 */
> -#define CONFIG_SYS_I2C_MXC_I2C3
On 2016-08-03 06:51, Fabio Estevam wrote:
> On Tue, Aug 2, 2016 at 3:55 AM, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> Currently the command buffer gets allocated with a size of 32 bytes.
>> This causes warning messages on systems with cache lines bigger than
>> 32 bytes:
>> CACHE: Misaligne
On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner wrote:
> From: Stefan Agner
>
> The page table is maintained by the CPU, hence it is safe to always
> align cache flush to a whole cache line size. This allows to use
> mmu_page_table_flush for a single page table, e.g. when configure
> only small regi
Add base address header file for Stratix10 SoC
Signed-off-by: Chin Liang See
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Ley Foon Tan
---
arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 48 ++
1 file changed, 48 insertions(+)
create mode 100755 arch/arm/mach-socfpga/include/
On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner wrote:
> As you noted, this particular case is due to cache flush of the page
> table and should be fixed with:
> arm: cache: always flush cache line size for page table
Yes, just noticed that on a imx7d-sdb I still get these cache warnings
even with
On 2 August 2016 at 14:35, kirti kumbhar wrote:
> Sir,
> I have download the source of u-boot,but there is one problem when I
> installing cross complier there are many dependency of assembly code I
> try to remove it but not working correctly so,sir please send some command
> or source c
Fix compile errors when enabling CONFIG_DM_ETH,
CONFIG_CMD_E1000 and CONFIG_E1000_SPI.
Signed-off-by: Yaroslav K.
---
drivers/net/e1000.c | 6 -
drivers/net/e1000_spi.c | 60 -
2 files changed, 35 insertions(+), 31 deletions(-)
diff --git
On Wed, 2016-08-03 at 15:51 +0200, Marek Vasut wrote:
> On 08/03/2016 11:46 AM, Alban Bedel wrote:
> >
> > On Wed, 3 Aug 2016 09:00:42 +0200
> > Marek Vasut wrote:
> >
> > >
> > > On 08/03/2016 07:32 AM, Alban Bedel wrote:
> > > >
> > > > Commit 147271209a9d ("net: asix: fix operation without
On Wed, Aug 03, 2016 at 02:39:47PM -0300, Fabio Estevam wrote:
> On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner wrote:
>
> > As you noted, this particular case is due to cache flush of the page
> > table and should be fixed with:
> > arm: cache: always flush cache line size for page table
>
> Yes,
Hi Tom,
On Wed, Aug 3, 2016 at 3:09 PM, Tom Rini wrote:
> I feel like we must have done something wrong of late, can you bisect
> when these came in? Thanks!
This cache warnings start to appear since commit:
commit bcc53bf095893fbdae531a9a7b5d4ef4a125a7fc
Author: Simon Glass
Date: Sun Jun
Hi,
On 3 August 2016 at 12:29, Fabio Estevam wrote:
> Hi Tom,
>
> On Wed, Aug 3, 2016 at 3:09 PM, Tom Rini wrote:
>
>> I feel like we must have done something wrong of late, can you bisect
>> when these came in? Thanks!
>
> This cache warnings start to appear since commit:
>
> commit bcc53bf095
Hi Simon,
On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote:
> Actually I think these are bugs and should be fixed. In this case,
> from what I can tell netboot_common() should cache-align the size in
> the call to:
>
> /* flush cache */
> flush_cache(load_addr, size);
Do you mean like this?
-
Hi Fabio,
On 3 August 2016 at 12:44, Fabio Estevam wrote:
> Hi Simon,
>
> On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote:
>
>> Actually I think these are bugs and should be fixed. In this case,
>> from what I can tell netboot_common() should cache-align the size in
>> the call to:
>>
>> /* fl
On 2016-08-03 11:44, Fabio Estevam wrote:
> Hi Simon,
>
> On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote:
>
>> Actually I think these are bugs and should be fixed. In this case,
I am completely with you Simon!
check_cache_range return 0, which actually leads to the cache operation
not being
Debug server feature has been dropped from roadmap.
Signed-off-by: York Sun
---
README | 6 -
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 5 -
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 9 -
board/freescale/ls2080a/ls2080a.c
On 2016-08-03 12:08, Simon Glass wrote:
> Hi Fabio,
>
> On 3 August 2016 at 12:44, Fabio Estevam wrote:
>> Hi Simon,
>>
>> On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote:
>>
>>> Actually I think these are bugs and should be fixed. In this case,
>>> from what I can tell netboot_common() should
Dear James,
In message you wrote:
> I know my non-volatile copy of the environment is in NOR flash so I use
> the command
>
> protect all off;erase +1
>
> But, of course this is specific to NOR flash.
>
> I'm not aware of a way to do this in the general case, independent of NV
> environment
On 08/03/2016 08:09 PM, Tom Rini wrote:
On Wed, Aug 03, 2016 at 02:39:47PM -0300, Fabio Estevam wrote:
On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner wrote:
As you noted, this particular case is due to cache flush of the page
table and should be fixed with:
arm: cache: always flush cache line s
From: Stefan Agner
Flush operations need to be cacheline aligned to take effect, make
sure to flush always complete cachelines. This avoids messages such
as:
CACHE: Misaligned operation at range [0090, 009004d9]
Signed-off-by: Stefan Agner
---
arch/arm/cpu/armv7/virt-v7.c | 4 +++-
1 file
Dear Wolfgang,
On 08/03/2016 12:59 PM, Wolfgang Denk wrote:
Dear James,
In message you wrote:
I know my non-volatile copy of the environment is in NOR flash so I use
the command
protect all off;erase +1
But, of course this is specific to NOR flash.
I'm not aware of a way to do this in the
Hi Stefan,
On Tue, Aug 2, 2016 at 4:20 AM, Stefan Agner wrote:
> From: Stefan Agner
>
> Flush loaded data cacheline aligned. This avoids warnings such as
> CACHE: Misaligned operation at range [8100, 816d0fa8]
>
> Signed-off-by: Stefan Agner
This fixes the cache warnings:
Tested-by: Fabio
Hi Stefan,
On Wed, Aug 3, 2016 at 5:08 PM, Stefan Agner wrote:
> From: Stefan Agner
>
> Flush operations need to be cacheline aligned to take effect, make
> sure to flush always complete cachelines. This avoids messages such
> as:
> CACHE: Misaligned operation at range [0090, 009004d9]
>
> S
On 2 August 2016 at 01:20, Stefan Agner wrote:
> From: Stefan Agner
>
> Flush loaded data cacheline aligned. This avoids warnings such as
> CACHE: Misaligned operation at range [8100, 816d0fa8]
>
> Signed-off-by: Stefan Agner
> ---
> Why do we actually have to flush caches after load? It see
On 1 August 2016 at 14:52, Stephen Warren wrote:
>
> From: Stephen Warren
>
> The next patch will call fdt_translate_address() from somewhere with a
> "const void *blob" rather than a "void *blob", so fdt_translate_address()
> must accept a const pointer too. Constify the minimum number of functi
On 8/3/2016 12:54 AM, Stefano Babic wrote:
> Hi Fabien,
>
>
> On 02/08/2016 09:31, Fabien Lahoudere wrote:
>> In order to simplify the use of various images on various media
>> for nitrogen6x, the configuration of the board must follow the
>> generic distro configuration (doc/README.distro).
>>
>
On Tue, Aug 2, 2016 at 2:20 AM, Stefan Agner wrote:
> From: Stefan Agner
>
> Flush loaded data cacheline aligned. This avoids warnings such as
> CACHE: Misaligned operation at range [8100, 816d0fa8]
>
> Signed-off-by: Stefan Agner
> ---
This was already rejected once.
http://lists.denx.de/p
On 21/07/16 21:30, Jaehoon Chung wrote:
> This patch support the driver model for s5p_sdhci controller.
> To support the legacy model, maintained the existing code.
>
> Note: If use the Driver Model, it needs to modify the device-tree.
> In future, will update the Device-tree and enable the config
Hi,
On 08/04/2016 09:38 AM, Minkyu Kang wrote:
> On 21/07/16 21:30, Jaehoon Chung wrote:
>> This patch support the driver model for s5p_sdhci controller.
>> To support the legacy model, maintained the existing code.
>>
>> Note: If use the Driver Model, it needs to modify the device-tree.
>> In fu
On 1 August 2016 at 01:05, Michal Simek wrote:
> The patch:
> "dm: mmc: zynq: Convert zynq to use driver model for MMC"
> (sha1: 329a449f2c289b4de8f892fca1d9379ce5fd81b8)
> added dependency on enabling some MMC options by default.
> There are minimal ZynqMP configurations which require
> only mini
Hi Andrew,
On 1 August 2016 at 09:30, Andrew F. Davis wrote:
> Disable support for loading non-FIT images for AM57xx platforms using
> the high-security (HS) device variant.
>
> Signed-off-by: Andrew F. Davis
> ---
> configs/am57xx_hs_evm_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> di
Hi Stephen,
On 1 August 2016 at 09:22, Stephen Warren wrote:
> On 07/31/2016 07:02 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 27 July 2016 at 15:48, Stephen Warren wrote:
>>>
>>> From: Stephen Warren
>>>
>>> Tegra186 supports the new standard clock, reset, and power domain APIs.
>>> Olde
Hi Stephen,
On 1 August 2016 at 09:50, Stephen Warren wrote:
> On 07/31/2016 08:20 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 27 July 2016 at 15:24, Stephen Warren wrote:
>>>
>>> From: Stephen Warren
>>>
>>> Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs
>>> st
Hi Stephen,
On 1 August 2016 at 10:02, Stephen Warren wrote:
> On 07/31/2016 07:04 PM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 29 July 2016 at 13:15, Stephen Warren wrote:
>>>
>>> From: Stephen Warren
>>>
>>> Now that clock and reset drivers exist for Tegra186, we can enable the SD
>>> ca
On 1 August 2016 at 20:47, Kever Yang wrote:
> MMC core will use 400KHz for card initialize first and then switch to
> higher frequency like 50MHz, we need to support both 400KHz and about
> 50MHz for dwmmc controller.
>
> Signed-off-by: Kever Yang
> ---
>
> drivers/clk/clk_rk3399.c | 29 +++
+Stephen as an example of a simple PMIC driver.
- Simon
On 1 August 2016 at 23:50, Stefan Agner wrote:
> From: Stefan Agner
>
> Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used
> on Colibri iMX7.
>
> Signed-off-by: Stefan Agner
> Reviewed-by: Simon Glass
> ---
>
> doc/device-
Hi Kever,
On 1 August 2016 at 21:00, Kever Yang wrote:
> Signed-off-by: Kever Yang
Please add a commit message.
> ---
>
> arch/arm/dts/rk3399-evb.dts | 4
> arch/arm/dts/rk3399.dtsi| 2 +-
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
Acked-by: Simon Glass
> diff --git a/arc
On 1 August 2016 at 21:53, Bin Meng wrote:
> Without PS/2 keyboard and mouse in the ASL file, Windows does not
> see them. No problem for Linux as it probes keyboard and mouse via
> the legacy 8042 I/O port.
>
> Signed-off-by: Bin Meng
> ---
>
> board/intel/bayleybay/acpi/mainboard.asl | 38
> +
On 2 August 2016 at 05:31, Max Filippov wrote:
> Extract reusable parts from ethoc_init, ethoc_set_mac_address,
> ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH.
> Add U_BOOT_DRIVER, eth_ops structure and implement required methods.
>
> Signed-off-by: Max Filippov
> ---
>
On 1 August 2016 at 21:00, Kever Yang wrote:
> Signed-off-by: Kever Yang
Commit message please.
> ---
>
> configs/evb-rk3399_defconfig| 1 +
> include/configs/rk3399_common.h | 1 +
> 2 files changed, 2 insertions(+)
Acked-by: Simon Glass
>
> diff --git a/configs/evb-rk3399_defconfig b/
On 1 August 2016 at 23:50, Stefan Agner wrote:
> From: Stefan Agner
>
> Add device tree node for Ricoh RN5T567. Currently we do not need
> the individual DC/DC converters or LDO's (and they are also not
> yet supported by the driver).
>
> Signed-off-by: Stefan Agner
> ---
>
> arch/arm/dts/imx7-
On 2 August 2016 at 20:42, Yaroslav K. wrote:
> Fix compile errors when enabling CONFIG_DM_ETH,
> CONFIG_CMD_E1000 and CONFIG_E1000_SPI.
>
> Signed-off-by: Yaroslav K.
> ---
> drivers/net/e1000.c | 6 -
> drivers/net/e1000_spi.c | 60
> -
On 3 August 2016 at 03:51, Alban Bedel wrote:
> Adjust this driver to support driver model for Ethernet.
>
> Signed-off-by: Alban Bedel
> ---
> drivers/usb/eth/asix88179.c | 184
>
> 1 file changed, 184 insertions(+)
Reviewed-by: Simon Glass
__
Hi,
On 3 August 2016 at 09:37, Stephen Warren wrote:
> On 08/03/2016 03:35 AM, Alban Bedel wrote:
>>
>> For simplicity and backward compatibility automatically run 'pci enum'
>> via preboot when PCI is enabled. As preboot is already used for the
>> USB keyboard support this rework how CONFIG_PREB
On 2 August 2016 at 21:50, Ziyuan Xu wrote:
> For compatibility with distro boot, fastboot, and mount the mmc deivce
> to PC via usb mass storage feature, GPT partitions are essential.
>
> You should write the partitions to mmc device prior to use above
> feature.
>
> => gpt write mmc 1 $partition
Hi,
On 2 August 2016 at 21:24, Chin Liang See wrote:
> Enable a simple malloc implementation which will minimize
> memory usage prior relocation. This is essential as memory
> available prior location is internal memory and limited in
> size.
>
> This implementation will stored last 2 usage of ma
Hi Joe,
On 3 August 2016 at 17:18, Joe Hershberger wrote:
> On Tue, Aug 2, 2016 at 2:20 AM, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned operation at range [8100, 816d0fa8]
>>
>> Signed-off-by: Stefan
Hi,
On 3 August 2016 at 10:32, Fabio Estevam wrote:
> On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> The page table is maintained by the CPU, hence it is safe to always
>> align cache flush to a whole cache line size. This allows to use
>> mmu_page_table_flush f
On 2016-08-03 18:22, Simon Glass wrote:
> Hi,
>
> On 3 August 2016 at 10:32, Fabio Estevam wrote:
>> On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner wrote:
>>> From: Stefan Agner
>>>
>>> The page table is maintained by the CPU, hence it is safe to always
>>> align cache flush to a whole cache line
On Wed, Aug 03, 2016 at 07:16:12PM -0600, Simon Glass wrote:
> Hi Andrew,
>
> On 1 August 2016 at 09:30, Andrew F. Davis wrote:
> > Disable support for loading non-FIT images for AM57xx platforms using
> > the high-security (HS) device variant.
> >
> > Signed-off-by: Andrew F. Davis
> > ---
> >
On 31 July 2016 at 21:34, Kever Yang wrote:
> Initialize the maximum clock with CMU, before setting the rockchip sdhci
> host controller.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Jaehoon Chung
> ---
>
> Changes in v3:
> - update commit message
>
> Changes in v2:
> - update base on comments f
On 1 August 2016 at 21:03, Ziyuan Xu wrote:
>
> On 2016年08月02日 10:56, Ziyuan Xu wrote:
>>
>> Hi kever,
>>
>>
>> On 2016年08月02日 10:29, Kever Yang wrote:
>>>
>>> To compatible with distro boot, we need to add gpt and fs support,
>>> including gpt table and vfat, ext2, ext4 support.
>>>
>>> Signed-of
Hi Tom,
On 3 August 2016 at 19:48, Tom Rini wrote:
> On Wed, Aug 03, 2016 at 07:16:12PM -0600, Simon Glass wrote:
>> Hi Andrew,
>>
>> On 1 August 2016 at 09:30, Andrew F. Davis wrote:
>> > Disable support for loading non-FIT images for AM57xx platforms using
>> > the high-security (HS) device va
On 2 August 2016 at 21:55, Ziyuan Xu wrote:
> For compatibility with distro boot, fastboot, and mount the mmc deivce
> to PC via usb mass storage feature, GPT partitions are essential.
>
> You should write the partitions to mmc device prior to use above
> feature.
>
> => gpt write mmc 1 $partition
On 2 August 2016 at 21:55, Ziyuan Xu wrote:
> Enable ums feature for rk3288 boards, so that we can mount the mmc
> device to PC.
>
> Signed-off-by: Ziyuan Xu
> ---
>
> include/configs/rk3288_common.h | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/configs/rk3288_common.h b/i
Hi Jaehoon,
On 31 July 2016 at 20:20, Simon Glass wrote:
> On 26 July 2016 at 04:06, Jaehoon Chung wrote:
>> buswidth isn't used anywhere in sdhci_setup_cfg.
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>> drivers/mmc/msm_sdhci.c | 4 ++--
>> drivers/mmc/sdhci.c | 4 ++--
>> drivers/mmc/zyn
On 31 July 2016 at 20:20, Simon Glass wrote:
> On 26 July 2016 at 04:06, Jaehoon Chung wrote:
>> Some arguments don't need to pass to sdhci_setup_cfg.
>> Generic variable can be used in sdhci_setup_cfg, and some arguments are
>> already included in sdhci_host struct.
>>
>> It's enough that just p
Hi Simon,
On 08/04/2016 11:35 AM, Simon Glass wrote:
> Hi Jaehoon,
>
> On 31 July 2016 at 20:20, Simon Glass wrote:
>> On 26 July 2016 at 04:06, Jaehoon Chung wrote:
>>> buswidth isn't used anywhere in sdhci_setup_cfg.
>>>
>>> Signed-off-by: Jaehoon Chung
>>> ---
>>> drivers/mmc/msm_sdhci.c
On 07/19/2016 03:52 PM, Scott Wood wrote:
> This is what Linux maps on classic PPC during boot, and modern kernel
> images don't fit within the current 8 MiB uncompressed limit.
>
> Adjust image load addresses to be above this limit to avoid conflicts.
>
> Signed-off-by: Scott Wood
> ---
> includ
Hi Simon,
On 08/04/2016 11:36 AM, Simon Glass wrote:
> On 31 July 2016 at 20:20, Simon Glass wrote:
>> On 26 July 2016 at 04:06, Jaehoon Chung wrote:
>>> Some arguments don't need to pass to sdhci_setup_cfg.
>>> Generic variable can be used in sdhci_setup_cfg, and some arguments are
>>> already
Hi Jaehoon,
On 3 August 2016 at 20:38, Jaehoon Chung wrote:
> Hi Simon,
>
> On 08/04/2016 11:35 AM, Simon Glass wrote:
>> Hi Jaehoon,
>>
>> On 31 July 2016 at 20:20, Simon Glass wrote:
>>> On 26 July 2016 at 04:06, Jaehoon Chung wrote:
buswidth isn't used anywhere in sdhci_setup_cfg.
On 08/04/2016 11:40 AM, Simon Glass wrote:
> Hi Jaehoon,
>
> On 3 August 2016 at 20:38, Jaehoon Chung wrote:
>> Hi Simon,
>>
>> On 08/04/2016 11:35 AM, Simon Glass wrote:
>>> Hi Jaehoon,
>>>
>>> On 31 July 2016 at 20:20, Simon Glass wrote:
On 26 July 2016 at 04:06, Jaehoon Chung wrote:
>>>
On 2016-08-03 16:18, Joe Hershberger wrote:
> On Tue, Aug 2, 2016 at 2:20 AM, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned operation at range [8100, 816d0fa8]
>>
>> Signed-off-by: Stefan Agner
>> ---
>
(Resend)
Tom,
The following changes since commit ad6a303c578b0087749510d20c1c46ae13f20367:
Merge git://git.denx.de/u-boot-fsl-qoriq (2016-08-02 20:45:24 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-mpc86xx.git
for you to fetch changes up to e1efe43c710bec8d9
Hi Michael,
Do you think this patch is necessary?
Thanks,
-Kever
On 07/29/2016 11:12 AM, Kever Yang wrote:
The calculation of "dev_desc->lba - 34 - 1 - offset" is not correct for
size '-', because both fist_usable_lba and last_usable_lba will remain
34 sectors.
We can simply use 0 for siz
To compatible with distro boot, we need to add gpt and fs support,
including gpt table and vfat, ext2, ext4 support.
Signed-off-by: Kever Yang
Reviewed-by: Simon Glass
---
Changes in v2:
- remove some re-defined MACRO, comments from Ziyuan Xu
include/configs/rk3399_common.h | 14 +
rk3399 sdcard is using dwmmc controller, enable it for sdcard.
SCLK_SDMMC is the clock for controller operation clock, move it
to the first place.
Signed-off-by: Kever Yang
Acked-by: Simon Glass
---
Changes in v2:
- add commit message
- move the SCLK_SDMMC and its name to the first place
arch
rk3399 using dwmmc controller for sdcard, let's enable it.
this patch set has been test on rk3399 evb.
Changes in v2:
- add commit message
- move the SCLK_SDMMC and its name to the first place
- add commit message
Kever Yang (3):
clock: rk3399: add support for dwmmc 400K
dts: rk3399: enable
Enable the rockchip dwmmc driver for rk3399 and its evb.
Signed-off-by: Kever Yang
Acked-by: Simon Glass
---
Changes in v2:
- add commit message
configs/evb-rk3399_defconfig| 1 +
include/configs/rk3399_common.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/evb-rk3399_defc
MMC core will use 400KHz for card initialize first and then switch to
higher frequency like 50MHz, we need to support both 400KHz and about
50MHz for dwmmc controller.
Signed-off-by: Kever Yang
Acked-by: Simon Glass
---
Changes in v2: None
drivers/clk/clk_rk3399.c | 29 +--
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